公开(公告)号：US11871525B2

公开(公告)日：2024-01-09

申请号：US17439494

申请日：2019-12-17

Applicant: KYOCERA Corporation

Inventor： Yoshihiro Hasegawa

IPC: H05K1/03 ,  H05K3/46 ,  H05K1/11

CPC classification number: H05K3/4661 ,  H05K1/0373 ,  H05K1/116 ,  H05K2201/0209 ,  H05K2201/0338

Abstract: A wiring board according to the present disclosure has at least a structure in which a wiring conductor layer is layered on a surface of an insulating layer containing particles of silica, and some particles of silica among the particles of silica contained in the insulating layer are partially exposed on the surface of the insulating layer. The wiring conductor layer includes a seed layer in contact with the insulating layer and a plated conductor layer formed on a surface of the seed layer. At a contact surface between the exposed portions of the particles of silica and the seed layer, an amorphous layer of silica derived from the particles of silica and an amorphous layer of metal derived from metal forming the seed layer are present.

公开(公告)号：US20230337361A1

公开(公告)日：2023-10-19

申请号：US18028951

申请日：2021-09-14

Applicant: KYOCERA Corporation

Inventor： Hidetoshi YUGAWA

IPC: H05K1/11

CPC classification number: H05K1/116 ,  H05K2201/096 ,  H05K2201/0209

Abstract: A wiring board according to the present disclosure includes a first insulation layer including a first surface, a land located on the first insulation layer and including a second surface, a second insulation layer located at the first surface of the first insulation layer and including a via hole extending over the second surface of the land, and a via-hole electrical conductor located in the via hole. The land includes a plurality of recessed portions on the second surface, and at least one recessed portion selected from the plurality of recessed portions includes a buffer body containing resin. The via-hole electrical conductor is in contact with the second surface of the land and the buffer body.

公开(公告)号：US20230242705A1

公开(公告)日：2023-08-03

申请号：US18296080

申请日：2023-04-05

Applicant: AJINOMOTO CO., INC.

Inventor： Ichiro OGURA

IPC: C08G59/42 ,  C08G59/62 ,  C08G59/18 ,  C08J5/18 ,  C09D163/00 ,  C07C69/78 ,  H01L23/29 ,  H05K1/03 ,  H01L23/00

CPC classification number: C08G59/4223 ,  C08G59/621 ,  C08G59/182 ,  C08J5/18 ,  C09D163/00 ,  C07C69/78 ,  H01L23/295 ,  H01L23/293 ,  H05K1/0373 ,  H05K1/034 ,  H01L24/29 ,  C08J2363/00 ,  H01L2224/2929 ,  H01L2924/0665 ,  H01L2224/29388 ,  H01L2924/05442 ,  H01L2224/29387 ,  H01L2224/2919 ,  H05K2201/0209 ,  H01L2924/062 ,  H01L2924/095

Abstract: Compounds including two or more aromatic rings to which a fluorine-substituted arylcarbonyloxy group is directly bonded are useful as epoxy resin curing agents.

公开(公告)号：US11708503B2

公开(公告)日：2023-07-25

申请号：US16886126

申请日：2020-05-28

Applicant: FUNAI ELECTRIC CO., LTD.

Inventor： Xiaorong Cai ,  Michael John Dixon ,  Yimin Guan ,  Ann P. Holloway ,  Jeanne Marie Saldanha Singh ,  Zhigang Xiao

IPC: C09D11/03 ,  C09D11/101 ,  H05K1/16 ,  C09D11/30 ,  B05D3/02 ,  C09D11/107 ,  H05K1/03

CPC classification number: C09D11/03 ,  B05D3/0209 ,  B05D3/0254 ,  C09D11/101 ,  C09D11/107 ,  C09D11/30 ,  H05K1/0373 ,  H05K1/162 ,  H05K2201/0209 ,  H05K2203/013

Abstract: An aqueous composition for forming a micro-fluid jet printable dielectric film layer, methods for forming dielectric film layers, and dielectric film layers formed by the method. The aqueous composition includes from about 5 to about 20 percent by 65 weight of a polymeric binder emulsion, from about 10 to about 30 percent by weight of a humectant, from about 0 to about 3 percent by weight of a surfactant, and an aqueous carrier fluid. The aqueous composition has a viscosity ranging from about 2 to about 6 centipoise at a temperature of about 23° C.

公开(公告)号：US20190200455A1

公开(公告)日：2019-06-27

申请号：US16286237

申请日：2019-02-26

Applicant: Ajinomoto Co., Inc.

Inventor： Shigeo NAKAMURA ,  Shiro TATSUMI ,  lkumi SAWA

IPC: H05K1/03 ,  H05K3/46 ,  C08L63/00 ,  H05K3/22 ,  H01L23/14 ,  H01L21/48 ,  H05K3/00 ,  B32B27/00 ,  H01L21/683 ,  H01L23/498

CPC classification number: H05K1/0373 ,  B32B7/04 ,  B32B15/08 ,  B32B15/20 ,  B32B27/00 ,  B32B27/08 ,  B32B27/10 ,  B32B27/18 ,  B32B27/205 ,  B32B27/26 ,  B32B27/28 ,  B32B27/281 ,  B32B27/285 ,  B32B27/288 ,  B32B27/32 ,  B32B27/325 ,  B32B27/36 ,  B32B27/365 ,  B32B2264/02 ,  B32B2264/0207 ,  B32B2264/0264 ,  B32B2307/202 ,  B32B2307/206 ,  B32B2307/306 ,  B32B2307/7265 ,  B32B2307/732 ,  B32B2457/08 ,  C08G59/621 ,  C08G59/686 ,  C08L63/00 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/145 ,  H01L23/49894 ,  H01L2221/68345 ,  H05K3/0011 ,  H05K3/22 ,  H05K3/4038 ,  H05K3/4673 ,  H05K3/4682 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2203/06

Abstract: Resin sheets which includes a support and a resin composition layer in contact on the support, and which are characterized in that an extracted water conductivity A of a cured product of the resin composition layer when extracted at 120° C. for 20 hours is 50 μS/cm or less and an extracted water conductivity B of the cured product of the resin composition layer when extracted at 160° C. for 20 hours is 200 μS/cm or less, can provide a thin insulating layer having excellent insulating properties.

公开(公告)号：US20180250916A1

公开(公告)日：2018-09-06

申请号：US15753571

申请日：2016-09-02

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： AKIHIRO YAMAUCHI ,  YOSHIAKI ESAKI ,  TAKAYOSHI OZEKI ,  HIROAKI UMEHARA ,  HIROHARU INOUE ,  YOSHIHIKO NAKAMURA

IPC: B32B15/092 ,  C08L63/00 ,  C08G65/44 ,  C08G59/62 ,  C08K3/36

CPC classification number: B32B15/092 ,  B32B15/08 ,  C08G59/62 ,  C08G65/44 ,  C08K3/36 ,  C08L13/00 ,  C08L63/00 ,  H05K1/03 ,  H05K1/0353 ,  H05K3/022 ,  H05K2201/0209 ,  C08K3/013 ,  C08L71/12

Abstract: A metal foil with resin is a metal foil with resin including a metal foil and a resin layer disposed on the metal foil, resin layer being obtained by half-curing a resin composition. The resin composition contains a first component that is a polymer, a second component that is a polyarylene ether copolymer, and a third component that is an epoxy resin. The first component has structures represented by formulae (1) and (2) below, with no unsaturated bond between carbon atoms. The third component has two or more epoxy groups per molecule. The second component is compatible with the first component, and the third component is incompatible with the first component.In the formulae (1) and (2), a ratio between x and y is x:y=0:1 to 0.35:0.65, R1 represents hydrogen atom or methyl group, and R2 represents hydrogen atom or an alkyl group.

公开(公告)号：US10069054B2

公开(公告)日：2018-09-04

申请号：US15591112

申请日：2017-05-10

Applicant: NICHIA CORPORATION

Inventor： Takuya Nakabayashi ,  Hiroto Tamaki

IPC: H01L33/62 ,  H01L33/64 ,  H01L33/60 ,  H01L33/28 ,  H01L33/32 ,  H01L33/30 ,  H01L33/56 ,  H01L33/50 ,  H05K1/03 ,  H05K1/11 ,  H05K1/09 ,  H05K1/02 ,  H05K1/18

CPC classification number: H01L33/62 ,  H01L25/167 ,  H01L33/28 ,  H01L33/30 ,  H01L33/32 ,  H01L33/486 ,  H01L33/502 ,  H01L33/56 ,  H01L33/60 ,  H01L33/647 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2924/0002 ,  H01L2924/181 ,  H05K1/0274 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/09 ,  H05K1/115 ,  H05K1/181 ,  H05K1/185 ,  H05K3/282 ,  H05K2201/0209 ,  H05K2201/0326 ,  H05K2201/10106 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A wiring substrate includes ceramic layers and a conductive member. The ceramic layers have an uppermost ceramic layer and a lowermost ceramic layer. The conductive member includes an upper conductive layer, an internal conductive layer, a lower conductive layer, vias, and a covering layer. The upper conductive layer is disposed on an upper surface of the uppermost ceramic layer. The internal conductive layer is interposed between the ceramic layers. The lower conductive layer is disposed on a lower surface of the lowermost ceramic layer. The vias connect the upper conductive layer, the internal conductive layer, and the lower connective layer. The covering layer covers a portion of the upper conductive layer. The upper conductive layer includes a covered region covered with the covering layer and an element mount region. An upper surface of the element mount region is higher than an upper surface of the covered portion.

公开(公告)号：US10005927B2

公开(公告)日：2018-06-26

申请号：US15258073

申请日：2016-09-07

Applicant: The Boeing Company

Inventor： Peter Babilo ,  Randall Jay Moss

IPC: C09J11/06 ,  C08K3/38 ,  C09J163/00 ,  H05K1/02 ,  H05K3/30 ,  B32B37/12 ,  B32B37/18 ,  C09K5/14 ,  C09J5/06 ,  C09J9/00 ,  B29C65/48 ,  C07F7/18 ,  C08K9/06 ,  B29K63/00 ,  B29K509/04 ,  B29L31/34

CPC classification number: C09J11/06 ,  B29C65/4855 ,  B29K2063/00 ,  B29K2509/04 ,  B29L2031/3406 ,  B32B37/1284 ,  B32B37/18 ,  B32B2037/1253 ,  B32B2457/00 ,  C07F7/1804 ,  C08K3/38 ,  C08K9/06 ,  C08K2003/382 ,  C09J5/06 ,  C09J9/00 ,  C09J163/00 ,  C09J2203/326 ,  C09J2463/00 ,  C09K5/14 ,  H05K1/0203 ,  H05K1/0209 ,  H05K3/305 ,  H05K2201/0133 ,  H05K2201/0209 ,  H05K2201/0239 ,  H05K2203/12 ,  Y02P70/613 ,  C09J183/00

Abstract: Provided are methods of forming thermally conductive flexible bonds for use in electronic boards of unmanned spacecrafts and other types of aircraft. Also provided are methods of preparing adhesive materials to form these bonds including methods of preparing treated filler particles. In some aspects, an adhesive material includes filler particles having organofunctional groups, such as boron nitride particles treated in silane. These particles may be combined with a urethane modified epoxy to form the adhesive material. The weight ratio of the particles in the adhesive material may be about 40-60%. The adhesive material may be thermally cured using a temperature of less than 110° C. to prevent damage to bonded electronic components. The cured adhesive may have a thermal conductivity of at least about 2 W/m K measured in vacuum and may have a glass transition temperature if less than −40° C.

公开(公告)号：US09974168B2

公开(公告)日：2018-05-15

申请号：US14861272

申请日：2015-09-22

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Sumiyo Nakamura ,  Takahiro Sumi ,  Takahiro Oka

IPC: H05K1/00 ,  H05K1/03 ,  C04B35/195 ,  H01L23/12 ,  H01L23/15 ,  H01L21/48 ,  H05K1/11 ,  H05K3/46 ,  C04B35/20 ,  H05K1/02 ,  H05K3/12 ,  H01L23/498

CPC classification number: H05K1/0306 ,  C04B35/195 ,  C04B35/20 ,  C04B35/62218 ,  C04B35/62625 ,  C04B2235/3215 ,  C04B2235/3217 ,  C04B2235/3481 ,  C04B2235/36 ,  C04B2235/80 ,  H01L21/4867 ,  H01L23/12 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K1/0298 ,  H05K1/111 ,  H05K1/115 ,  H05K3/1291 ,  H05K3/4629 ,  H05K2201/017 ,  H05K2201/0209 ,  H05K2201/068 ,  H05K2201/09563 ,  H05K2201/099 ,  H05K2201/09909 ,  Y02P70/611 ,  H01L2924/00

Abstract: Provided are an insulating ceramic paste, a ceramic electronic component, and a method for producing the ceramic electronic component that allow prevention of solder shorts between narrow-pitch terminal electrodes and suppression of generation of cracks in an insulator covering a portion of terminal electrodes during a firing step. The ceramic electronic component includes a ceramic multilayer substrate, terminal electrodes formed on a surface of the ceramic multilayer substrate, and an insulating ceramic film formed on the surface of the ceramic multilayer substrate so as to cover a portion of the terminal electrodes. An exposed surface portion (celsian-crystal-rich layer) of the insulating ceramic film has a thermal expansion coefficient that is lower than the thermal expansion coefficient of the ceramic multilayer substrate.

公开(公告)号：US09949379B2

公开(公告)日：2018-04-17

申请号：US14897214

申请日：2014-04-30

Applicant: AMOGREENTECH CO., LTD.

Inventor： Jongsoo Kim ,  Jeong-Sang Yu ,  O-Chung Kwon ,  Jae-Sic Kim

IPC: H05K3/36 ,  H05K3/28 ,  H05K3/46 ,  H05K1/02 ,  H05K1/09 ,  H05K1/11 ,  H05K3/00 ,  H05K3/10 ,  H05K1/03

CPC classification number: H05K3/361 ,  H05K1/028 ,  H05K1/0298 ,  H05K1/0393 ,  H05K1/092 ,  H05K1/115 ,  H05K3/0011 ,  H05K3/10 ,  H05K3/285 ,  H05K3/46 ,  H05K3/4664 ,  H05K3/4676 ,  H05K2201/0145 ,  H05K2201/0154 ,  H05K2201/0209 ,  H05K2201/0317 ,  H05K2203/0759

Abstract: A flexible printed circuit board includes a substrate, a circuit pattern formed on the substrate, and a protective coating layer formed on the substrate by applying and curing a coating solution to cover and protect the circuit pattern. A method for manufacturing forming a circuit pattern on a substrate and forming a protective coating layer for covering and protecting the circuit pattern by applying a coating solution on the substrate. The circuit pattern may be securely attached to the substrate, and damage and deformation of the circuit pattern due to repeated bending or warping of the substrate may be prevented, ultimately improving operational reliability.