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    Bus structure
    11.
    发明授权
    Bus structure 有权
    总线结构

    公开(公告)号：US07619166B2

    公开(公告)日：2009-11-17

    申请号：US11136558

    申请日：2005-05-25

    Applicant: Kuo-Ching Huang ,  Yu-Cheng Chang

    Inventor： Kuo-Ching Huang ,  Yu-Cheng Chang

    IPC: H01B7/08

    CPC classification number: H05K1/147 ,  H04N1/00519 ,  H04N1/1017 ,  H04N1/193 ,  H04N2201/0081 ,  H05K1/144 ,  H05K2201/09109

    Abstract: A bus structure may include two or more soft buses and one or more soft separation layers. The two or more soft buses may be stacked side by side with respect to each other. The one or more soft separation layers may be sandwiched between two adjacent soft buses of the two or more soft buses.

    Abstract translation: 总线结构可以包括两个或更多个软总线和一个或多个软分离层。 两个以上的软总线可以相对于彼此并排堆叠。 一个或多个软分离层可以夹在两个或多个软总线的两个相邻的软总线之间。

    TUNABLE HIGH IMPEDANCE SURFACE DEVICE
    13.
    发明申请
    TUNABLE HIGH IMPEDANCE SURFACE DEVICE 失效
    高阻抗表面装置

    公开(公告)号：US20080150657A1

    公开(公告)日：2008-06-26

    申请号：US11616061

    申请日：2006-12-26

    Applicant: Jovica Savic ,  Gregory J. Dunn ,  John A. Svigelj

    Inventor： Jovica Savic ,  Gregory J. Dunn ,  John A. Svigelj

    IPC: H01P1/10 ,  H01P7/00 ,  H01R43/00

    CPC classification number: H05K1/162 ,  H01G5/18 ,  H01Q15/0066 ,  H01Q15/147 ,  H05K1/116 ,  H05K3/0023 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/09109 ,  H05K2201/09436 ,  H05K2201/096 ,  Y10T29/49117

    Abstract: A tunable high impedance surface device (100) includes a conductive ground plane (105) and a plurality of conductive elements (110-114) electrically connected to the conductive ground plane (105). The device (100) also includes a plurality of capacitive elements (120-124) operable to vary a predetermined electromagnetic characteristic of the apparatus and standoffs (130, 132) between the plurality of capacitive elements (120-124) and the plurality of conductive elements (110-114). In one form, laser-drilled and electrically conductive micro-vias (136, 138) extend through the standoffs (130, 132) thereby electrically connecting the plurality of capacitive elements (120-124) to a data bus (140). The capacitive elements (120-124) may be integral with a circuit board (144) that supports the plurality conductive elements (110-114). Either the capacitive elements (120-124) or the conductive elements (110-114) are mechanically flexible and selectively movable to controllably adjust the distance (142) between the capacitive and conductive elements.

    Abstract translation: 可调谐高阻抗表面器件（100）包括导电接地平面（105）和电连接到导电接地平面（105）的多个导电元件（110-114）。 装置（100）还包括多个电容元件（120-124），可操作以改变装置的预定电磁特性和多个电容元件（120-124）之间的间隔（130,132）和多个导电 元素（110 - 114）。 在一种形式中，激光钻孔和导电微通孔（136,138）延伸穿过支座（130,132），从而将多个电容元件（120-124）电连接到数据总线（140）。 电容元件（120-124）可以与支撑多个导电元件（110-114）的电路板（144）成一体。 电容元件（120-124）或导电元件（110-114）中的任何一个都是机械地柔性的并且选择性地可移动以可控地调节电容元件和导电元件之间的距离（142）。

    HYBRID STRUCTURE OF MULTI-LAYER SUBSTRATES AND MANUFACTURE METHOD THEREOF
    14.
    发明申请
    HYBRID STRUCTURE OF MULTI-LAYER SUBSTRATES AND MANUFACTURE METHOD THEREOF 有权
    多层基板的混合结构及其制造方法

    公开(公告)号：US20080138575A1

    公开(公告)日：2008-06-12

    申请号：US11856858

    申请日：2007-09-18

    Applicant: Chih-kuang Yang

    Inventor： Chih-kuang Yang

    IPC: B32B3/10 ,  H01R43/00

    CPC classification number: H05K1/147 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/162 ,  H01L2224/48091 ,  H01L2924/01322 ,  H01L2924/19107 ,  H05K1/142 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  H05K2201/09481 ,  Y10T29/417 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T428/24322 ,  Y10T428/24917 ,  H01L2924/00014 ,  H01L2924/00

    Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.

    Abstract translation: 多层基板的混合结构包括第一多层基板和第二多层基板。 第一多层基板交替地堆叠第一金属层，第一介电层并具有VIA。 第一金属层的边界区域与相应的第一介电层的边界区域连接。 边界区域与相邻的第一金属层和相邻的第一介电层分离。 第二多层基板交替堆叠第二金属层和第二电介质层。 第二金属层的边界区域与相应的第二电介质层的边界区域连接。 边界区域与相邻的第二金属层和相邻的第二介电层分离。 VIA位于第一电介质层的边界区，并且每个VIA具有导电体，以将一个第一金属层与一个第二金属层连接。

    Semiconductor power module
    16.
    发明授权
    Semiconductor power module 有权
    半导体电源模块

    公开(公告)号：US06984883B2

    公开(公告)日：2006-01-10

    申请号：US10671592

    申请日：2003-09-29

    Applicant: Junji Yamada ,  Seiji Saiki

    Inventor： Junji Yamada ,  Seiji Saiki

    IPC: H01L23/48

    CPC classification number: H05K1/111 ,  H01L23/488 ,  H01L23/492 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K1/0306 ,  H05K3/3405 ,  H05K3/3421 ,  H05K3/38 ,  H05K3/4092 ,  H05K2201/0355 ,  H05K2201/09109 ,  H05K2201/1034 ,  Y02P70/611 ,  H01L2924/00

    Abstract: An insulating substrate (17) includes a surface conductive layer (25) fixedly laminated on a surface of the plate-like semiconductor body (21) via a surface side fixing member (24, 26). The surface side fixing member (24, 26) includes a first fixing portion (26) for fixing one part (25a) of the surface conductive layer (25) located underneath the joint portion (15) of the electrode terminal (14), and a second fixing portion (24) for fixing the other part (25b) of the surface conductive layer (25) which is not located underneath the joint portion (15), and a fixing strength exhibited by the first fixing portion (26) is smaller than that exhibited by the second fixing portion (24).

    Abstract translation: 绝缘基板（17）包括经由表面侧固定部件（24,26）固定层压在板状半导体主体（21）的表面上的表面导电层（25）。 表面侧固定构件（24,26）包括用于固定位于电极端子（14）的接合部分（15）下方的表面导电层（25）的一部分（25a）的第一固定部分（26） 以及用于固定不在接合部（15）的下方的表面导电层（25）的另一部分（25b）的第二固定部分（24）和由第一固定部分（26）表现的固定强度， 小于由第二固定部（24）所表现的结果。

    Flexible circuit board having electrical resistance heater trace
    17.
    发明授权
    Flexible circuit board having electrical resistance heater trace 失效
    柔性电路板具有电阻加热器迹线

    公开(公告)号：US06841739B2

    公开(公告)日：2005-01-11

    申请号：US10208942

    申请日：2002-07-31

    Applicant: Kevin D. Moore

    Inventor： Kevin D. Moore

    IPC: H05K1/00 ,  H05K1/02 ,  H05K1/03 ,  H05K1/18 ,  H05K5/00

    CPC classification number: H05K3/0014 ,  H05K1/0212 ,  H05K1/0366 ,  H05K1/0393 ,  H05K1/189 ,  H05K3/0061 ,  H05K5/0043 ,  H05K2201/09109 ,  H05K2201/0999 ,  H05K2201/2009 ,  H05K2203/302 ,  Y10T29/49126 ,  Y10T29/49128

    Abstract: A flexible circuit board (20) having a substantially rigid substrate (22) and an electrical resistance heater trace (24). The substantially rigid substrate (22) has a first portion (26), a second portion (28), and a bend region (30). The bend region (30) interconnects the first portion (26) and the second portion (28). The electrical resistance heater trace (24) is formed on the bend region (30) of the substrate (22). The first portion (26) of the substrate (22) is capable of being folded relative to the second portion (28) of the substrate (22) to form at least one bend (72, 172) in the bend region (30) when an electric current is applied to the heater trace (24). There is also an electronic control unit (60, 160) that includes the flexible circuit board (20) and a method of assembling an electronic control unit (60, 160).

    Abstract translation: 具有基本上刚性的基板（22）和电阻加热器迹线（24）的柔性电路板（20）。 基本刚性的基底（22）具有第一部分（26），第二部分（28）和弯曲区域（30）。 弯曲区域（30）将第一部分（26）和第二部分（28）互连。 电阻加热器迹线（24）形成在基板（22）的弯曲区域（30）上。 基板（22）的第一部分（26）能够相对于基板（22）的第二部分（28）折叠，以在弯曲区域（30）中形成至少一个弯曲部（72,172），当弯曲区域 向加热器迹线（24）施加电流。 还有一个包括柔性电路板（20）的电子控制单元（60,160）和组装电子控制单元（60,160）的方法。

    Flexible circuit board having electrical resistance heater trace
    19.
    发明申请
    Flexible circuit board having electrical resistance heater trace 失效
    柔性电路板具有电阻加热器迹线

    公开(公告)号：US20040020687A1

    公开(公告)日：2004-02-05

    申请号：US10208942

    申请日：2002-07-31

    Inventor： Kevin D. Moore

    IPC: H05B001/00

    CPC classification number: H05K3/0014 ,  H05K1/0212 ,  H05K1/0366 ,  H05K1/0393 ,  H05K1/189 ,  H05K3/0061 ,  H05K5/0043 ,  H05K2201/09109 ,  H05K2201/0999 ,  H05K2201/2009 ,  H05K2203/302 ,  Y10T29/49126 ,  Y10T29/49128

    Abstract: A flexible circuit board (20) having a substantially rigid substrate (22) and an electrical resistance heater trace (24). The substantially rigid substrate (22) has a first portion (26), a second portion (28), and a bend region (30). The bend region (30) interconnects the first portion (26) and the second portion (28). The electrical resistance heater trace (24) is formed on the bend region (30) of the substrate (22). The first portion (26) of the substrate (22) is capable of being folded relative to the second portion (28) of the substrate (22) to form at least one bend (72, 172) in the bend region (30) when an electric current is applied to the heater trace (24). There is also an electronic control unit (60, 160) that includes the flexible circuit board (20) and a method of assembling an electronic control unit (60, 160).

    Abstract translation: 具有基本上刚性的基板（22）和电阻加热器迹线（24）的柔性电路板（20）。 基本刚性的基底（22）具有第一部分（26），第二部分（28）和弯曲区域（30）。 弯曲区域（30）将第一部分（26）和第二部分（28）互连。 电阻加热器迹线（24）形成在基板（22）的弯曲区域（30）上。 基板（22）的第一部分（26）能够相对于基板（22）的第二部分（28）折叠，以在弯曲区域（30）中形成至少一个弯曲部（72,172），当弯曲区域 向加热器迹线（24）施加电流。 还有一个包括柔性电路板（20）的电子控制单元（60,160）和组装电子控制单元（60,160）的方法。

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