公开(公告)号：US08476533B2

公开(公告)日：2013-07-02

申请号：US13238761

申请日：2011-09-21

Applicant: Fa-Ping Fan

Inventor： Fa-Ping Fan

IPC: H05K1/03

CPC classification number: H05K1/111 ,  H05K1/0245 ,  H05K2201/09236 ,  H05K2201/09281 ,  Y02P70/611

Abstract: An exemplary printed circuit board includes a substrate, a differential transmission line, and at least two weld pad pairs. The differential transmission line and the at least two weld pad pairs are disposed on the substrate. The differential transmission line includes two parallel signal conductors disposed on the substrate. Each of the two signal conductors is electrically connected to an edge of one of the weld pads of a respective pair of the at least two weld pad pairs. Thereby, the two signal conductors of the differential transmission line can extend in the same distance anywhere, particularly in the position where the two signal conductors pass the two weld pad pairs. As a result, the coupling performance and the capability of the differential transmission line to resist electromagnetic interference are both enhanced.

Abstract translation: 示例性印刷电路板包括基板，差分传输线和至少两个焊盘对。 差分传输线和至少两个焊盘对设置在基板上。 差分传输线包括设置在基板上的两个并行信号导体。 两个信号导体中的每一个电连接到相应的一对至少两个焊盘对的焊接焊盘之一的边缘。 因此，差分传输线的两个信号导体可以在任何地方延伸相同的距离，特别是在两个信号导体通过两个焊盘对的位置。 结果，提高了耦合性能和差动传输线抵抗电磁干扰的能力。

公开(公告)号：US08222749B2

公开(公告)日：2012-07-17

申请号：US12254382

申请日：2008-10-20

Applicant: Seiji Sato ,  Takashi Ozawa

Inventor： Seiji Sato ,  Takashi Ozawa

IPC: H01L23/48

CPC classification number: H01L21/563 ,  H01L23/49811 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/814 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K1/111 ,  H05K3/3484 ,  H05K2201/09272 ,  H05K2201/09281 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2924/014

Abstract: A wiring substrate of the present invention includes such a structure that a plurality of connection pads and leading wiring portions connected to the plurality of connection pads respectively are arranged to an insulating layer of a surface layer side, and the leading wiring portions are arranged to be bended from the connection pads, and a solder layer to protrude upward is provided on the connection pads respectively. A solder on the leading wiring portions moves to the bend portion side, and thus the solder layer to protrude upward is formed on the connection pads.

Abstract translation: 本发明的布线基板包括将多个连接焊盘和连接到多个连接焊盘的引线布线部分分别布置到表面层侧的绝缘层的结构，并且引导布线部分布置成 从连接焊盘弯曲，分别在连接焊盘上设置向上突出的焊料层。 前导布线部分上的焊料移动到弯曲部分侧，因此在连接焊盘上形成向上突出的焊料层。

公开(公告)号：US07806731B2

公开(公告)日：2010-10-05

申请号：US11321931

申请日：2005-12-29

Applicant: Hem Takiar ,  Cheemen Yu ,  Ken Jian Ming Wang ,  Chin-Tien Chiu ,  Han-Shiao Chen ,  Chih-Chin Liao

Inventor： Hem Takiar ,  Cheemen Yu ,  Ken Jian Ming Wang ,  Chin-Tien Chiu ,  Han-Shiao Chen ,  Chih-Chin Liao

IPC: H01R24/00

CPC classification number: H01L23/49838 ,  H01L23/3121 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/117 ,  H05K3/242 ,  H05K3/3452 ,  H05K2201/09281 ,  H05K2201/09381 ,  H05K2201/0939 ,  H05K2201/099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger edges reduces the mechanical stress exerted on the semiconductor die which would otherwise occur with straight edges to the contact fingers. The substrate may additionally or alternatively include plating traces extending at an angle from the contact fingers. Extending at an angle, at least the ends of the plating traces at the edge of the substrate are covered beneath a lid in which the semiconductor package is encased. Thus, when in use with a host device, contact between the ends of the plating traces beneath the lid and contact pins of the host device is avoided.

Abstract translation: 公开了一种加强的半导体管芯基板和封装。 衬底可以包括形成有非线性边缘的接触指状物。 向接触指边缘提供非线性轮廓减少了施加在半导体管芯上的机械应力，否则这些应力将以直接接触指的边缘发生。 衬底可以附加地或可选地包括从接触指一定角度延伸的电镀迹线。 以一定角度延伸，至少衬底边缘处的电镀迹线的端部被覆盖在半导体封装被封装的盖子的下方。 因此，当与主机设备一起使用时，避免了盖子下方的电镀痕迹的端部和主机设备的接触销之间的接触。

公开(公告)号：US20100096170A1

公开(公告)日：2010-04-22

申请号：US12645303

申请日：2009-12-22

Applicant: YU-HSU LIN ,  JENG-DA WU ,  CHIH-HANG CHAO

Inventor： YU-HSU LIN ,  JENG-DA WU ,  CHIH-HANG CHAO

IPC: H05K1/02 ,  H05K3/10

CPC classification number: H01L23/50 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0224 ,  H05K1/0253 ,  H05K2201/09281 ,  H05K2201/09681 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A circuit board includes a signal plane and a ground plane. The signal plane is configured to have a plurality of signal traces arranged thereon. Each of the signal traces includes a plurality of straight line segments. Each line segment extends along a path different from the others. The ground plane includes a plurality of tiles connected in an array. Each tile is formed by ground traces. The straight line segments of each signal trace mapped on the ground plane are arranged at an angle relative to any one ground trace of the tiles. The angle is defined within a range determined by one of ground traces of a tile and an adjacent diagonal line of the tile. A method for laying out such a circuit board is also provided.

Abstract translation: 电路板包括信号平面和接地平面。 信号平面被配置为具有布置在其上的多个信号迹线。 每个信号迹线包括多个直线段。 每个线段沿着与其他线不同的路径延伸。 接地平面包括以阵列连接的多个瓦。 每个瓷砖由地面痕迹形成。 映射在接地平面上的每个信号迹线的直线段相对于瓦片的任何一个接地迹线以一定角度布置。 该角度限定在由瓦片的接地轨迹和瓦片的相邻对角线之一确定的范围内。 还提供了布线这种电路板的方法。

公开(公告)号：US20090102062A1

公开(公告)日：2009-04-23

申请号：US12254382

申请日：2008-10-20

Applicant: Seiji Sato ,  Takashi Ozawa

Inventor： Seiji Sato ,  Takashi Ozawa

IPC: H01L23/52 ,  H01L21/00

CPC classification number: H01L21/563 ,  H01L23/49811 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/814 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K1/111 ,  H05K3/3484 ,  H05K2201/09272 ,  H05K2201/09281 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2924/014

Abstract: A wiring substrate of the present invention includes such a structure that a plurality of connection pads and leading wiring portions connected to the plurality of connection pads respectively are arranged to an insulating layer of a surface layer side, and the leading wiring portions are arranged to be bended from the connection pads, and a solder layer to protrude upward is provided on the connection pads respectively. A solder on the leading wiring portions moves to the bend portion side, and thus the solder layer to protrude upward is formed on the connection pads.

Abstract translation: 本发明的布线基板包括将多个连接焊盘和连接到多个连接焊盘的引线布线部分分别布置到表面层侧的绝缘层的结构，并且引导布线部分布置成 从连接焊盘弯曲，分别在连接焊盘上设置向上突出的焊料层。 前导布线部分上的焊料移动到弯曲部分侧，因此在连接焊盘上形成向上突出的焊料层。

公开(公告)号：US20090058558A1

公开(公告)日：2009-03-05

申请号：US12224133

申请日：2007-02-28

Applicant: Takashi Okano

Inventor： Takashi Okano

IPC: H03H2/00 ,  H05K7/06

CPC classification number: H05K1/0231 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H05K1/0216 ,  H05K1/0233 ,  H05K1/181 ,  H05K2201/086 ,  H05K2201/09281 ,  H05K2201/10522 ,  H05K2201/10689 ,  H01L2924/00012

Abstract: One end of a power-supply bus is connected to a power supply through a ferrite bead. The power-supply bus is connected to power-supply terminals. The power-supply terminals are connected at positions in such a manner that a terminal with a higher intensity is connected closer to the other end of the power-supply bus. Ground terminals are connected to ground. Capacitors are bypass capacitors or decoupling capacitors, for example, and connected between respective power-supply terminals and ground.

Abstract translation: 电源总线的一端通过铁氧体磁珠连接到电源。 电源总线连接到电源端子。 电源端子以这样的方式连接，使得具有较高强度的端子更靠近电源总线的另一端连接。 接地端子接地。 例如，电容器是旁路电容器或去耦电容器，并且连接在相应的电源端子和地之间。

公开(公告)号：US20080089045A1

公开(公告)日：2008-04-17

申请号：US12000366

申请日：2007-12-12

Applicant: Cheng Tay ,  Wendy Ngoh ,  Choi Chan

Inventor： Cheng Tay ,  Wendy Ngoh ,  Choi Chan

IPC: H05K1/18 ,  H05K3/34 ,  H05K7/00

CPC classification number: H05K1/111 ,  H05K2201/09227 ,  H05K2201/09281 ,  H05K2201/09481 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10T29/49144 ,  Y10T29/5313

Abstract: A printed circuit board includes a group of pads suitable to be soldered to a respective group of solder-balls of a device. Each pad of the group has a crack initiation point on its perimeter at a location where cracks in a solder-ball are anticipated to start after that solder-ball is soldered to that pad. For a pad of that group having a microvia located therein, a center of that microvia is located farther than a center of that pad from its crack initiation point. For a pad of that group having a trace merging along a portion of its perimeter, that portion does not include a vicinity of that crack initiation point.

公开(公告)号：US07269028B2

公开(公告)日：2007-09-11

申请号：US09739252

申请日：2000-12-19

Applicant: Jacqueline V. Csonka ,  Ignatius T. Chong

Inventor： Jacqueline V. Csonka ,  Ignatius T. Chong

IPC: H05K7/06

CPC classification number: H05K1/111 ,  H05K1/0216 ,  H05K2201/09281 ,  H05K2201/10689 ,  Y02P70/611

Abstract: A method of routing or laying out signal traces on printed wire or circuit board in order to improve signal transmission quality. The method includes routing a given signal trace such that it is electrically connected to a rectangular corner of a substantially wider component pin pad and forms an angle of approximately 135 degrees with the proximate sides of the pad, thereby minimizing the impedance discontinuity at the interface or junction of the signal trace and pad and hence minimizing the reflection of the digital signal at the interface or junction.

Abstract translation: 在印刷线或电路板上布线或铺设信号迹线以提高信号传输质量的方法。 该方法包括布置给定的信号迹线，使得其电连接到基本上更宽的分量针焊盘的矩形角，并且与焊盘的近侧形成大约135度的角度，从而最小化界面处的阻抗不连续性 信号迹线和焊盘的结，从而最小化数字信号在界面或结点处的反射。

公开(公告)号：US20070155247A1

公开(公告)日：2007-07-05

申请号：US11321931

申请日：2005-12-29

Applicant: Hem Takiar ,  Cheemen Yu ,  Ken Wang ,  Chin-Tien Chiu ,  Han-Shiao Chen ,  Chih-Chin Liao

Inventor： Hem Takiar ,  Cheemen Yu ,  Ken Wang ,  Chin-Tien Chiu ,  Han-Shiao Chen ,  Chih-Chin Liao

IPC: H01R24/00

CPC classification number: H01L23/49838 ,  H01L23/3121 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/117 ,  H05K3/242 ,  H05K3/3452 ,  H05K2201/09281 ,  H05K2201/09381 ,  H05K2201/0939 ,  H05K2201/099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger edges reduces the mechanical stress exerted on the semiconductor die which would otherwise occur with straight edges to the contact fingers. The substrate may additionally or alternatively include plating traces extending at an angle from the contact fingers. Extending at an angle, at least the ends of the plating traces at the edge of the substrate are covered beneath a lid in which the semiconductor package is encased. Thus, when in use with a host device, contact between the ends of the plating traces beneath the lid and contact pins of the host device is avoided.

Abstract translation: 公开了一种加强的半导体管芯基板和封装。 衬底可以包括形成有非线性边缘的接触指状物。 向接触指边缘提供非线性轮廓减少了施加在半导体管芯上的机械应力，否则这些应力将以直接接触指的边缘发生。 衬底可以附加地或可选地包括从接触指一定角度延伸的电镀迹线。 以一定角度延伸，至少衬底边缘处的电镀迹线的端部被覆盖在半导体封装被封装的盖子的下方。 因此，当与主机设备一起使用时，避免了盖子下方的电镀痕迹的端部和主机设备的接触销之间的接触。

公开(公告)号：US07230835B1

公开(公告)日：2007-06-12

申请号：US10623216

申请日：2003-07-18

Applicant: Bilal Ahmad

Inventor： Bilal Ahmad

IPC: H05K1/11 ,  H05K1/14

CPC classification number: H05K1/111 ,  H05K1/0224 ,  H05K1/0237 ,  H05K1/025 ,  H05K1/0268 ,  H05K2201/0792 ,  H05K2201/09236 ,  H05K2201/09281 ,  H05K2201/093 ,  H05K2201/0969 ,  Y02P70/611

Abstract: A circuit board has, in a first signal layer, a signal conductor having a relatively small width and a contact pad having a relatively large width. The relatively large width of the contact pad combined with the relatively narrow signal conductor creates an impedance mismatch between the contact pad and the signal conductor. The circuit board has, in a second signal layer, a ground plane separated from the first signal layer by a nonconductive layer. The circuit board defines an opening in the second signal layer underneath the contact pad. The presence of the ground plane underneath the contact pad typically affects the impedance of the contact pad. The opening in the second signal layer removes a portion the ground plane relative to the contact pad and, therefore, reduces the impedance mismatch between the contact pad and the signal conductor. Such reduction in the mismatch of the impedances between the contact pad and the signal conductor minimizes signal reflection of a signal transmitted through the signal conductor and across the contact pad.

Abstract translation: 电路板在第一信号层中具有相对较小宽度的信号导体和具有相对较大宽度的接触垫。 接触焊盘的相对较大的宽度与较窄的信号导体相结合，在接触焊盘和信号导体之间产生阻抗失配。 电路板在第二信号层中具有通过非导电层与第一信号层分离的接地层。 电路板在接触垫下面的第二信号层中限定开口。 接触焊盘下面的接地层的存在通常会影响接触焊盘的阻抗。 第二信号层中的开口相对于接触焊盘去除接地层的一部分，因此减小了接触焊盘和信号导体之间的阻抗失配。 接触焊盘和信号导体之间的阻抗失配的这种减少使通过信号导体传输的信号和接触焊盘的信号反射最小化。