MEMS PROCESS AND DEVICE
    201.
    发明申请
    MEMS PROCESS AND DEVICE 有权
    MEMS工艺和器件

    公开(公告)号:US20100155864A1

    公开(公告)日:2010-06-24

    申请号:US12719999

    申请日:2010-03-09

    Abstract: A MEMS device, for example a capacitive microphone, comprises a flexible membrane 11 that is free to move in response to pressure differences generated by sound waves. A first electrode 13 is mechanically coupled to the flexible membrane 11, and together form a first capacitive plate of the capacitive microphone device. A second electrode 23 is mechanically coupled to a generally rigid structural layer or back-plate 14, which together form a second capacitive plate of the capacitive microphone device. The capacitive microphone is formed on a substrate 1, for example a silicon wafer. A back-volume 33 is provided below the membrane 11, and is formed using a “back-etch” through the substrate 1. A first cavity 9 is located directly below the membrane 11, and is formed using a first sacrificial layer during the fabrication process. Interposed between the first and second electrodes 13 and 23 is a second cavity 17, which is formed using a second sacrificial layer during the fabrication process. A plurality of bleed holes 15 connect the first cavity 9 and the second cavity 17. Acoustic holes 31 are arranged in the back-plate 14 so as to allow free movement of air molecules, such that the sound waves can enter the second cavity 17. The first and second cavities 9 and 17 in association with the back-volume 33 allow the membrane 11 to move in response to the sound waves entering via the acoustic holes 31 in the back-plate 14. The provision of first and second sacrificial layers has the advantage of protecting the membrane during manufacture, and disassociating the back etch process from the definition of the membrane. The bleed holes 15 aid with the removal of the first and second sacrificial layers. The bleed holes 15 also contribute to the operating characteristics of the microphone.

    Abstract translation: MEMS器件,例如电容麦克风,包括响应于由声波产生的压力差而自由移动的柔性膜11。 第一电极13机械耦合到柔性膜11,并且一起形成电容式麦克风装置的第一电容板。 第二电极23机械地耦合到大致刚性的结构层或背板14,它们一起形成电容式麦克风装置的第二电容板。 电容麦克风形成在基板1上,例如硅晶片。 背部体积33设置在膜11下方,并且通过基底1的“背蚀刻”形成。第一腔9位于膜11的正下方,并且在制造期间使用第一牺牲层形成 处理。 介于第一和第二电极13和23之间的是第二腔17,其在制造过程中使用第二牺牲层形成。 多个排放孔15连接第一腔9和第二腔17.声孔31布置在背板14中,以便允许空气分子的自由运动,使得声波可以进入第二腔17。 与背容积33相关联的第一和第二空腔9和17允许膜11响应于通过背板14中的声孔31进入的声波而移动。提供第一和第二牺牲层具有 在制造过程中保护膜的优点,以及使背蚀刻工艺与膜的定义分离。 排出孔15有助于去除第一和第二牺牲层。 排放孔15也有助于麦克风的操作特性。

    Methods for fabrication of three-dimensional structures
    202.
    发明授权
    Methods for fabrication of three-dimensional structures 有权
    制造三维结构的方法

    公开(公告)号:US07696102B2

    公开(公告)日:2010-04-13

    申请号:US11278137

    申请日:2006-03-30

    Applicant: Gang Zhang

    Inventor: Gang Zhang

    Abstract: A multi-layer fabrication method for making three-dimensional structures is provided. In one embodiment, the formation of a multi-layer three-dimensional structure comprises: 1) fabricating a plurality of layers with each layer comprising at least two materials; 2) aligning the layers; 3) attaching the layers together to form a multi-layer structure; and 4) removing at least a portion of at least one of the materials from the multi-layer structure. Fabrication methods for making the required layers are also disclosed. In another embodiment, the formation of a multi-layer three-dimensional structure comprises: 1) attaching a layer of a material to a substrate or a previously formed layer; 2) machining the attached layer to form a layer that comprises at least two materials; and 3) repeating the operations of 1) and 2) a plurality of times to form a multi-layer structure; and 4) removing at least a portion of at least one of the materials from the multi-layer structure to form a desired three-dimensional structure.

    Abstract translation: 提供了一种用于制造三维结构的多层制造方法。 在一个实施例中,多层三维结构的形成包括:1)制造多层,每层包含至少两种材料; 2)对齐层; 3)将层连接在一起以形成多层结构; 以及4)从多层结构中去除至少一种材料的至少一部分。 还公开了制备所需层的制造方法。 在另一个实施方案中,多层三维结构的形成包括:1)将材料层附着到基底或预先形成的层上; 2)加工附着层以形成包含至少两种材料的层; 和3)重复操作1)和2)多次以形成多层结构; 以及4)从多层结构中去除至少一种材料的至少一部分以形成所需的三维结构。

    Method of making a micro-fluidic structure
    203.
    发明授权
    Method of making a micro-fluidic structure 有权
    制造微流体结构的方法

    公开(公告)号:US07666798B2

    公开(公告)日:2010-02-23

    申请号:US11440643

    申请日:2006-05-24

    CPC classification number: B81C1/00119 B81B2203/0315 B81C2201/0109

    Abstract: A microfabricated structure and method of making that includes forming a first layer of material on a substrate, forming patterned sacrificial material having a predetermined shape on the first layer of material, and forming a second layer of material over the first layer and the patterned sacrificial material, which is then removed to form an encapsulated cavity. Ideally, the first and second layers are formed of the same type material. A structural support layer can be added to the second layer. Openings can be formed in the cavity, and the cavities can be layered side by side, vertically stacked with interconnections via the openings, and a combination of both can be used to construct stacked arrays with interconnections throughout.

    Abstract translation: 微制造结构及其制造方法包括在基材上形成第一层材料,在第一层材料上形成具有预定形状的图案化牺牲材料,以及在第一层上形成第二层材料,并将图案化的牺牲材料 ,然后将其除去以形成封装的空腔。 理想地,第一层和第二层由相同类型的材料形成。 结构支撑层可以添加到第二层。 可以在空腔中形成开口,并且空腔可以并排堆叠,通过开口垂直地堆叠有互连,并且两者的组合可以用于构造整个具有互连的堆叠阵列。

    Method for fabricating a structure for a microelectromechanical systems (MEMS) device
    204.
    发明授权
    Method for fabricating a structure for a microelectromechanical systems (MEMS) device 有权
    用于制造微机电系统(MEMS)装置的结构的方法

    公开(公告)号:US07642110B2

    公开(公告)日:2010-01-05

    申请号:US11830750

    申请日:2007-07-30

    Applicant: Mark W. Miles

    Inventor: Mark W. Miles

    Abstract: The invention provides a microfabrication process which may be used to manufacture a MEMS device. The process comprises depositing one or a stack of layers on a base layer, said one layer or an uppermost layer in said stack of layers being a sacrificial layer; patterning said one or a stack of layers to provide at least one aperture therethrough through which said base layer is exposed; depositing a photosensitive layer over said one or a stack of layers; and passing light through said at least one aperture to expose said photosensitive layer.

    Abstract translation: 本发明提供了可用于制造MEMS装置的微细加工方法。 该方法包括在基底层上沉积一层或一叠层,所述层中的所述一层或最上层为牺牲层; 图案化所述一层或一叠层以提供穿过其中的所述基层暴露的至少一个孔; 在所述一层或一叠层上沉积感光层; 并使光通过所述至少一个孔以暴露所述感光层。

    Sacrificial layer technique to make gaps in MEMS applications
    205.
    发明授权
    Sacrificial layer technique to make gaps in MEMS applications 有权
    牺牲层技术在MEMS应用中产生空白

    公开(公告)号:US07358580B2

    公开(公告)日:2008-04-15

    申请号:US11241024

    申请日:2005-09-30

    Applicant: Qing Ma Peng Cheng

    Inventor: Qing Ma Peng Cheng

    CPC classification number: B81C1/00126 B81C2201/0109 H03H3/0072

    Abstract: A method comprising over an area of a substrate, forming a plurality of three dimensional first structures; following forming the first structures, conformally introducing a sacrificial material over the area of the substrate; introducing a second structural material over the sacrificial material; and removing the sacrificial material. An apparatus comprising a first structure on a substrate; and a second structure on the substrate and separated from the first structure by an unfilled gap defined by the thickness of a removed film.

    Abstract translation: 一种方法,包括在衬底的一个区域上,形成多个三维第一结构; 在形成第一结构之后,在衬底的区域上保形地引入牺牲材料; 在牺牲材料上引入第二结构材料; 并去除牺牲材料。 一种装置,包括在基板上的第一结构; 以及第二结构,并且通过由去除膜的厚度限定的未填充间隙与第一结构分离。

    DEVICES HAVING HORIZONTALLY-DISPOSED NANOFABRIC ARTICLES AND METHODS OF MAKING THE SAME
    206.
    发明申请
    DEVICES HAVING HORIZONTALLY-DISPOSED NANOFABRIC ARTICLES AND METHODS OF MAKING THE SAME 有权
    具有水溶性纳米制品的装置及其制造方法

    公开(公告)号:US20070235826A1

    公开(公告)日:2007-10-11

    申请号:US11193795

    申请日:2005-07-29

    Abstract: New devices having horizontally-disposed nanofabric articles and methods of making same are described. A discrete electro-mechanical device includes a structure having an electrically-conductive trace. A defined patch of nanotube fabric is disposed in spaced relation to the trace; and the defined patch of nanotube fabric is electromechanically deflectable between a first and second state. In the first state, the nanotube article is in spaced relation relative to the trace, and in the second state the nanotube article is in contact with the trace. A low resistance signal path is in electrical communication with the defined patch of nanofabric. Under certain embodiments, the structure includes a defined gap into which the electrically conductive trace is disposed. The defined gap has a defined width, and the defined patch of nanotube fabric spans the gap and has a longitudinal extent that is slightly longer than the defined width of the gap. Under certain embodiments, a clamp is disposed at each of two ends of the nanotube fabric segment and disposed over at least a portion of the nanotube fabric segment substantially at the edges defining the gap. Under certain embodiments, the clamp is made of electrically-conductive material. Under certain embodiments, the contact between the nanotube patch and the trace is a non-volatile state. Under certain embodiments, the contact between the nanotube patch and the trace is a volatile state. Under certain embodiments, the at least one electrically conductive trace has an interface material to alter the attractive force between the nanotube fabric segment and the electrically conductive trace.

    Abstract translation: 描述了具有水平布置的纳米制品的新器件及其制造方法。 分立的机电装置包括具有导电迹线的结构。 定义的纳米管织物贴片与痕迹间隔开设置; 并且所述限定的纳米管织物片在第一和第二状态之间是机电偏转的。 在第一状态下,纳米管制品相对于迹线具有间隔的关系,并且在第二状态下,纳米管制品与痕迹接触。 低电阻信号路径与所定义的纳米片段电连通。 在某些实施例中,该结构包括限定的导电迹线设置的间隙。 限定的间隙具有限定的宽度,并且限定的纳米管织物片段跨过间隙并且具有比限定的间隙宽度稍长的纵向范围。 在某些实施例中,夹具设置在纳米管织物片段的两端中的每一个处,并且在纳米管织物片段的至少一部分上大致位于限定间隙的边缘处。 在某些实施例中,夹具由导电材料制成。 在某些实施方案中,纳米管贴片和迹线之间的接触是非挥发性状态。 在某些实施方案中,纳米管贴片和迹线之间的接触是挥发性状态。 在某些实施例中,至少一个导电迹线具有界面材料,以改变纳米管织物片段和导电迹线之间的吸引力。

    Damascene process for use in fabricating semiconductor structures having micro/nano gaps
    207.
    发明授权
    Damascene process for use in fabricating semiconductor structures having micro/nano gaps 有权
    用于制造具有微/纳米间隙的半导体结构的镶嵌工艺

    公开(公告)号:US07256107B2

    公开(公告)日:2007-08-14

    申请号:US11121690

    申请日:2005-05-03

    Abstract: In fabricating a microelectromechanical structure (MEMS), a method of forming a narrow gap in the MEMS includes a) depositing a layer of sacrificial material on the surface of a supporting substrate, b) photoresist masking and at least partially etching the sacrificial material to form at least one blade of sacrificial material, c) depositing a structural layer over the sacrificial layer, and d) removing the sacrificial layer including the blade of the sacrificial material with a narrow gap remaining in the structural layer where the blade of sacrificial material was removed.

    Abstract translation: 在制造微机电结构(MEMS)中,在MEMS中形成窄间隙的方法包括:a)在支撑衬底的表面上沉积牺牲材料层,b)光致抗蚀剂掩模并且至少部分蚀刻牺牲材料以形成 至少一个牺牲材料刀片,c)在所述牺牲层上沉积结构层,以及d)去除包括所述牺牲材料刀片的所述牺牲层,其中所述牺牲材料刀片被去除的所述结构层中残留有窄间隙 。

    Method for fabricating a structure for a microelectromechanical system (MEMS) device
    208.
    发明授权
    Method for fabricating a structure for a microelectromechanical system (MEMS) device 有权
    用于制造微机电系统(MEMS)装置的结构的方法

    公开(公告)号:US07250315B2

    公开(公告)日:2007-07-31

    申请号:US10941042

    申请日:2004-09-14

    Applicant: Mark W. Miles

    Inventor: Mark W. Miles

    Abstract: The invention provides a microfabrication process which may be used to manufacture a MEMS device. In one embodiment, the process comprises depositing at least one first layer on a substrate. The process further comprises patterning said first layer to define at least a first portion of said microelectromechanical system device. The process further comprises depositing a second layer on said first layer. The process further comprises patterning said second layer using said first layer as a photomask. The process further comprises developing said second layer to define at least a second portion of the microelectromechanical system device.

    Abstract translation: 本发明提供了可用于制造MEMS装置的微细加工方法。 在一个实施例中,该方法包括在衬底上沉积至少一个第一层。 该方法还包括图案化所述第一层以限定所述微机电系统装置的至少第一部分。 该方法还包括在所述第一层上沉积第二层。 该方法还包括使用所述第一层作为光掩模来图案化所述第二层。 该方法还包括显影所述第二层以限定微机电系统装置的至少第二部分。

    Devices having vertically-disposed nanofabric articles and methods of making the same
    210.
    发明申请
    Devices having vertically-disposed nanofabric articles and methods of making the same 有权
    具有垂直布置的纳米制品的装置及其制造方法

    公开(公告)号:US20070018260A1

    公开(公告)日:2007-01-25

    申请号:US11158544

    申请日:2005-06-22

    Abstract: Electro-mechanical switches and memory cells using vertically-disposed nanofabric articles and methods of making the same are described. An electro-mechanical device, includes a structure having a major horizontal surface and a channel formed therein. A conductive trace is in the channel; and a nanotube article vertically suspended in the channel, in spaced relation to a vertical wall of the channel. The article is electro-mechanically deflectable in a horizontal direction toward the conductive trace. Under certain embodiments, the vertically suspended extent of the nanotube article is defined by a thin film process. Under certain embodiments, the vertically suspended extent of the nanotube article is about 50 nanometers or less. Under certain embodiments, the nanotube article is clamped with a conducting material disposed in porous spaces between some nanotubes of the nanotube article. Under certain embodiments, the nanotube article is formed from a porous nanofabric. Under certain embodiments, the nanotube article is electromechanically deflectable into contact with the conductive trace and the contact is either a volatile state or non-volatile state depending on the device construction. Under certain embodiments, the vertically oriented device is arranged into various forms of three-trace devices. Under certain embodiments, the channel may be used for multiple independent devices, or for devices that share a common electrode.

    Abstract translation: 描述了使用垂直布置的纳米制品的机电开关和存储单元及其制造方法。 机电装置包括具有主要水平表面和形成在其中的通道的结构。 通道中有导电迹线; 以及垂直悬挂在所述通道中的与所述通道的垂直壁成间隔开的纳米管制品。 该物品在水平方向上可电导向导电迹线偏转。 在某些实施方案中,纳米管制品的垂直悬浮程度由薄膜工艺限定。 在某些实施方案中,纳米管制品的垂直悬浮程度为约50纳米或更小。 在某些实施例中,纳米管制品被夹持在布置在纳米管制品的一些纳米管之间的多孔空间中的导电材料上。 在某些实施方案中,纳米管制品由多孔纳米纤维形成。 在某些实施例中,取决于器件结构,纳米管制品在机电上可偏转成与导电迹线接触,并且触点是易失性状态或非易失性状态。 在某些实施例中,垂直取向的装置被布置成各种形式的三轨迹装置。 在某些实施例中,信道可以用于多个独立设备,或者可以用于共享公共电极的设备。

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