公开(公告)号：US06423905B1

公开(公告)日：2002-07-23

申请号：US09562109

申请日：2000-05-01

Applicant: William L. Brodsky ,  Kevin T. Knadle ,  John M. Lauffer ,  Douglas O. Powell ,  David J. Russell

Inventor： William L. Brodsky ,  Kevin T. Knadle ,  John M. Lauffer ,  Douglas O. Powell ,  David J. Russell

IPC: H05K103

CPC classification number: H05K3/4688 ,  H05K1/0271 ,  H05K3/429 ,  H05K2201/0133 ,  H05K2201/0195

Abstract: A printed wiring board having a layered composite of metal planes and dielectric layers. At least one of the dielectric layers has a modulus lower than the modulus of the remaining dielectric material layers. A plating, extending through the layered composite, has a first land on a first external surface of the layered composite, a second land on a second external surface of the layered composite, and a barrel extending between the first land and the second land. The lower modulus dielectric material layer deforms during thermal excursions of the printed wiring board in such a way as to reduce the strains imposed on both the lands and the barrel of the plated through holes.

Abstract translation: 一种具有金属平面和电介质层的复合层的印刷电路板。 电介质层中的至少一个具有低于剩余介电材料层的模量的模量。 延伸穿过层状复合材料的电镀具有在层状复合材料的第一外表面上的第一焊盘，层状复合材料的第二外表面上的第二焊盘，以及在第一焊盘和第二焊盘之间延伸的镜筒。 在印刷线路板的热偏移期间，较低模量的介电材料层变形，以便减小施加在电镀通孔的焊盘和圆筒上的应变。

公开(公告)号：US06399896B1

公开(公告)日：2002-06-04

申请号：US09525379

申请日：2000-03-15

Applicant: Frank J. Downes, Jr. ,  Donald S. Farquhar ,  Robert M. Japp ,  William J. Rudik

Inventor： Frank J. Downes, Jr. ,  Donald S. Farquhar ,  Robert M. Japp ,  William J. Rudik

IPC: H05K116

CPC classification number: H05K3/326 ,  H05K1/0271 ,  H05K1/111 ,  H05K1/114 ,  H05K2201/0133 ,  H05K2201/0187 ,  H05K2201/10734 ,  H05K2203/0307

Abstract: Reliability of circuit packaging while accommodating larger chips and increased temperature excursions is achieved by use of compliant pads only at the locations of connections between packaging levels, preferably between a laminated chip carrier and a printed circuit board. The invention allows the coefficient of thermal expansion of the chip carrier to be economically well-matched to the CTE of the chip and accommodation of significant differences in CTEs of package materials to be accommodated at a single packaging level. The compliant pads are preferably of low aspect ratio which are not significantly deflected by accelerations and can be formed on a surface or recessed into it. Connections can be made through surface connections and/or plated through holes. Connection enhancements such as solder wettable surfaces or dendritic textures are provided in a conductive metal or alloy layer over a compliant rubber or elastomer layer which may be conductive or non-conductive.

Abstract translation: 通过仅在封装层之间的连接位置（优选在层压芯片载体和印刷电路板之间）使用柔性焊盘来实现电路封装的可靠性，同时容纳更大的芯片和增加的温度漂移。 本发明允许芯片载体的热膨胀系数与芯片的CTE经济地良好匹配，并且可以容纳在单个封装层面上容纳的封装材料的CTE的显着差异。 柔性衬垫优选地具有低纵横比，其不被加速度显着偏转，并且可以形成在表面上或凹入其中。 可以通过表面连接和/或电镀通孔进行连接。 在导电金属或合金层中的柔性橡胶或弹性体层上提供诸如焊料可润湿表面或树枝状织构的连接增强，其可以是导电的或不导电的。

公开(公告)号：US06370032B1

公开(公告)日：2002-04-09

申请号：US09399209

申请日：1999-09-17

Applicant: Thomas H. DiStefano ,  John W. Smith ,  Zlata Kovac ,  Konstantine Karavakis

Inventor： Thomas H. DiStefano ,  John W. Smith ,  Zlata Kovac ,  Konstantine Karavakis

IPC: H05K118

CPC classification number: H01L24/81 ,  H01L21/4839 ,  H01L21/563 ,  H01L23/22 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/642 ,  H01L24/72 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/83136 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/3025 ,  H05K1/118 ,  H05K3/361 ,  H05K3/4084 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2203/063 ,  Y10T29/49124 ,  Y10T29/49144 ,  Y10T29/49149

Abstract: The present invention provides an interconnection scheme having complaint contacts arranged in an array to connect conductive surfaces on a microelectronic device and a supporting substrate, such as a printed circuit board. This invention accommodates for the difference in thermal coefficients of expansion between the device and the supporting substrate. Typically, an area array of conductive contact pads are connected into rows by conductive leads on a flexible, intermediate substrate. Each of the conductive leads bridges a bonding hole in the intermediate substrate which is situated between successive contact pads. Each of the conductive leads further has a frangible portion within or near each bonding hole. A stand-off between the intermediate substrate and the device is create by compliant dielectric pads, typically composed of an elastomer material, positioned under each contact pad. The frangible portions allow the leads to be cleanly broken, bent and secured into electrical contact with chip contacts on the device. Each of these connections may be supported by a compliant layer, typically an uncured elastomer which fills the area around the compliant dielectric pads and is then cured.

Abstract translation: 本发明提供了一种具有布置成阵列中的投诉触点的互连方案，以连接微电子装置上的导电表面和诸如印刷电路板的支撑基板。 本发明适用于器件和支撑衬底之间的热膨胀系数的差异。 通常，导电接触焊盘的区域阵列通过柔性中间衬底上的导电引线连接成行。 每个导电引线桥接位于连续接触焊盘之间的中间衬底中的结合孔。 每个导电引线还在每个结合孔内或附近还具有易碎部分。 中间基板和器件之间的间隔是通过位于每个接触垫下方的通常由弹性体材料组成的柔性介电垫产生的。 易碎部分允许引线被干净地折断，弯曲并固定成与设备上的芯片触点电接触。 这些连接中的每一个可以由柔性层（通常为填充柔性介电垫周围区域的未固化的弹性体）支撑，然后固化。

公开(公告)号：US20020012780A1

公开(公告)日：2002-01-31

申请号：US09897225

申请日：2001-07-02

Applicant: Shin-Etsu Chemical Co., Ltd.

Inventor： Masahiro Yuyama ,  Hitoshi Arai ,  Yoshitsugu Eguchi

IPC: B32B007/02 ,  B32B015/08 ,  B32B015/06

CPC classification number: H05K1/028 ,  B32B15/08 ,  B32B15/20 ,  H05K1/0346 ,  H05K3/386 ,  H05K2201/0133 ,  H05K2201/0154 ,  H05K2201/0355 ,  Y10S428/901 ,  Y10T428/24975 ,  Y10T428/26 ,  Y10T428/31511 ,  Y10T428/31515 ,  Y10T428/31522 ,  Y10T428/31529 ,  Y10T428/31699 ,  Y10T428/31707 ,  Y10T428/31721 ,  Y10T428/31935

Abstract: The subject matter of the invention is a base sheet for the preparation of a flexible printed circuit board which is a three-layered laminate consisting of (a) an electrically insulating film of a plastic resin such as a polyimide, (b) an epoxy resin-based adhesive layer and (c) a copper foil bonded to the film (a) with intervention of the adhesive layer (b). The base sheet can exhibit excellent performance in respect of peeling resistance, soldering heat resistance, dimensional stability and solvent resistance as well as workability into a printed circuit board only when each of the layers (a), (b) and (c) has a specified thickness in a narrow range of 10-30 nullm, 5-15 nullm and 5-15 nullm, respectively.

Abstract translation: 本发明的主题是用于制备柔性印刷电路板的基片，该柔性印刷电路板是由（a）塑料树脂如聚酰亚胺的电绝缘膜，（b）环氧树脂 的粘合剂层和（c）通过粘合剂层（b）的介入粘合到膜（a）上的铜箔。 仅当各层（a），（b）和（c）具有（a），（b）和（c））时，基片可以在抗剥离性，焊接耐热性，尺寸稳定性和耐溶剂性以及对印刷电路板的加工性方面表现出优异的性能 指定厚度分别在10-30 mum，5-15 mum和5-15 mum的窄范围内。

公开(公告)号：US20020011353A1

公开(公告)日：2002-01-31

申请号：US09960164

申请日：2001-09-20

Inventor： Sundar Kamath ,  David Chazan ,  Jan I. Strandberg ,  Solomon I. Beilin

IPC: H05K001/03

CPC classification number: H05K1/0271 ,  H01L23/3735 ,  H01L23/5383 ,  H01L2224/16225 ,  H01L2924/00014 ,  H05K1/0272 ,  H05K2201/0133 ,  H05K2201/068 ,  H05K2201/09109 ,  H05K2201/10416 ,  H05K2201/10734 ,  H01L2224/0401

Abstract: A wiring substrate with reduced thermal expansion stress. A wiring substrate, such as a laminated PWB, thin film circuit, lead frame, or chip carrier accepts an integrated circuit, such as a die, a flip chip, or ball grid array package. The wiring substrate has a thermal expansion stress reduction insert, void, or constructive void in a thermal expansion stress region proximate to the integrated circuit. The thermal expansion stress reduction insert or void may extend a selected distance from the edge or edges of the integrated circuit attachment area. The thermal expansion stress reduction insert or void improves the flexibility of the wiring substrate in the region that is joined to the integrated circuit, thus reducing thermal stress between components of the wiring substrate-integrated circuit assembly. In another embodiment, layers of a laminated wiring substrate are intentionally not bonded beneath the chip attach area, thus allowing greater flexibility of the upper layer of the laminate.

Abstract translation: 具有降低的热膨胀应力的布线基板。 诸如层叠PWB，薄膜电路，引线框架或芯片载体的布线基板可以接受诸如管芯，倒装芯片或球栅阵列封装的集成电路。 布线基板在靠近集成电路的热膨胀应力区域中具有热膨胀应力减小插入件，空隙或构造空隙。 热膨胀应力减小插入物或空隙可以从集成电路连接区域的边缘或边缘延伸选定的距离。 热膨胀应力减小插入物或空隙提高了接合到集成电路的区域中的布线基板的柔性，从而降低了布线基板集成电路组件的部件之间的热应力。 在另一个实施例中，层叠布线基板的层有意地不粘合在芯片附着区域下方，从而允许层压体的上层更大的灵活性。

公开(公告)号：US06328844B1

公开(公告)日：2001-12-11

申请号：US09230017

申请日：1999-08-24

Applicant: Itsuo Watanabe ,  Kenzo Takemura ,  Osamu Watanabe ,  Naoyuki Shiozawa ,  Akira Nagai ,  Kazuyoshi Kojima ,  Toshiaki Tanaka ,  Kazunori Yamamoto

Inventor： Itsuo Watanabe ,  Kenzo Takemura ,  Osamu Watanabe ,  Naoyuki Shiozawa ,  Akira Nagai ,  Kazuyoshi Kojima ,  Toshiaki Tanaka ,  Kazunori Yamamoto

IPC: C09J16302

CPC classification number: H01L24/29 ,  C08L2666/02 ,  C09J163/00 ,  H01B1/22 ,  H01L24/83 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29386 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K1/0271 ,  H05K3/323 ,  H05K2201/0133 ,  Y10T29/49128 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2924/05442 ,  H01L2924/05432 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/48

Abstract: A heat-active adhesive for a connecting circuit which is used for electrically connecting circuit electrodes facing each other in the pressing direction by heating and pressing the electrodes. The adhesive has an elastic modulus of 100-2,000 MPa at 40° C. after adhesion. The adhesive can contain at least an epoxy resin, acrylic rubber, and a latent curing agent. An acrylic rubber having a glycidryl ether group as a molecule is preferably used as the acrylic rubber.

Abstract translation: 一种用于连接电路的热活性粘合剂，其用于通过加热和加压电极来将电路电极沿按压方向彼此面对地电连接。 粘合剂在粘合后在40℃下的弹性模量为100-2000MPa。 粘合剂可以含有至少一种环氧树脂，丙烯酸橡胶和潜在性固化剂。 作为丙烯酸橡胶，优选使用缩水甘油醚基作为分子的丙烯酸橡胶。

公开(公告)号：US06319012B1

公开(公告)日：2001-11-20

申请号：US09230019

申请日：1999-01-18

Applicant: Juergen Moessinger ,  Walter Grote

Inventor： Juergen Moessinger ,  Walter Grote

IPC: H01R4100

CPC classification number: H05K1/028 ,  H05K1/0271 ,  H05K1/0281 ,  H05K1/0283 ,  H05K2201/0133 ,  H05K2201/09109 ,  H05K2201/09281 ,  H05K2201/2009

Abstract: The invention relates to a flexible strip conductor connection, by means of which electrical connections between an electrical device (2) and an external component (1) can be made, wherein the strip conductors (8) are located in or on a flexible foil (3), which is clamped on the electrical device (2) as well as the external component (1). In a predetermined area in the course of the strip conductors (8), the flexible foil (3) has a loop (6), which can be filled with an elastic material perpendicularly in relation to the foil plane, or the strip conductors (8) in the plane of the foil respectively have a loop-shaped deviation (9) perpendicularly to the course of strip conductor.

Abstract translation: 本发明涉及一种柔性带状导体连接件，通过该柔性带状导体连接可以制造电气装置（2）和外部部件（1）之间的电连接，其中带状导体（8）位于柔性箔片 3），其被夹紧在电气设备（2）以及外部部件（1）上。 在带状导体（8）的过程中的预定区域中，柔性箔（3）具有环（6），其可以相对于箔平面垂直地填充有弹性材料或带状导体（8） ）分别具有垂直于带状导体的过程的环形偏差（9）。

公开(公告)号：US06309502B1

公开(公告)日：2001-10-30

申请号：US09446928

申请日：1999-12-29

Applicant: Yuji Hiroshige ,  Koji Ito

Inventor： Yuji Hiroshige ,  Koji Ito

IPC: C08G59100

CPC classification number: H05K3/323 ,  C08G59/3209 ,  C08G59/68 ,  C08L63/00 ,  H01R4/04 ,  H05K2201/0133 ,  Y10T29/4913 ,  Y10T428/12014 ,  Y10T428/2857 ,  Y10T428/287

Abstract: To produce a conductive epoxy resin composition with improvement in the characteristics of rapid-curability, heat resistance and moisture resistance, adhesion reliability, storage properties and low-temperature curability that can be used effectively for production of conductive adhesive films. The conductive epoxy resin composition comprises an alicyclic epoxy resin, optional diols, a styrenic thermoplastic elastomer with an epoxy group in the molecule, an ultraviolet activated cationic polymerization catalyst, an optional tackifier having an aromatic ring in the molecule, and conductive particles.

Abstract translation: 制造导电性环氧树脂组合物，可以有效地用于制造导电性粘合膜，具有快速固化性，耐热性，耐湿性，粘合可靠性，保存性，低温固化性等特性的改善。 导电性环氧树脂组合物包含脂环族环氧树脂，任选的二醇，分子中具有环氧基的苯乙烯类热塑性弹性体，紫外线活化阳离子聚合催化剂，分子中具有芳香环的任选的增粘剂和导电性粒子。

公开(公告)号：US20010027874A1

公开(公告)日：2001-10-11

申请号：US09826512

申请日：2001-04-05

Inventor： Michio Horiuchi ,  Takashi Kurihara

IPC: H05K001/03 ,  B32B007/02

CPC classification number: H05K3/4694 ,  H01L23/3735 ,  H01L23/49822 ,  H01L23/49894 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K1/0271 ,  H05K1/114 ,  H05K3/4652 ,  H05K3/4655 ,  H05K2201/0133 ,  H05K2201/0187 ,  H05K2201/0195 ,  H05K2201/09972 ,  Y10T428/24942 ,  Y10T428/2495 ,  H01L2924/00014

Abstract: A wiring substrate equipped with a rerouted wiring having one end connected to an electronic-part mounting pad for electrically connecting an electronic part and another end connected to an external-connection terminal. In the wiring substrate, a low-elasticity underlayer made of a material having a lower modulus of elasticity than that of a base material of the wiring substrate is disposed between the base material of the wiring substrate and each of the electronic-part mounting pad and the rerouted wiring. A method of manufacturing the wiring substrate and a semiconductor device using the wiring substrate are also disclosed.

Abstract translation: 一种布线基板，其配备有重新布线的布线，其一端连接到用于电连接电子部件的电子部件安装焊盘和连接到外部连接端子的另一端。 在布线基板中，在布线基板的基材和电子部件安装用基板的每一个之间配置有由比布线基板的基材低的弹性模量的材料制成的低弹性底层， 重新布线。 还公开了制造布线基板的方法和使用该布线基板的半导体器件。

公开(公告)号：US20010025414A1

公开(公告)日：2001-10-04

申请号：US09738855

申请日：2000-12-18

Inventor： Toshiyuki Toyoshima ,  Satoshi Yanaura ,  Yasuo Furuhashi ,  Hirofumi Fujioka

IPC: H05K003/02 ,  H05K003/10

CPC classification number: H05K3/4069 ,  H05K3/0023 ,  H05K3/4661 ,  H05K2201/0133 ,  H05K2201/0162 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/09581 ,  H05K2201/096 ,  H05K2203/1461 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: Method of producing a multi-layered wiring board comprising the steps of subjecting the photosensitive resin to exposure- and development-treatment to form the holes having a predetermined size and shape; depositing and forming the curable resin to the insulating layer having the holes formed therein in such a manner as to bury the holes, and conducting heat-treatment to form the cured thin film of the curable resin on the surface of the insulating layer; and so removing the curable resin as to leave the cured thin film to obtain the via-holes having the reduced opening size by the cured thin film.

Abstract translation: 制造多层布线板的方法包括以下步骤：对感光树脂进行曝光和显影处理以形成具有预定尺寸和形状的孔; 在形成有孔的绝缘层上沉积和形成固化树脂，以便掩埋孔，进行热处理以在绝缘层的表面上形成固化树脂的固化薄膜; 从而除去固化树脂以留下固化的薄膜，以通过固化的薄膜获得具有减小的开口尺寸的通孔。