Circuit board
    211.
    发明申请

    公开(公告)号:US20060109635A1

    公开(公告)日:2006-05-25

    申请号:US11230336

    申请日:2005-09-20

    Applicant: Shunsuke Eiki

    Inventor: Shunsuke Eiki

    CPC classification number: H01G4/012 H05K1/162 H05K2201/09236 H05K2201/09881

    Abstract: A circuit board including a capacitor structure formed on a surface of an insulating substrate, wherein the capacitor structure includes paired linear conductive layers arranged on the surface of the insulating substrate, parallel to each other with a predetermined distance between them, and a dielectric material filled in a groove defined by those surfaces of the paired linear conductive layers which face each other and the surface of the insulating substrate.

    Compact non-linear geometry electromagnetic coupler for use with digital transmission systems
    214.
    发明授权
    Compact non-linear geometry electromagnetic coupler for use with digital transmission systems 失效
    紧凑型非线性几何电磁耦合器,用于数字传输系统

    公开(公告)号:US07002430B2

    公开(公告)日:2006-02-21

    申请号:US10449215

    申请日:2003-05-30

    Abstract: A compact electromagnetic coupler for use with digital transmission system is described. In one embodiment, the apparatus includes a first transmission structure, including a portion having a geometry. A second transmission structure having the geometry and positioned proximate the portion of the first transmission line structure having the geometry to form a compact electromagnetic coupler with the first transmission structure a geometry of the electromagnetic coupler to enable placement within a footprint of a standard card connector. The compact electromagnetic coupler so formed enables reconstruction of the logical state and timing of a signal transmitted along the first transmission structure.

    Abstract translation: 描述了一种用于数字传输系统的小型电磁耦合器。 在一个实施例中,该装置包括第一传输结构,其包括具有几何形状的部分。 第二传输结构具有几何形状并且靠近第一传输线结构的具有几何形状的部分定位,以形成具有第一传输结构的小型电磁耦合器,该电磁耦合器的几何形状能够放置在标准卡连接器的覆盖区内。 这样形成的小型电磁耦合器能够重建沿着第一传输结构传输的信号的逻辑状态和定时。

    Center-tap termination circuit and printed circuit board having the same
    215.
    发明授权
    Center-tap termination circuit and printed circuit board having the same 失效
    中心抽头终端电路和具有相同功能的印刷电路板

    公开(公告)号:US06995629B2

    公开(公告)日:2006-02-07

    申请号:US10695732

    申请日:2003-10-28

    Abstract: A center-tap termination circuit which includes two resistors having the same resistance, which are serially connected between forward and return transmission lines, where the forward and return transmission lines constitute a differential signal transmission line. A capacitor is connected between a connector that interconnects the two resistors and a GND of 6 a printed circuit board. The forward and return transmission lines are substantially equidistant from each other along their lengths. The resistors and the capacitor are arranged outside the forward and return transmission lines. The connector is provided intersecting, in three-dimensional space, the forward and return transmission lines, such as being formed by a jumper bridging the two lines, or by being formed on a different layer of a multilayer printed circuit board. Variations in the differential impedance are suppressed, and the transmission return/transmission forward characteristics of differential signals are substantially matched. The differential impedance matching is achieved, and high-quality signal waveforms are maintained. Not only noise emitted due to differential mode current components, but also noise emitted due to common mode current components are suppressed.

    Abstract translation: 中心抽头终端电路,其包括具有相同电阻的两个电阻,串联连接在正向和返回传输线之间,其中正向和返回传输线构成差分信号传输线。 电容器连接在连接两个电阻器的连接器和印刷电路板的GND之间。 前进和后退传输线沿其长度基本上等距离。 电阻器和电容器布置在正向和返回传输线的外部。 连接器在三维空间中被提供在正向和返回传输线上,例如由跨接两条线的跨接线形成,或者通过形成在多层印刷电路板的不同层上。 抑制差分阻抗的变化,差分信号的发送返回/发送正向特性基本上匹配。 实现了差分阻抗匹配,并保持了高质量的信号波形。 不仅由于差分电流分量而产生的噪声,而且由共模电流分量引起的噪声也被抑制。

    Signal bus arrangement
    216.
    发明申请

    公开(公告)号:US20060020734A1

    公开(公告)日:2006-01-26

    申请号:US11231748

    申请日:2005-09-22

    Inventor: Hidehiro Takata

    CPC classification number: G06F13/409 H05K1/0216 H05K1/0298 H05K2201/09236

    Abstract: In a two-dimensional layout, the bus signal lines are arranged such that adjacent signal lines are of different buses. The different buses transmit signals changed at different timings. The signal lines of the same buses transmit signals changed substantially at the same timing. Thus, cross-talk noise between signal lines can be reduced without widening a bus line pitch.

    Universal energy conditioning interposer with circuit architecture
    217.
    发明申请
    Universal energy conditioning interposer with circuit architecture 失效
    具有电路架构的通用能量调节插入器

    公开(公告)号:US20050286198A1

    公开(公告)日:2005-12-29

    申请号:US11169926

    申请日:2005-06-30

    Abstract: The present invention relates to an interposer substrate for interconnecting between active electronic componentry such as but not limited to a single or multiple integrated circuit chips in either a single or a combination and elements that could comprise of a mounting substrate, substrate module, a printed circuit board, integrated circuit chips or other substrates containing conductive energy pathways that service an energy utilizing load and leading to and from an energy source. The interposer will also possess a multi-layer, universal multi-functional, common conductive shield structure with conductive pathways for energy and EMI conditioning and protection that also comprise a commonly shared and centrally positioned conductive pathway or electrode of the structure that can simultaneously shield and allow smooth energy interaction between grouped and energized conductive pathway electrodes containing a circuit architecture for energy conditioning as it relates to integrated circuit device packaging. The invention can be employed between an active electronic component and a multilayer circuit card. A method for making the interposer is not presented and can be varied to the individual or proprietary construction methodologies that exist or will be developed.

    Abstract translation: 本发明涉及用于将有源电子元件(例如但不限于单个或多个)单个或多个集成电路芯片互连的插入器基板,以及可以包括安装基板,基板模块,印刷电路 板,集成电路芯片或其他包含导电能量路径的基板,其能够利用负载和通向能量源的能量。 插入器还将具有多层通用多功能通用导电屏蔽结构,其具有用于能量和EMI调节和保护的导电路径,其还包括可共同屏蔽的结构的共同共享和中心定位的导电路径或电极, 允许包含用于能量调节的电路架构的组合和通电的导电路径电极之间的平滑的能量相互作用,因为它涉及集成电路器件封装。 本发明可以用于有源电子部件和多层电路卡之间。 不提供制作插入器的方法,并且可以根据现有或将要开发的个人或专有的施工方法来改变。

    Transmission line parasitic element discontinuity cancellation

    公开(公告)号:US06980063B2

    公开(公告)日:2005-12-27

    申请号:US10910028

    申请日:2004-08-03

    Abstract: A discontinuity, such as a via, in a signal transmission line can introduce a parasitic element that affects the signal transmission. The method in accordance with embodiments of the present invention are directed to counteracting the transmission line parasitic element discontinuity. The method includes determining the amount of parasitic capacitance or inductance that is introduced at a portion of the transmission line, such as by the via. A suitable amount of delay is introduced to the transmission line by way of correction impedance in order to counteract the affects of the parasitic element. The delay is calculated taking into account at least in part the correction impedance and the parasitic element effect. The correction impedance is suitably added to a portion of the transmission line at which the parasitic element is present.

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