公开(公告)号：US20130256012A1

公开(公告)日：2013-10-03

申请号：US13906566

申请日：2013-05-31

Applicant: Shinko Electric Industries Co., Ltd.

Inventor： Kotaro Kodani

IPC: H05K1/09

CPC classification number: H05K1/09 ,  H01L23/055 ,  H01L23/367 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/3511 ,  H05K1/113 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/4682 ,  H05K2201/094 ,  H05K2201/09472 ,  H05K2203/0361 ,  H05K2203/1476 ,  H01L2224/0401

Abstract: There is provided a wiring substrate. The wiring substrate includes: an insulating layer; first electrode pads having first exposed surfaces, the first exposed surfaces being exposed from the insulating layer; and second electrode pads having second exposed surfaces, the second exposed surfaces being exposed from the insulating layer. There is a level difference between the first exposed surfaces and the second exposed surfaces.

Abstract translation: 提供了布线基板。 布线基板包括：绝缘层; 第一电极焊盘具有第一暴露表面，第一暴露表面从绝缘层露出; 第二电极焊盘具有第二暴露表面，第二暴露表面从绝缘层露出。 在第一暴露表面和第二暴露表面之间存在水平差。

公开(公告)号：US08519271B2

公开(公告)日：2013-08-27

申请号：US12485615

申请日：2009-06-16

Applicant: Harutoshi Oikawa ,  Kiyohiro Kimura

Inventor： Harutoshi Oikawa ,  Kiyohiro Kimura

IPC: H05K1/00

CPC classification number: H05K3/361 ,  H05K3/281 ,  H05K3/323 ,  H05K3/421 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2201/097 ,  H05K2201/09781 ,  H05K2201/0979 ,  H05K2203/1572

Abstract: A flexible printed circuit includes: a flexible substrate extending from a first end section to a second end section, and having an opening or a notch in proximity to the first end section; a first wiring layer extending from the first end section to the second end section so as to avoid the opening or the notch; a second wiring layer extending from the first end section to the second end section so as to block the opening or the notch; a first conductive member being formed opposed to the flexible substrate in relation to the first wiring layer and at least in proximity to the first end section in a region opposed to the first wiring layer, and being electrically connected to the first wiring layer; and a second conductive member electrically connected to the second wiring layer via the opening or the notch.

Abstract translation: 柔性印刷电路包括：柔性基板，其从第一端部延伸到第二端部，并且具有靠近第一端部的开口或凹口; 第一布线层，从第一端部延伸到第二端部，以避免开口或凹口; 第二布线层，其从所述第一端部延伸到所述第二端部，以阻挡所述开口或所述凹口; 第一导电构件，其与所述柔性基板相对于所述第一布线层形成，并且在与所述第一布线层相对的区域中至少靠近所述第一端部，并且电连接到所述第一布线层; 以及通过所述开口或所述凹口与所述第二布线层电连接的第二导电构件。

公开(公告)号：US08476919B2

公开(公告)日：2013-07-02

申请号：US12712734

申请日：2010-02-25

Applicant: Gunsei Kimoto

Inventor： Gunsei Kimoto

IPC: G01R31/02 ,  G01R1/067

CPC classification number: G01R31/2886 ,  G01R1/06727 ,  H05K1/0268 ,  H05K1/11 ,  H05K1/144 ,  H05K3/46 ,  H05K2201/041 ,  H05K2201/09472 ,  H05K2201/096 ,  H05K2201/09709

Abstract: A prober unit in which probes are brought into contact with to-be-tested semiconductor chips to establish electrical connection between the semiconductor chips and a test unit via the probes. A probe assembly and a plurality of wiring boards are prepared, the probe assembly being constituted by integrated regularly-arranged multiple probe groups including output terminals connected directly to the probes, and each of the wiring boards including wiring adhering to a surface of a non-conductive film; and an n-th row of an output terminal group of the probe assembly is brought into contact with a land group provided at an end of an n-th wiring board, and a wiring terminal provided at the other end of the n-th wiring board is connected to one of a wiring board of the test unit and a connector to establish electrical connection between the to-be-tested semiconductor chips and the test unit.

Abstract translation: 探针单元，其中探针与待测试的半导体芯片接触，以通过探针在半导体芯片和测试单元之间建立电连接。 探针组件和多个布线板被准备好，该探头组件由包括直接连接在探头上的输出端子的整体规则排列的多个探针组构成，并且每个布线板包括附着在非导体组件的表面上的布线， 导电膜; 并且探针组件的输出端子组的第n行与设置在第n布线板的端部的平台组接触，并且设置在第n布线的另一端的布线端子 板连接到测试单元的布线板之一和连接器，以在待测半导体芯片和测试单元之间建立电连接。

公开(公告)号：US20130083490A1

公开(公告)日：2013-04-04

申请号：US13626229

申请日：2012-09-25

Applicant: STMicroelectronics S.r.l.

Inventor： Cristiano Gianluca Stella ,  Rosalba Cacciola

IPC: H05K1/02 ,  H05K7/20 ,  H05K13/04 ,  H05K7/06

CPC classification number: H05K3/3468 ,  H01L2224/73203 ,  H01L2924/13091 ,  H05K1/111 ,  H05K3/305 ,  H05K2201/09381 ,  H05K2201/09472 ,  H05K2201/09745 ,  H05K2203/044 ,  H01L2924/00012 ,  H01L2924/00

Abstract: An electronic board includes conducting traces having an upper surface at least partially sunken with respect to a gluing surface of the board. A surface mount technology electronic device for mounting to the board includes insulating windows that define gluing sites within one or more pins. An electronic system is formed by one or more of such surface mount technology electronic devices mounted to electronic board. The devices are attached using a wave soldering technique that flows through channels formed by the sunken conductive traces.

Abstract translation: 电子板包括具有相对于板的胶合表面至少部分凹陷的上表面的导电迹线。 用于安装到板上的表面贴装技术电子器件包括限定一个或多个引脚内的胶合位置的绝缘窗。 电子系统由安装到电子板的一种或多种这样的表面贴装技术电子装置形成。 这些装置使用波峰焊技术连接，该技术流过由凹陷的导电迹线形成的通道。

公开(公告)号：US08399779B2

公开(公告)日：2013-03-19

申请号：US12557847

申请日：2009-09-11

Applicant: Michiro Ogawa ,  Kazuhiro Kobayashi ,  Kentaro Kaneko

Inventor： Michiro Ogawa ,  Kazuhiro Kobayashi ,  Kentaro Kaneko

IPC: H05K1/11

CPC classification number: H05K3/188 ,  H01L21/563 ,  H01L21/568 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/16 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81385 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/12042 ,  H01L2924/15311 ,  H05K1/0313 ,  H05K1/09 ,  H05K1/113 ,  H05K3/205 ,  H05K3/244 ,  H05K3/282 ,  H05K3/383 ,  H05K3/4682 ,  H05K2201/09472 ,  H05K2201/09563 ,  H05K2203/0361 ,  Y10T29/4916 ,  Y10T156/10 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A wiring board includes a pad exposed from an opening portion of an outermost insulating layer. The pad includes: a first metal layer a surface of which is exposed from the wiring board; a second metal layer provided on the first metal layer and formed of a material effective in preventing a metal contained in a via inside the board from diffusing into the first metal layer; and a third metal layer provided between the second metal layer and the via, and formed of a material harder to be oxidized than that of the second metal layer. The thickness of the third metal layer is relatively thick, and is preferably selected to be three times or greater than a thickness of the second metal layer. A side surface of the third metal layer and a surface of the third metal layer to which the via is to be connected are roughed.

Abstract translation: 布线板包括从最外绝缘层的开口部分露出的焊盘。 焊盘包括：第一金属层，其表面从布线板露出; 第二金属层，设置在第一金属层上，由有效防止基板内的通孔内的金属扩散入第一金属层的材料形成; 以及设置在第二金属层和通孔之间的第三金属层，并且由比第二金属层更难被氧化的材料形成。 第三金属层的厚度相对较厚，优选选择为第二金属层的厚度的三倍以上。 第三金属层的侧表面和要连接通孔的第三金属层的表面被粗糙化。

公开(公告)号：US20120292091A1

公开(公告)日：2012-11-22

申请号：US13563258

申请日：2012-07-31

Applicant: Sang-Guk Han ,  Seok-Joon Moon

Inventor： Sang-Guk Han ,  Seok-Joon Moon

IPC: H05K1/11

CPC classification number: H01L25/0657 ,  G01R31/2808 ,  G01R31/2818 ,  G11C5/02 ,  G11C5/025 ,  G11C5/06 ,  G11C29/04 ,  G11C29/12 ,  G11C29/56 ,  G11C29/56016 ,  G11C2029/5602 ,  H01L22/30 ,  H01L22/32 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/538 ,  H01L24/09 ,  H01L24/48 ,  H01L24/49 ,  H01L24/80 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/0912 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4912 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01068 ,  H01L2924/181 ,  H05K1/0268 ,  H05K1/111 ,  H05K1/117 ,  H05K1/181 ,  H05K3/002 ,  H05K3/245 ,  H05K3/28 ,  H05K3/288 ,  H05K3/323 ,  H05K2201/0187 ,  H05K2201/035 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/099 ,  H05K2201/10159 ,  H05K2203/162 ,  Y10T29/49117 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be coupled with an external device and a plurality of bypass pads for testing an electric circuit. The external pads are exposed and at least one of the plurality of bypass pads are not exposed from an outer surface of the PCB. A system using the electronic device and a method of testing an electronic device are also provided.

Abstract translation: 提供具有印刷电路板的电子设备。 在一个实施例中，印刷电路板包括要与外部装置耦合的多个外部焊盘和用于测试电路的多个旁路焊盘。 外部焊盘被暴露，并且多个旁路焊盘中的至少一个不暴露于PCB的外表面。 还提供了使用电子设备的系统和测试电子设备的方法。

公开(公告)号：US08143785B2

公开(公告)日：2012-03-27

申请号：US12398091

申请日：2009-03-04

Applicant: Tae-Kyoung Kang

Inventor： Tae-Kyoung Kang

IPC: H01J17/49

CPC classification number: H01J11/46 ,  H01J11/12 ,  H04N5/645 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/09036 ,  H05K2201/09472

Abstract: A plasma display device includes a plasma display panel for displaying an image by a gas discharge. A chassis base is attached to the plasma display panel and supports the plasma display panel. At least one printed circuit board is mounted on the a side of the chassis base at opposite the side supporting the plasma display panel. At least one flexible printed circuit connects electrodes of the plasma display panel and terminals of the printed circuit boards. An anisotropic conductive film is between the terminal of the printed circuit board and a terminal of the flexible printed circuit and connects the terminal of the printed circuit board and the terminal of the flexible printed circuit. The printed circuit board includes at least one dummy groove outside a region of the printed circuit board facing the flexible printed circuit.

Abstract translation: 等离子体显示装置包括用于通过气体放电显示图像的等离子体显示面板。 底座连接到等离子体显示面板并支撑等离子体显示面板。 至少一个印刷电路板安装在底座的一侧，与支撑等离子体显示面板的一侧相对。 至少一个柔性印刷电路连接等离子体显示面板的电极和印刷电路板的端子。 各向异性导电膜位于印刷电路板的端子和柔性印刷电路的端子之间，并连接印刷电路板的端子和柔性印刷电路的端子。 印刷电路板包括位于印刷电路板的面向柔性印刷电路的区域外的至少一个虚拟槽。

公开(公告)号：US08136714B2

公开(公告)日：2012-03-20

申请号：US13088727

申请日：2011-04-18

Applicant: Stephen L. Buchwalter ,  Peter A. Gruber ,  Paul A. Lauro ,  Jae-Woong Nah

Inventor： Stephen L. Buchwalter ,  Peter A. Gruber ,  Paul A. Lauro ,  Jae-Woong Nah

IPC: B23K5/00 ,  B23K20/08 ,  B22D41/00

CPC classification number: B23K3/0638 ,  B23K3/08 ,  B23K2101/42 ,  H01L21/4853 ,  H01L24/11 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H05K1/111 ,  H05K3/3457 ,  H05K2201/09472 ,  H05K2203/0126 ,  Y10T29/49826 ,  Y10T156/1062 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A portion of compliant material includes four walls defining a slot. The slot has a relatively large cross-section end in fluid communication with a solder reservoir, and also has a relatively small cross-section end opposed to the relatively large cross-section end. The slot has a generally elongate rectangular shape when viewed in plan, with a length perpendicular to a scan direction, a width, parallel to the scan direction, associated with the relatively large cross section end, and a width, parallel to the scan direction, associated with the relatively small cross section end. The slot is configured in the portion of compliant material such that the relatively small cross-section end of the slot normally remains substantially closed, but locally opens sufficiently to dispense solder from the reservoir when under fluid pressure and locally unsupported by a workpiece. Methods of operation and fabrication are also disclosed.

公开(公告)号：US20110285015A1

公开(公告)日：2011-11-24

申请号：US12831256

申请日：2010-07-07

Applicant: Chi Jung Song ,  In Soo Kang ,  Gi Jo Jung ,  Yun Mook Park ,  Eung Ju Lee ,  Jun Kyu Lee ,  Jung Won Lee

Inventor： Chi Jung Song ,  In Soo Kang ,  Gi Jo Jung ,  Yun Mook Park ,  Eung Ju Lee ,  Jun Kyu Lee ,  Jung Won Lee

IPC: H01L23/498 ,  H01L21/3205

CPC classification number: H01L24/13 ,  H01L23/13 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L24/93 ,  H01L2224/02126 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/0348 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/056 ,  H01L2224/10126 ,  H01L2224/11462 ,  H01L2224/11474 ,  H01L2224/1148 ,  H01L2224/1181 ,  H01L2224/1182 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/13016 ,  H01L2224/13017 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16237 ,  H01L2224/81385 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2224/93 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3436 ,  H05K3/3478 ,  H05K2201/09472 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2924/00 ,  H01L2224/1146

Abstract: There is provided a bump structure for a semiconductor device, comprising a metal post formed on and electrically connected to an electrode pad on a substrate, a solder post formed on the top surface of the metal post, said solder post having the same horizontal width as the metal post and the top surface of the solder post being substantially rounded, and an intermetallic compound layer disposed at the interface between the metal post and the solder post. An oxide layer formed on the solder post prevents solder post under reflow from being changed into a spherical shape. An intermetallic compound layer may be formed by an aging process at the interface between the metal post and the solder post. The bump structure can realize fine pitch semiconductor package without a short between neighboring bumps.

Abstract translation: 提供了一种用于半导体器件的凸块结构，包括形成在基板上的电极焊盘上并电连接到金属柱上的金属柱，形成在金属柱的顶表面上的焊料柱，所述焊料柱具有与 金属柱和焊料柱的顶表面基本上是圆形的，以及设置在金属柱和焊料柱之间的界面处的金属间化合物层。 形成在焊料柱上的氧化物层防止回流下的焊料柱变成球形。 可以通过在金属柱和焊料柱之间的界面处的老化过程形成金属间化合物层。 凸块结构可以实现精细的间距半导体封装，而不会在相邻凸块之间产生短路。

公开(公告)号：US20110242450A1

公开(公告)日：2011-10-06

申请号：US12908507

申请日：2010-10-20

Applicant: Takashi KASHIMURA ,  Tetsuya Yamazaki

Inventor： Takashi KASHIMURA ,  Tetsuya Yamazaki

IPC: G02F1/1335 ,  H01J1/62

CPC classification number: H05K3/3442 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/16 ,  H05K2201/09472 ,  H05K2201/10106 ,  Y02P70/613

Abstract: A highly reliable LED package mounting structure which can realize improvement in solder fatigue life at low costs is provided. An LED package has a light-emitting surface which is perpendicular to a mounting surface of a circuit board, comprises connection terminal portions on the side face or on the side face and the bottom face of the package, and is joined with the circuit board by soldering via the connection terminal portion. Furthermore, the shape of the solder is optimized by defining the relative position relation between the end of an electrode on the central side of the LED package on the bottom face of an LED package body and the end of a component mounting pad on the circuit board.

Abstract translation: 提供了一种高可靠性LED封装安装结构，可以以低成本实现焊料疲劳寿命的提高。 LED封装具有垂直于电路板的安装表面的发光表面，包括在封装的侧面或侧面和底面上的连接端子部分，并且通过电路板与电路板接合 通过连接端子部分进行焊接。 此外，通过在LED封装体的底面上的LED封装的中心侧的电极的端部与电路板上的部件安装焊盘的端部之间的相对位置关系来限定焊料的形状， 。