公开(公告)号：US20110034022A1

公开(公告)日：2011-02-10

申请号：US12905540

申请日：2010-10-15

Applicant: Junichi Nakamura

Inventor： Junichi Nakamura

IPC: H01L21/28

CPC classification number: H05K3/4007 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49822 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/0002 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15159 ,  H05K3/205 ,  H05K3/4644 ,  H05K2201/0367 ,  H05K2201/09045 ,  H05K2201/09481 ,  H05K2203/1536 ,  H01L2224/05552

Abstract: A semiconductor package and a fabrication method thereof are disclosed, whereby an environmental problem is solved by using external connection terminals or semiconductor element-mounting terminals containing a smaller amount of lead, while at the same time achieving a fine pitch of the terminals. The semiconductor package includes a board (20) including a plurality of insulating resin layers, semiconductor element-mounting terminals (18) formed on the uppermost surface of the board, and external connection terminals (12) formed on the bottom surface thereof. Each external connection terminal (12) is formed as a bump projected downward from the bottom surface of the package, and each bump is filled with the insulating resin (14) while the surface thereof is covered by a metal (16). Wiring 124), (26) including a conductor via (26a) electrically connect the metal of the metal layer 16 and the semiconductor element-mounting terminals (18).

Abstract translation: 公开了一种半导体封装及其制造方法，通过使用包含较少量的引线的外部连接端子或半导体元件安装端子，同时实现端子的精细间距来解决环境问题。 半导体封装包括：多个绝缘树脂层的基板（20），形成在基板的最上表面上的半导体元件安装端子（18）和形成在其底面上的外部连接端子（12）。 每个外部连接端子（12）形成为从封装的底表面向下突出的凸起，并且每个凸起都填充有绝缘树脂（14），同时其表面被金属（16）覆盖。 包括导体通孔（26a）的布线124），（26）将金属层16的金属与半导体元件安装端子（18）电连接。

公开(公告)号：US07871836B2

公开(公告)日：2011-01-18

申请号：US12546715

申请日：2009-08-25

Applicant: Chien-Cheng Yang ,  Chao-Kai Hsu ,  Jing-Yao Chang

Inventor： Chien-Cheng Yang ,  Chao-Kai Hsu ,  Jing-Yao Chang

IPC: H01L21/00

CPC classification number: H05K1/0203 ,  F21K9/00 ,  F21V33/0008 ,  F21Y2105/10 ,  F21Y2115/10 ,  H01L2924/0002 ,  H05K1/189 ,  H05K2201/09318 ,  H05K2201/09481 ,  H05K2201/10106 ,  H05K2201/10553 ,  H05K2203/049 ,  H01L2924/00

Abstract: The invention provides a method of manufacturing a bendable solid state lighting (SSL). A first metal layer and a second metal layer with a predetermined circuit layout pattern and structure region pattern are first deposited on both sides of a flexible substrate respectively, where a plurality of bonding pads is formed on the structure regions in the structure region pattern and is used for being electrically connected to the first metal layer. A plurality of LED dies is arranged on the structure regions in an array, and the LED dies are bonded with the corresponding bonding pads, such that the LED dies are conducted with current via the circuit layout of the first metal layer on the flexible substrate, so as to form a planar light source.

Abstract translation: 本发明提供一种制造可弯曲固态照明（SSL）的方法。 首先在柔性基板的两侧分别沉积具有预定电路布局图案和结构区域图案的第一金属层和第二金属层，其中在结构区域图案中的结构区域上形成多个接合焊盘，并且是 用于电连接到第一金属层。 多个LED管芯设置在阵列的结构区域上，并且LED管芯与对应的接合焊盘接合，使得LED管芯通过柔性基板上的第一金属层的电路布局传导， 以形成平面光源。

公开(公告)号：US07759795B2

公开(公告)日：2010-07-20

申请号：US11850576

申请日：2007-09-05

Applicant: Young-Lyong Kim ,  Young-Shin Choi ,  Jong-Gi Lee ,  Kun-Dae Yeom ,  Chul-Yong Jang ,  Hyun-Jong Woo

Inventor： Young-Lyong Kim ,  Young-Shin Choi ,  Jong-Gi Lee ,  Kun-Dae Yeom ,  Chul-Yong Jang ,  Hyun-Jong Woo

IPC: H01L23/48 ,  H01L23/52

CPC classification number: H05K3/4084 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15311 ,  H05K3/38 ,  H05K3/4007 ,  H05K3/4038 ,  H05K3/4647 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/0382 ,  H05K2201/09481 ,  H05K2201/0969 ,  H05K2201/2072 ,  H05K2203/0195 ,  H05K2203/0733 ,  Y10T29/49155 ,  H01L2224/0401

Abstract: Provided is a printed circuit board having a bump interconnection structure that improves reliability between interconnection layers. Also provided is a method of fabricating the printed circuit board and semiconductor package using the printed circuit board. According to one embodiment, the printed circuit board includes a plurality of bumps formed on a resin layer between a first interconnection layer and a second interconnection layer. The second interconnection layer includes insertion holes corresponding to upper portions of the bumps so that the upper portions of the bumps protrude from the second interconnection layer. The upper portion of at least one of the bumps includes a rivet portion having a diameter greater that the diameter of the corresponding insertion hole to reliably interconnect the first and second interconnection layers.

Abstract translation: 提供了具有提高互连层之间的可靠性的凸块互连结构的印刷电路板。 还提供了使用印刷电路板制造印刷电路板和半导体封装的方法。 根据一个实施例，印刷电路板包括形成在第一互连层和第二互连层之间的树脂层上的多个凸点。 第二互连层包括对应于凸起的上部的插入孔，使得凸起的上部从第二互连层突出。 至少一个凸块的上部包括具有大于相应插入孔的直径的直径的铆钉部分，以可靠地互连第一和第二互连层。

公开(公告)号：US20100163897A1

公开(公告)日：2010-07-01

申请号：US12422291

申请日：2009-04-13

Applicant: Zhi-Cheng Hsiao ,  Chao-Kai Hsu ,  Yu-Hua Chen

Inventor： Zhi-Cheng Hsiao ,  Chao-Kai Hsu ,  Yu-Hua Chen

IPC: H01L33/00

CPC classification number: H05K3/32 ,  H01L33/62 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K1/0274 ,  H05K1/189 ,  H05K3/284 ,  H05K2201/09481 ,  H05K2201/0969 ,  H05K2201/10106 ,  H05K2201/2054 ,  H05K2203/1316 ,  H05K2203/1469 ,  H01L2924/00

Abstract: A flexible light source device including a substrate, a light emitting device, a molding compound, a dielectric layer, and a metal line is provided. The substrate has a first surface, a second surface opposite to the first surface, and a first opening. The light emitting device is disposed on the first surface of the substrate and covers the first opening. The molding compound is located above the first surface and covers the light emitting device. The dielectric layer is disposed on the second surface and covers a sidewall of the first opening. The dielectric layer has a second opening which exposes part of the light emitting device. The metal line is disposed on the dielectric layer, wherein the metal line is electrically connected to the light emitting device via the second opening in the dielectric layer. Additionally, a fabrication method of the flexible light source device is also provided.

Abstract translation: 提供了包括基板，发光装置，模塑料，电介质层和金属线的柔性光源装置。 基板具有第一表面，与第一表面相对的第二表面和第一开口。 发光装置设置在基板的第一表面上并覆盖第一开口。 模塑料位于第一表面上方并覆盖发光器件。 电介质层设置在第二表面上并且覆盖第一开口的侧壁。 介电层具有暴露部分发光器件的第二开口。 金属线设置在电介质层上，其中金属线通过电介质层中的第二开口与发光器件电连接。 另外，还提供了柔性光源装置的制造方法。

公开(公告)号：US20100147560A1

公开(公告)日：2010-06-17

申请号：US12628281

申请日：2009-12-01

Applicant: Kentaro KANEKO

Inventor： Kentaro KANEKO

IPC: H05K1/02 ,  B32B37/00

CPC classification number: H01L23/13 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/1058 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/3511 ,  H05K1/183 ,  H05K3/205 ,  H05K3/4682 ,  H05K3/4697 ,  H05K2201/09472 ,  H05K2201/09481 ,  H05K2201/10674 ,  H05K2203/0369 ,  H05K2203/0376 ,  Y10T156/10 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A wiring board (package) includes: a cavity formed at a position corresponding to a chip mounting area of the outermost insulating layer on one side of both surfaces of the wiring board; a pad exposed from the surface of the insulating layer in the cavity; and a pad exposed from the surface of the insulating layer in a peripheral region of the cavity. A chip is flip-chip bonded to the pads in the cavity of the package, and another package is bonded to the pads in the peripheral region of the cavity, to thereby form a semiconductor device having a package on package (POP) structure.

Abstract translation: 布线板（封装）包括：形成在与布线板的两面的一侧的最外层绝缘层的芯片安装区域对应的位置的空腔; 从空腔中的绝缘层的表面暴露的焊盘; 以及在空腔的周边区域中从绝缘层的表面暴露的焊盘。 将芯片倒装芯片结合到封装空腔中的焊盘，另一个封装结合到空腔周边区域中的焊盘，从而形成具有封装封装（POP）结构的半导体器件。

公开(公告)号：US20100139969A1

公开(公告)日：2010-06-10

申请号：US12379480

申请日：2009-02-23

Applicant: Jin Yong An ,  Ki Hwan Kim

Inventor： Jin Yong An ,  Ki Hwan Kim

IPC: H05K1/11 ,  B05D5/12 ,  H05K3/00

CPC classification number: H05K3/4007 ,  H01L2224/16225 ,  H01L2224/81192 ,  H05K3/061 ,  H05K3/243 ,  H05K3/4644 ,  H05K3/4682 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/096 ,  H05K2203/054 ,  H05K2203/1536

Abstract: Disclosed herein is a printed circuit board, including: metal bumps having constant diameters and protruding over an insulation layer; a circuit layer formed beneath the insulation layer; and vias passing through the insulation layer to connect the metal bumps with the circuit layer.

Abstract translation: 这里公开了一种印刷电路板，包括：具有恒定直径并在绝缘层上突出的金属凸块; 形成在绝缘层之下的电路层; 以及通过绝缘层的通孔以将金属凸块与电路层连接。

公开(公告)号：US07731506B2

公开(公告)日：2010-06-08

申请号：US12535337

申请日：2009-08-04

Applicant: Chin-Wen Lo ,  Yueh-Fang Wang

Inventor： Chin-Wen Lo ,  Yueh-Fang Wang

IPC: H01R12/00

CPC classification number: H05K1/118 ,  H05K3/0058 ,  H05K2201/09381 ,  H05K2201/09409 ,  H05K2201/09481 ,  H05K2201/09727 ,  H05K2201/0979 ,  H05K2201/2009

Abstract: A pin layout of a golden finger for FPC is disclosed, which comprises: a substrate; a first conductive layer, having a plurality of first routings; a second conductive layer, having a plurality of second routings; and a plurality of conductive members; wherein the first and the second conductive layers are formed respectively on the two opposite sides of the substrate in a manner that each first routing is electrically connected to its corresponding first pin, while disposing a plurality of second pins, without contacting to the first pins and the first routings, on the side of the substrate where the first conductive layer is disposed for corresponding each of the second pins to the extensions of the plural second routings; and the plural conductive members are disposed forming electric connections between the second routings and the second pins in respective.

Abstract translation: 公开了一种用于FPC的金手指的销布局，其包括：基板; 第一导电层，具有多个第一布线; 第二导电层，具有多个第二布线; 和多个导电构件; 其中所述第一导电层和所述第二导电层分别形成在所述基板的两个相对侧上，使得每个第一布线电连接到其对应的第一引脚，同时设置多个第二引脚而不接触所述第一引脚， 所述第一布线在所述基板的所述第一导电层被设置用于将所述第二引脚中的每一个对应于所述多个第二布线的延伸部的一侧上; 并且多个导电构件被布置成分别在第二布线和第二插脚之间形成电连接。

公开(公告)号：US20100122842A1

公开(公告)日：2010-05-20

申请号：US12428776

申请日：2009-04-23

Applicant: Tae-Gui KIM ,  Young-Hwan Shin ,  Jae-Soo Lee ,  Tae-Gon Lee

Inventor： Tae-Gui KIM ,  Young-Hwan Shin ,  Jae-Soo Lee ,  Tae-Gon Lee

IPC: H01R12/06 ,  H05K3/00

CPC classification number: H05K3/0035 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/108 ,  H05K3/243 ,  H05K3/421 ,  H05K3/427 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09736 ,  H05K2203/0369 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A printed circuit board and a method of manufacturing the printed circuit board are disclosed. The method of manufacturing a printed circuit board including a via, which is configured to electrically connect both sides of an insulator, and a pad part, which is formed in one side of the insulator to be directly in contact with the via, can include forming a seed layer part on one side of the insulator, a portion of the seed layer part being bulged, forming a via hole by processing the other side of the insulator, corresponding to the bulged portion of the seed layer part, forming the via inside the via hole, and forming a plating layer, corresponding to the pad part, on the seed layer part. With the present invention, it is possible to form a pattern having a finer pitch, maintaining a VOP structure and to prevent a lower side of a substrate from being penetrated through when a via hole is processed.

Abstract translation: 公开了印刷电路板和印刷电路板的制造方法。 制造包括通孔的印刷电路板的制造方法，该印刷电路板被配置为电连接绝缘体的两侧，并且形成在绝缘体的一个侧面中以与通孔直接接触的焊盘部分可以包括成形 种子层部分在绝缘体的一侧上，种子层部分的一部分被凸出，通过处理绝缘体的另一侧形成通孔，对应于种子层部分的凸起部分，在该内部形成通孔 并且在种子层部分上形成对应于焊盘部分的镀层。 利用本发明，可以形成具有更细的间距的图案，保持VOP结构并且防止当加工通孔时衬底的下侧被穿透。

公开(公告)号：US20100096165A1

公开(公告)日：2010-04-22

申请号：US12575863

申请日：2009-10-08

Applicant: Chin-Wen Lo ,  Hsueh-Chih Wu

Inventor： Chin-Wen Lo ,  Hsueh-Chih Wu

IPC: H05K1/00

CPC classification number: H05K1/118 ,  H05K1/117 ,  H05K3/0058 ,  H05K2201/09381 ,  H05K2201/09409 ,  H05K2201/09436 ,  H05K2201/09481 ,  H05K2201/09709 ,  H05K2201/09727 ,  H05K2201/0979

Abstract: A golden finger for flexible printed circuitboard, comprises: a frame with a tail, being composed of a stiffening plate, a bottom substrate, a bottom copper layer, a cover layer, and a top copper layer while enabling the bottom copper layer to be formed with at least one first routing and at least one second routing, and enabling the top copper layer to be formed with at least one first pin and at least one second pin; at least one first via hole, each being filled with a conductive material and disposed at a position between its corresponding first pin and first routing for connecting the first pin to the first routing electrically; and at least one second via hole, each filled with a conductive material and being disposed at a position between the its corresponding second pin and second routing for connecting the second pin to the second routing electrically.

Abstract translation: 用于柔性印刷电路板的金手指包括：具有尾部的框架，由加强板，底部基板，底部铜层，覆盖层和顶部铜层组成，同时能够形成底部铜层 具有至少一个第一路由和至少一个第二路由，并且使得顶部铜层能够形成有至少一个第一引脚和至少一个第二引脚; 至少一个第一通孔，每个第一通孔都填充有导电材料并且设置在其相应的第一引脚和第一布线之间的位置，用于将第一引脚电连接到第一布线; 以及至少一个第二通孔，每个第二通孔均填充有导电材料，并且设置在其对应的第二引脚和第二布线之间的位置，用于将第二引脚电连接到第二布线。

公开(公告)号：US07665999B2

公开(公告)日：2010-02-23

申请号：US12270956

申请日：2008-11-14

Applicant: Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

Inventor： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC: H01R12/00

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A module arrangement which includes a land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a moldable dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane.

Abstract translation: 一种模块装置，其包括包括电绝缘载体平面的平面栅格阵列（LGA）插入器结构以及安装在所述载体平面的第一表面上的至少一个插入器。 插入件在横截面中具有半环形结构，并且由可模制的介电弹性体材料构成。 多个导电元件围绕至少一个半环形插入件的表面布置，并且从其最上端向内和向下自由地延伸至与位于电绝缘载体的相对侧上的至少一个部件的电接触 飞机