公开(公告)号：US3226473A

公开(公告)日：1965-12-28

申请号：US26338063

申请日：1963-03-04

Applicant: SANDERS ASSOCIATES INC

Inventor： DAHLGREN VICTOR F

IPC: H05K1/11 ,  H05K3/28

CPC classification number: H05K3/281 ,  H05K1/118 ,  H05K2201/091 ,  H05K2203/0264

公开(公告)号：US2912748A

公开(公告)日：1959-11-17

申请号：US58757956

申请日：1956-05-28

Applicant: ERIE RESISTOR CORP

Inventor： GRAY ROBERT B

IPC: H05K3/00 ,  H05K3/04 ,  H05K3/40

CPC classification number: H05K3/4084 ,  H05K3/005 ,  H05K3/041 ,  H05K3/045 ,  H05K2201/0355 ,  H05K2201/091 ,  H05K2203/0108 ,  H05K2203/025 ,  Y10T29/4916 ,  Y10T29/49165 ,  Y10T156/1041 ,  Y10T156/1054

公开(公告)号：US09922783B2

公开(公告)日：2018-03-20

申请号：US14810507

申请日：2015-07-28

Applicant: HARRIS CORPORATION

Inventor： Louis Joseph Rendek, Jr. ,  Lawrence Wayne Shacklette ,  Paul Brian Jaynes ,  Philip Anthony Marvin

IPC: H05K1/02 ,  H01H13/704 ,  H05K3/30 ,  H05K3/46 ,  H01H11/00

CPC classification number: H01H13/704 ,  H01H11/00 ,  H05K1/0284 ,  H05K3/303 ,  H05K3/4614 ,  H05K3/4626 ,  H05K3/4632 ,  H05K2201/0141 ,  H05K2201/091 ,  Y10T29/49107 ,  Y10T29/4913

Abstract: A method is for making an electronic device including forming a multilayer circuit board having a non-planar three-dimensional shape defining a membrane switch recess therein, the multilayer circuit board including at least one liquid crystal polymer (LCP) layer, and at least one electrically conductive pattern layer thereon defining at least one membrane switch electrode adjacent the membrane switch recess to define a membrane switch. The method also includes filling the membrane switch recess with a compressible dielectric material, and positioning at least one biasing member in the membrane switch recess.

公开(公告)号：US09855783B2

公开(公告)日：2018-01-02

申请号：US13810331

申请日：2011-07-15

Applicant: Kate Stone

Inventor： Kate Stone

IPC: B42D15/00 ,  H05K13/00 ,  H05K7/06 ,  B32B37/18 ,  B42D1/00 ,  B42D15/02 ,  H05K3/40 ,  H05K3/46 ,  B32B37/14 ,  B32B38/10 ,  B32B38/00 ,  H05K1/18 ,  H05K3/04 ,  H05K3/12

CPC classification number: B42D15/00 ,  B32B37/142 ,  B32B37/185 ,  B32B38/10 ,  B32B38/105 ,  B32B2305/34 ,  B32B2457/00 ,  B42D1/007 ,  B42D15/022 ,  H01H2211/012 ,  H01H2229/004 ,  H05K1/185 ,  H05K3/046 ,  H05K3/1241 ,  H05K3/4084 ,  H05K3/4697 ,  H05K7/06 ,  H05K13/00 ,  H05K2201/055 ,  H05K2201/091 ,  Y10T29/49002

Abstract: A device comprising a laminate (2) comprising at least two layers (31, 32, 33, 34, 35) and a plurality of electronic components (5, 6, 7, 8) disposed between two layers. At least one of the layers (31, 34) supports conductive tracks (10, 11) arranged to connect electronic components.

公开(公告)号：US09781840B2

公开(公告)日：2017-10-03

申请号：US14938191

申请日：2015-11-11

Applicant: IBIDEN CO., LTD.

Inventor： Naoyuki Nagaya ,  Kiyotaka Tsukada

IPC: H05K1/03 ,  H05K3/34 ,  H05K1/02 ,  H05K3/00

CPC classification number: H05K3/341 ,  H05K1/0206 ,  H05K3/005 ,  H05K2201/09072 ,  H05K2201/091 ,  H05K2201/10106 ,  H05K2201/10416 ,  Y02P70/613

Abstract: A substrate for mounting an electronic component includes a base material including insulating resin, a first conductor layer formed on first surface of the material, a second conductor layer formed on second surface of the material, and a metal block inserted into a hole penetrating through the first conductor, material and second conductor such that the metal block is fitted in the hole. The material has a bent portion in contact with the metal block in the hole such that the bent portion is bending toward the second conductor, the metal block has surface on first conductor side such that the surface has an outer peripheral portion having a curved-surface shape, and the hole has a first fitting inlet on the first conductor layer side and a second fitting inlet on second conductor side and that the metal block is positioned in contact with the second fitting inlet.

公开(公告)号：US09249959B2

公开(公告)日：2016-02-02

申请号：US14245749

申请日：2014-04-04

Applicant: Novalia Ltd

Inventor： Kate Stone

IPC: H05K7/10 ,  F21V21/14 ,  H05K1/03 ,  H05K3/32 ,  H05K3/36 ,  H05K1/02 ,  H05K1/11 ,  H05K3/12

CPC classification number: F21V21/14 ,  H05K1/0266 ,  H05K1/028 ,  H05K1/038 ,  H05K1/0393 ,  H05K1/113 ,  H05K3/12 ,  H05K3/32 ,  H05K3/321 ,  H05K3/361 ,  H05K2201/09063 ,  H05K2201/09072 ,  H05K2201/091 ,  H05K2201/09936 ,  H05K2201/10674 ,  H05K2203/1545 ,  Y10T29/4913 ,  Y10T29/5313 ,  Y10T428/24273

Abstract: A method of fabricating packaging for a product comprises forming a plurality of conductive tracks on a sheet of material and forming a physical barrier, such as a hole, for impeding fluid flow between adjacent conductive tracks. The method may further comprise depositing first and second regions conductive fluid onto adjacent first and second conductive tracks either side of the physical barrier and mounting an electronic device having first and second terminals such that the electronic device forms a bridge over the physical barrier and the first ands second terminals contact the first and second conductive adjacent tracks.

Abstract translation: 一种制造产品包装的方法包括在一片材料上形成多个导电轨迹并形成物理屏障，例如孔，用于阻止相邻导电轨道之间的流体流动。 该方法还可以包括将第一和第二区域导电流体沉积到物理屏障两侧的相邻第一和第二导电轨道上，并且安装具有第一和第二端子的电子设备，使得电子设备在物理屏障上形成桥， 并且第二端子接触第一和第二导电相邻轨道。

公开(公告)号：US09117602B2

公开(公告)日：2015-08-25

申请号：US12016089

申请日：2008-01-17

Applicant: Louis Joseph Rendek, Jr. ,  Lawrence Wayne Shacklette ,  Paul Brian Jaynes ,  Philip Anthony Marvin

Inventor： Louis Joseph Rendek, Jr. ,  Lawrence Wayne Shacklette ,  Paul Brian Jaynes ,  Philip Anthony Marvin

IPC: H05K1/03 ,  H05K1/09 ,  H01H13/704 ,  H05K1/02 ,  H05K3/46

CPC classification number: H01H13/704 ,  H01H11/00 ,  H05K1/0284 ,  H05K3/303 ,  H05K3/4614 ,  H05K3/4626 ,  H05K3/4632 ,  H05K2201/0141 ,  H05K2201/091 ,  Y10T29/49107 ,  Y10T29/4913

Abstract: An electronic device includes a multilayer circuit board having a non-planar three-dimensional shape defining a membrane switch recess therein. The multilayer circuit board may include at least one liquid crystal polymer (LCP) layer, and at least one electrically conductive pattern layer thereon defining at least one membrane switch electrode adjacent the membrane switch recess to define a membrane switch. The electronic may further include a compressible dielectric material filling the membrane switch recess. The electronic device may also include at least one spring member within the membrane switch recess.

Abstract translation: 电子设备包括具有在其中限定薄膜开关凹部的非平面三维形状的多层电路板。 多层电路板可以包括至少一个液晶聚合物（LCP）层和至少一个导电图案层，其上限定了与薄膜开关凹部相邻的至少一个薄膜开关电极以限定薄膜开关。 电子器件还可以包括填充薄膜开关凹部的可压缩电介质材料。 电子设备还可以包括膜开关凹部内的至少一个弹簧构件。

公开(公告)号：US08619211B2

公开(公告)日：2013-12-31

申请号：US12601526

申请日：2008-05-20

Applicant: Ralph Peter Bertram ,  David Dussault ,  Matthias Fiegler ,  Harald Stoyan

Inventor： Ralph Peter Bertram ,  David Dussault ,  Matthias Fiegler ,  Harald Stoyan

IPC: G02F1/1335 ,  F21V21/00

CPC classification number: G02F1/133608 ,  F21K9/00 ,  F21S4/22 ,  F21Y2105/10 ,  F21Y2105/12 ,  F21Y2115/10 ,  G02F1/133603 ,  H05K1/0271 ,  H05K1/189 ,  H05K3/0061 ,  H05K2201/091 ,  H05K2201/10106

Abstract: A lighting arrangement is disclosed with a light module (2) that has at least one first group (22, 22′) of light sources (221, 222, 223) and one second group (22, 22″) of light sources that are arranged spaced apart from each other on a flexible circuit board (21), and with a carrier (1) on which the light module is mounted, and a buffer zone (12) that laterally overlaps with the light module between the first and the second group of light sources. Furthermore, a backlighting device and a display device are disclosed.

Abstract translation: 公开了具有光模块（2）的照明装置，所述光模块具有光源（221,222,223）和光源的一个第二组（22,22“）的至少一个第一组（22,22'）和一个第二组（22,22”）， 被布置在柔性电路板（21）上彼此间隔开并且与其上安装有光模块的载体（1）以及在第一和第二和第二部分之间与光模块横向重叠的缓冲区（12） 第二组光源。 此外，公开了一种背光装置和显示装置。

公开(公告)号：US08288267B2

公开(公告)日：2012-10-16

申请号：US12775717

申请日：2010-05-07

Applicant: Jean-Marie Verilhac ,  Jacqueline Bablet ,  Cécile Bory

Inventor： Jean-Marie Verilhac ,  Jacqueline Bablet ,  Cécile Bory

IPC: H01L21/44

CPC classification number: H05K3/4084 ,  H01L21/76885 ,  H05K3/0017 ,  H05K3/4647 ,  H05K3/4664 ,  H05K2201/091 ,  H05K2201/09909 ,  H05K2203/107 ,  H05K2203/1173 ,  H05K2203/128

Abstract: A method for making an electric interconnection between two conducting layers, separated by at least one insulation or semi-conducting layer, which includes forming a stud extending between at least the lower conducting layer and the upper conducting layer, where the nature and/or the shape of the stud impart non-wettability properties relative to the material used for the separating layer.

Abstract translation: 一种用于在由至少一个绝缘或半导电层分开的两个导电层之间进行电互连的方法，包括形成在至少下导电层和上导电层之间延伸的螺柱，其中性质和/或 螺柱的形状相对于用于分离层的材料赋予非润湿性。

公开(公告)号：US20120211272A1

公开(公告)日：2012-08-23

申请号：US13029660

申请日：2011-02-17

Applicant: Qing Zhang

Inventor： Qing Zhang

IPC: H05K1/11

CPC classification number: H05K3/368 ,  H05K3/4614 ,  H05K2201/091 ,  H05K2203/063

Abstract: A thin film circuit board device includes a multi-layered circuit unit having an upper circuit layer formed with an upper circuit having at least one first contact part, a lower circuit layer formed with a lower circuit having at least one second contact part disposed beneath the first contact part, and an insulating layer disposed between the upper and lower circuit layers and having at least one through hole. One of the upper and lower circuit layers has at least one preformed protruding portion that protrudes into the through hole toward the other one of the upper and lower circuit layers. One of the first and second contact parts is disposed on the preformed protruding portion so as to be in constant contact with the other one of the first and second contact parts.

Abstract translation: 薄膜电路板装置包括具有形成有上电路的上电路层的多层电路单元，所述上电路具有至少一个第一接触部分，下电路层形成有下电路，所述下电路具有至少一个第二接触部分， 第一接触部分和设置在上电路层和下电路层之间并具有至少一个通孔的绝缘层。 上下电路层中的一个具有至少一个预先形成的突出部分，该突出部分朝着上电路层和下电路层中的另一个突出到通孔中。 第一和第二接触部分中的一个被布置在预成型的突出部分上，以便与第一和第二接触部分中的另一个保持一定的接触。