中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

292 records (took 0.017 seconds)

    METHOD OF MAKING A MICRO-ELECTRO-MECHANICAL-SYSTEMS (MEMS) DEVICE
    251.
    发明申请
    METHOD OF MAKING A MICRO-ELECTRO-MECHANICAL-SYSTEMS (MEMS) DEVICE 有权
    制造微电子机械系统（MEMS）器件的方法

    公开(公告)号：US20120107993A1

    公开(公告)日：2012-05-03

    申请号：US12916395

    申请日：2010-10-29

    Applicant: Lisa H. Karlin ,  David W. Kierst ,  Lianjun Liu ,  Wei Liu ,  Ruben Montez ,  Robert F. Steimle

    Inventor： Lisa H. Karlin ,  David W. Kierst ,  Lianjun Liu ,  Wei Liu ,  Ruben Montez ,  Robert F. Steimle

    IPC: H01L21/306

    CPC classification number: B81C1/00801 ,  B81B2207/07 ,  B81C2201/053

    Abstract: A method of forming a MEMS device includes forming a sacrificial layer over a substrate. The method further includes forming a metal layer over the sacrificial layer and forming a protection layer overlying the metal layer. The method further includes etching the protection layer and the metal layer to form a structure having a remaining portion of the protection layer formed over a remaining portion of the metal layer. The method further includes etching the sacrificial layer to form a movable portion of the MEMS device, wherein the remaining portion of the protection layer protects the remaining portion of the metal layer during the etching of the sacrificial layer to form the movable portion of the MEMS device.

    Abstract translation: 形成MEMS器件的方法包括在衬底上形成牺牲层。 该方法还包括在牺牲层上形成金属层并形成覆盖在金属层上的保护层。 该方法还包括蚀刻保护层和金属层以形成在金属层的剩余部分上形成保护层的剩余部分的结构。 该方法还包括蚀刻牺牲层以形成MEMS器件的可移动部分，其中保护层的剩余部分在蚀刻牺牲层期间保护金属层的剩余部分以形成MEMS器件的可移动部分 。

    Protective thin films for use during fabrication of semiconductors, MEMS, and microstructures
    252.
    发明授权
    Protective thin films for use during fabrication of semiconductors, MEMS, and microstructures 有权
    用于制造半导体，MEMS和微结构的保护薄膜

    公开(公告)号：US08067258B2

    公开(公告)日：2011-11-29

    申请号：US11447186

    申请日：2006-06-05

    Applicant: Jeffrey D. Chinn ,  Boris Kobrin ,  Romuald Nowak

    Inventor： Jeffrey D. Chinn ,  Boris Kobrin ,  Romuald Nowak

    IPC: H01L21/00

    CPC classification number: H01L21/02126 ,  B81C1/00896 ,  B81C2201/053 ,  C23C16/44 ,  C23C16/455 ,  H01L21/02263 ,  H01L21/3121

    Abstract: A method of protecting a substrate during fabrication of semiconductor, MEMS, or biotechnology devices. The method includes application of a protective thin film which typically has a thickness ranging from about 3 Å to about 1,000 Å, wherein precursor materials used to deposit the protective thin film are organic-based precursors which include at least one fluorine-comprising functional group at one end of a carbon back bone and at least one functional bonding group at the opposite end of a carbon backbone, and wherein the carbon backbone ranges in length from 4 carbons through about 12 carbons. In many applications at least a portion of the protective thin film is removed during fabrication of the devices.

    Abstract translation: 一种在制造半导体，MEMS或生物技术设备期间保护衬底的方法。 该方法包括施加通常具有约3至约1000的厚度的保护性薄膜，其中用于沉积保护性薄膜的前体材料是有机基前体，其包括至少一个含氟官能团 碳骨架的一端和在碳骨架的相对端处的至少一个功能键合基团，其中碳骨架的长度为4个碳到约12个碳原子。 在许多应用中，在制造器件期间，保护薄膜的至少一部分被去除。

    Low stress photo-sensitive resin with sponge-like structure and devices manufactured employing same
    253.
    发明授权
    Low stress photo-sensitive resin with sponge-like structure and devices manufactured employing same 有权
    具有海绵状结构的低应力光敏树脂和使用其制造的装置

    公开(公告)号：US08053377B2

    公开(公告)日：2011-11-08

    申请号：US12892190

    申请日：2010-09-28

    Applicant: Shang-Ying Tsai ,  Chun-Ren Cheng ,  Jiou-Kang Lee ,  Jung-Huei Peng ,  Ting-Hau Wu

    Inventor： Shang-Ying Tsai ,  Chun-Ren Cheng ,  Jiou-Kang Lee ,  Jung-Huei Peng ,  Ting-Hau Wu

    IPC: H01L21/31 ,  H01L21/469

    CPC classification number: B41J2/16 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1639 ,  B81B2201/052 ,  B81C1/00666 ,  B81C2201/017 ,  B81C2201/053

    Abstract: System and method for forming a structure including a MEMS device structure. In order to prevent warpage of a substrate arising from curing process for a sacrificial material (such as a photoresist), and from subsequent high temperature process steps, an improved sacrificial material comprises (i) a polymer and (ii) a foaming agent or special function group. The structure can be formed by forming a trench in a substrate and filling the trench with a sacrificial material. The sacrificial material includes (i) a polymer and (ii) a foaming agent or special function group. After further process steps are completed, the sacrificial material is removed from the trench.

    Abstract translation: 用于形成包括MEMS器件结构的结构的系统和方法。 为了防止由牺牲材料（例如光致抗蚀剂）的固化过程引起的基板翘曲，以及随后的高温工艺步骤，改进的牺牲材料包括（i）聚​​合物和（ii）发泡剂或特殊的 功能组。 可以通过在衬底中形成沟槽并用牺牲材料填充沟槽来形成结构。 牺牲材料包括（i）聚​​合物和（ii）发泡剂或特殊功能组。 在完成进一步的工艺步骤之后，将牺牲材料从沟槽中移除。

    Wafer level sensing package and manufacturing process thereof
    255.
    发明授权
    Wafer level sensing package and manufacturing process thereof 有权
    晶圆级感测封装及其制造工艺

    公开(公告)号：US07915065B2

    公开(公告)日：2011-03-29

    申请号：US12331539

    申请日：2008-12-10

    Applicant: Lung-Tai Chen ,  Chun-Hsun Chu ,  Tzong-Che Ho ,  Bor-Chen Tsai

    Inventor： Lung-Tai Chen ,  Chun-Hsun Chu ,  Tzong-Che Ho ,  Bor-Chen Tsai

    IPC: H01L21/00

    CPC classification number: B81C1/00793 ,  B81B7/0054 ,  B81B2201/0292 ,  B81B2207/07 ,  B81C1/00182 ,  B81C2201/053 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/13023 ,  H01L2924/1461 ,  H01L2924/00

    Abstract: A wafer level sensing package and manufacturing process thereof are described. The process includes providing a wafer having sensing chips, in which each sensing chip has a sensing area and pads; forming a stress release layer on a wafer surface; cladding a photoresist layer on the stress release layer; patterning the photoresist layer to expose the pads and a portion of the stress release layer, without exposing opening areas of the sensing areas; forming a conductive metal layer of re-distributed pads on the portion of the stress release layer exposed by the photoresist layer; removing the photoresist layer; forming a re-cladding photoresist layer on the stress release layer and the conductive metal layer; forming holes in the re-cladding photoresist layer above the re-distributed pad area; and forming conductive bumps in the holes to electrically connect to the conductive metal layer.

    Abstract translation: 描述了晶片级感测封装及其制造工艺。 该过程包括提供具有感测芯片的晶片，其中每个感测芯片具有感测区域和焊盘; 在晶片表面上形成应力释放层; 在应力释放层上包覆光致抗蚀剂层; 图案化光致抗蚀剂层以暴露垫和应力释放层的一部分，而不暴露感测区域的开口区域; 在由光致抗蚀剂层暴露的应力释放层的部分上形成再分布焊盘的导电金属层; 去除光致抗蚀剂层; 在所述应力释放层和所述导电金属层上形成再包覆光致抗蚀剂层; 在再分布的焊盘区域上方的再包层光致抗蚀剂层中形成孔; 以及在所述孔中形成导电凸块以电连接到所述导电金属层。

    Silicon-Rich Nitride Etch Stop Layer for Vapor HF Etching in MEMS Device Fabrication
    256.
    发明申请
    Silicon-Rich Nitride Etch Stop Layer for Vapor HF Etching in MEMS Device Fabrication 审中-公开
    富氮氮化物蚀刻停止层用于MEMS器件制造中的蒸气HF蚀刻

    公开(公告)号：US20100320548A1

    公开(公告)日：2010-12-23

    申请号：US12813117

    申请日：2010-06-10

    Applicant: Christine H. Tsau ,  Thomas Kieran Nunan

    Inventor： Christine H. Tsau ,  Thomas Kieran Nunan

    IPC: H01L29/84 ,  H01L21/30 ,  H01L21/318 ,  H01L29/06

    CPC classification number: G01P15/125 ,  B81C1/0019 ,  B81C1/00595 ,  B81C2201/0109 ,  B81C2201/014 ,  B81C2201/016 ,  B81C2201/053 ,  G01P15/0802 ,  H01L21/31116

    Abstract: A thin silicon-rich nitride film (e.g., having a thickness in the range of around 100A to 10000A) deposited using low-pressure chemical vapor deposition (LPCVD) is used for etch stop during vapor HF etching in various MEMS wafer fabrication processes and devices. The LPCVD silicon-rich nitride film may replace, or be used in combination with, a LPCVD stoichiometric nitride layer in many existing MEMS fabrication processes and devices. The LPCVD silicon-rich nitride film is deposited at high temperatures (e.g., typically around 650-900 degrees C.). Such a LPCVD silicon-rich nitride film generally has enhanced etch selectivity to vapor HF and other harsh chemical environments compared to stoichiometric silicon nitride and therefore a thinner layer typically can be used as an embedded etch stop layer in various MEMS wafer fabrication processes and devices and particularly for vapor HF etching processes, saving time and money in the fabrication process.

    Abstract translation: 使用低压化学气相沉积（LPCVD）沉积的薄的富硅氮化物膜（例如，厚度在约100A至10000A的范围内）用于各种MEMS晶片制造工艺和器件中的蒸气HF蚀刻期间的蚀刻停止 。 LPCVD富硅氮化物膜可以在许多现有的MEMS制造工艺和器件中替代或与其组合使用LPCVD化学计量氮化物层。 LPCVD富硅氮化物膜在高温（例如典型地约650-900℃）下沉积。 与化学计量的氮化硅相比，这种LPCVD富硅氮化物膜通常对蒸汽HF和其它恶劣的化学环境具有增强的蚀刻选择性，因此较薄的层通常可用作各种MEMS晶片制造工艺和器件中的嵌入式蚀刻停止层， 特别是对于蒸汽HF蚀刻工艺，节省了制造过程中的时间和金钱。

    Dicing method using volatile protective agent
    257.
    发明授权
    Dicing method using volatile protective agent 有权
    使用挥发性保护剂的切片方法

    公开(公告)号：US07790578B2

    公开(公告)日：2010-09-07

    申请号：US11848423

    申请日：2007-08-31

    Applicant: Toshikazu Furui

    Inventor： Toshikazu Furui

    IPC: H01L21/00 ,  H01L21/78

    CPC classification number: B81C1/00888 ,  B81C2201/053 ,  H01L21/78

    Abstract: Prior to dicing, a volatile protective agent is applied to at least the face of the substrate in which the devices are fabricated. Then the devices are separated by dicing. After dicing, the surface of the volatile protective agent is cleaned, and then the volatile protective agent is evaporated.

    Abstract translation: 在切割之前，将挥发性保护剂施加到至少其中制造器件的衬底的表面。 然后通过切割分离设备。 切割后，清洁挥发性保护剂的表面，然后蒸发挥发性保护剂。

    Method for producing a structure comprising a mobile element by means of a heterogeneous sacrificial layer
    258.
    发明申请
    Method for producing a structure comprising a mobile element by means of a heterogeneous sacrificial layer 有权
    一种通过异质牺牲层制造包括移动元件的结构的方法

    公开(公告)号：US20090317930A1

    公开(公告)日：2009-12-24

    申请号：US12457333

    申请日：2009-06-08

    Applicant: Pierre-Louis Charvet

    Inventor： Pierre-Louis Charvet

    IPC: H01L21/20 ,  H01L21/3065 ,  H01L21/306

    CPC classification number: B81C1/00801 ,  B81B2203/0118 ,  B81C2201/0109 ,  B81C2201/053

    Abstract: First and second sacrificial materials are deposited on a substrate. The first and second patterns are respectively formed in the first and second sacrificial materials. The first pattern made from the first sacrificial material is arranged on the second pattern made from a second sacrificial material. The first pattern leaves an area of predefined width free on the periphery of a top surface of the second pattern. The active layer covers at least the whole of the side walls of the first and second patterns and said predefined area of the second pattern. The active area is patterned so as to allow access to the first sacrificial material. The first and second sacrificial materials are selectively removed forming a mobile structure comprising a free area secured to the substrate by a securing area.

    Abstract translation: 第一和第二牺牲材料沉积在基底上。 第一和第二图案分别形成在第一和第二牺牲材料中。 由第一牺牲材料制成的第一图案布置在由第二牺牲材料制成的第二图案上。 第一图案在第二图案的顶表面的周边上留下预定宽度的区域。 有源层至少覆盖第一和第二图案的至少整个侧壁以及第二图案的所述预定区域。 有源区域被图案化以允许访问第一牺牲材料。 选择性地移除第一和第二牺牲材料，形成包括通过固定区域固定到基底的自由区域的移动结构。

    WAFER LEVEL SENSING PACKAGE AND MANUFACTURING PROCESS THEREOF
    259.
    发明申请
    WAFER LEVEL SENSING PACKAGE AND MANUFACTURING PROCESS THEREOF 有权
    WAFER水平感测包装及其制造工艺

    公开(公告)号：US20090124074A1

    公开(公告)日：2009-05-14

    申请号：US12331539

    申请日：2008-12-10

    Applicant: Lung-Tai Chen ,  Chun-Hsun Chu ,  Tzong-Che Ho ,  Bor-Chen Tsai

    Inventor： Lung-Tai Chen ,  Chun-Hsun Chu ,  Tzong-Che Ho ,  Bor-Chen Tsai

    IPC: H01L21/768

    CPC classification number: B81C1/00793 ,  B81B7/0054 ,  B81B2201/0292 ,  B81B2207/07 ,  B81C1/00182 ,  B81C2201/053 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/13023 ,  H01L2924/1461 ,  H01L2924/00

    Abstract: A wafer level sensing package and manufacturing process thereof are described. The process includes providing a wafer having sensing chips, in which each sensing chip has a sensing area and pads; forming a stress release layer on a wafer surface; cladding a photoresist layer on the stress release layer; patterning the photoresist layer to expose the pads and a portion of the stress release layer, without exposing opening areas of the sensing areas; forming a conductive metal layer of re-distributed pads on the portion of the stress release layer exposed by the photoresist layer; removing the photoresist layer; forming a re-cladding photoresist layer on the stress release layer and the conductive metal layer; forming holes in the re-cladding photoresist layer above the re-distributed pad area; and forming conductive bumps in the holes to electrically connect to the conductive metal layer.

    Abstract translation: 描述了晶片级感测封装及其制造工艺。 该过程包括提供具有感测芯片的晶片，其中每个感测芯片具有感测区域和焊盘; 在晶片表面上形成应力释放层; 在应力释放层上包覆光致抗蚀剂层; 图案化光致抗蚀剂层以暴露垫和应力释放层的一部分，而不暴露感测区域的开口区域; 在由光致抗蚀剂层暴露的应力释放层的部分上形成再分布焊盘的导电金属层; 去除光致抗蚀剂层; 在所述应力释放层和所述导电金属层上形成再包覆光致抗蚀剂层; 在再分布的焊盘区域上方的再包层光致抗蚀剂层中形成孔; 并且在所述孔中形成导电凸块以电连接到所述导电金属层。

Patent Agency Ranking