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    Method of manufacture of a wiring board
    251.
    发明授权
    Method of manufacture of a wiring board 失效
    布线板的制造方法

    公开(公告)号：US4830704A

    公开(公告)日：1989-05-16

    申请号：US149797

    申请日：1988-01-29

    Applicant: Forrest L. Voss ,  Donald R. Witherell

    Inventor： Forrest L. Voss ,  Donald R. Witherell

    IPC: H05K3/42 ,  H05K3/44 ,  H05K3/46

    CPC classification number: H05K3/4641 ,  H05K3/429 ,  H05K3/44 ,  H05K2201/0338 ,  H05K2201/0347 ,  H05K2201/068 ,  H05K2201/09554 ,  H05K2203/0323 ,  H05K2203/0361 ,  H05K2203/0384 ,  H05K2203/061 ,  H05K3/445 ,  Y10T29/49155 ,  Y10T29/49165

    Abstract: A multi-layered printing wiring board and a method for manufacture where the multi-layered printing wiring board has thermal expansion controlling copper invar copper core therein with portions of the invar core therein with portions of the invar being selectively removed and replaced with superior materials for plating conductive material there to and further having a reduced coefficient of thermal conductivity by providing for a noble metal layer to be selectively deposited on pre-determined positions on the copper invar copper core thereby selectively etching portions of the copper and invar up to the noble metal layer and thereby providing for selectively removing the invar and replacing it with a laminant material.

    Abstract translation: 一种多层印刷布线板及其制造方法，其中多层印刷布线板具有热膨胀控制铜铟铜芯，其内部具有不规则核的部分，其中部分凹凸被选择性地去除，并用优质材料代替 通过提供选择性地沉积在铜砧铜芯上的预定位置上的贵金属层，并且进一步具有降低的导热系数，从而选择性地蚀刻铜的部分并侵入贵金属 从而提供选择性地去除凹陷并用层压材料代替它。

    Method of forming printed circuit
    254.
    发明授权
    Method of forming printed circuit 失效
    形成印刷电路的方法

    公开(公告)号：US3850711A

    公开(公告)日：1974-11-26

    申请号：US40074373

    申请日：1973-09-26

    Applicant: ACCRA PAINT ARRAYS CORP

    Inventor： CONLEY L

    IPC: B23K1/20 ,  H05K1/09 ,  H05K1/11 ,  H05K3/00 ,  H05K3/06 ,  H05K3/24 ,  H05K3/32 ,  H05K3/34 ,  H05K3/42 ,  C23F1/02

    CPC classification number: B23K1/20 ,  B23K2201/40 ,  B23K2201/42 ,  H05K1/09 ,  H05K1/114 ,  H05K3/002 ,  H05K3/067 ,  H05K3/243 ,  H05K3/328 ,  H05K3/3447 ,  H05K3/3452 ,  H05K3/3468 ,  H05K3/427 ,  H05K2201/0338 ,  H05K2201/0355 ,  H05K2201/10287 ,  H05K2201/2081 ,  H05K2203/0361 ,  H05K2203/1184

    Abstract: A method for the low cost production of printed circuits with both soldered-in component leads and welded wire connections, which includes applying a sheet of highly weldable material such as stainless steel to an insulative board, plating a layer of highly solderable material such as copper over the stainless steel, applying a first resist pattern and then a first etchant such as ferric chloride that etches both copper and stainless steel to form a predetermined printed circuit pattern, and then applying a second resist pattern and a second etchant such as chromic acid which etches only the copper to leave exposed regions of the stainless steel. Components can be wave soldered in place, and the solder will not adhere to the stainless steel so that wires can later be welded to the exposed stainless steel weld regions. More uniform welding can be obtained by applying an underlayer of copper to the insulative substrate under the stainless steel layer, so that there is a low resistance path to all weld regions.

    Abstract translation: 一种低成本生产具有焊接元件引线和焊接电线连接的印刷电路的方法，其包括将诸如不锈钢的高度可焊接材料的片材施加到绝缘板上，电镀一层高度可焊接的材料如铜 在不锈钢上涂覆第一抗蚀剂图案，然后施加蚀刻铜和不锈钢的第一蚀刻剂如氯化铁以形成预定的印刷电路图案，然后施加第二抗蚀剂图案和第二蚀刻剂如铬酸， 仅蚀刻铜以留下不锈钢的暴露区域。 组件可以在原位波浪焊接，焊料不会粘附到不锈钢上，以便后来可以将焊丝焊接到暴露的不锈钢焊接区域。 通过在不锈钢层下的绝缘基板上涂敷铜层，可以获得更均匀的焊接，使得对所有焊接区域具有低电阻路径。

    Method of etching cu with use of pb and sn layers as a mask
    256.
    发明授权
    Method of etching cu with use of pb and sn layers as a mask 失效
    使用PB和SN层作为掩模蚀刻CU的方法

    公开(公告)号：US3582415A

    公开(公告)日：1971-06-01

    申请号：US3582415D

    申请日：1969-01-09

    Applicant: SHIPLEY CO

    Inventor： GULLA MICHAEL

    IPC: C23C18/16 ,  C23C18/31 ,  C23F1/02 ,  H05K3/06 ,  H05K3/34

    CPC classification number: C23C18/31 ,  C23C18/1605 ,  C23C18/54 ,  C23F1/02 ,  H05K3/062 ,  H05K3/3473 ,  H05K2201/0338 ,  H05K2203/072

    Abstract: A PROCESS FOR PLATING A CUPREOUS SURFACE COMPRISING FIRST PLATING SAID SURFACE WITH IMMERSION LEAD AND THEREAFTER PLATING WITH IMMERSION TIN. THE PROCESS IS PARTICULARLY APPLICABLE TO THE FORMATION OF PRINTED CIRCUIT BOARDS WHERE THE STEPS WOULD COMPRISE APPLYING A NEGATIVE PLATING RESIST IN AN IMAGE PATTERN OVER AN INSULATING SUBSTRATE HAVING A SURFACE OF CUPREOUS METAL, THE EXPOSED AREA OF SAID METAL NOT COVERED BY THE RESIST DEFINING A DESIRED CONDUCTOR PATTERN, PROVIDING A LEAD COATING OVER THE EXPOSED METAL BY IMMERSION PLATING, PROVIDING AN IMMERSION PLATING OF TIN OVER THE LEAD, REMOVING THE PLATING RESIST AND ETCHING METAL EXPOSED BE REMOVAL OF THE PLATING RESIST.

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