公开(公告)号：US20210265255A1

公开(公告)日：2021-08-26

申请号：US17038237

申请日：2020-09-30

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H01L23/498 ,  H01L23/00

Abstract: A flip chip interconnection including a circuit board is disclosed. The circuit board includes a substrate, inner leads, a T-shaped circuit line and a dummy pattern. The inner leads, the T-shaped circuit line and the dummy pattern are located on an inner bonding area of the substrate. The T-shaped circuit line includes a main segment, a branch segment and a connection segment that is connected to the main segment and the branch segment. The main segment and the branch segment are extended along a lateral direction and a longitudinal direction, respectively. The dummy pattern is located between the connection segment and the inner leads.

公开(公告)号：US20210257287A1

公开(公告)日：2021-08-19

申请号：US16986415

申请日：2020-08-06

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H01L23/498 ,  H01L23/00

Abstract: A chip package includes a circuit board, a chip and an underfill. The circuit board includes a substrate, first circuit lines and second circuit lines. Each of the first circuit lines includes an inner lead and a first line fragment that are disposed on a chip mounting area and an underfill covering area of the substrate, respectively. The second circuit lines are disposed on the chip mounting area and not located between the adjacent inner leads so as to form a wider space between the adjacent first line fragments. The wider space enables the underfill to flow to between the circuit board and the chip and prevents air bubbles from being embedded in the underfill filled between the circuit board and the chip.

公开(公告)号：US20150359085A1

公开(公告)日：2015-12-10

申请号：US14317254

申请日：2014-06-27

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yi-Wen Chen ,  Yin-Chen Lin ,  Ming-Hsiao Ke ,  Yu-Chen Ma

IPC: H05K1/02

CPC classification number: H05K1/0269 ,  H05K1/0274 ,  H05K1/028 ,  H05K1/0298 ,  H05K2201/09781 ,  H05K2201/0989 ,  H05K2201/09936

Abstract: A flexible substrate includes a base layer, a metallic layer, a solder mask layer and an identifying code, the metallic layer is disposed at a first surface of the base layer, the metallic layer comprises a plurality of traces and at least one bottom block used for defining marked position, wherein the traces and the at least one bottom block are covered with the solder mask layer, wherein above the perpendicular direction of the at least one bottom block of the metallic layer, a pre-marked area is defined on an exposing surface of the solder mask layer and by an outlined edge of the at least one bottom block, and the identifying code is formed within the pre-marked area of the solder mask layer.

Abstract translation: 柔性基板包括基底层，金属层，焊接掩模层和识别代码，金属层设置在基底层的第一表面，金属层包括多个迹线和至少一个使用的底部块 用于限定标记位置，其中所述迹线和所述至少一个底部块被所述焊接掩模层覆盖，其中在所述金属层的所述至少一个底部块的垂直方向上方，预先标记的区域被限定在曝光 焊料掩模层的表面和至少一个底部块的轮廓边缘，并且识别代码形成在焊料掩模层的预先标记的区域内。