公开(公告)号：US20130207213A1

公开(公告)日：2013-08-15

申请号：US13396426

申请日：2012-02-14

Applicant: Shiu-Ko JangJian ,  Szu-An Wu ,  Sheng-Wen Chen

Inventor： Shiu-Ko JangJian ,  Szu-An Wu ,  Sheng-Wen Chen

IPC: H01L31/0232 ,  H01L31/18

CPC classification number: H01L27/1446 ,  H01L27/14632 ,  H01L27/1464 ,  H01L27/14685 ,  H01L27/14687 ,  H01L27/14689

Abstract: A device includes a semiconductor substrate, which has a front side and a backside. A photo-sensitive device is disposed on the front side of the semiconductor substrate. A first and a second grid line are parallel to each other, and are disposed on the backside of, and overlying, the semiconductor substrate. A stacked layer includes an adhesion layer, a metal layer over the adhesion layer, and a high-refractive index layer over the metal layer. The adhesion layer, the metal layer, and the high-refractive index layer are substantially conformal, and extend on top surfaces and sidewalls of the first and the second grid lines.

Abstract translation: 一种器件包括具有正面和背面的半导体衬底。 光敏装置设置在半导体基板的正面上。 第一和第二栅极线彼此平行，并且设置在半导体衬底的背面并且覆盖其上。 堆叠层包括粘合层，粘合层上的金属层和金属层上的高折射率层。 粘合层，金属层和高折射率层基本上共形，并且在第一和第二栅格线的顶表面和侧壁上延伸。

公开(公告)号：US20120326312A1

公开(公告)日：2012-12-27

申请号：US13167857

申请日：2011-06-24

Applicant: Shiu-Ko JangJian ,  Ting-Chun Wang ,  Szu-An Wu

Inventor： Shiu-Ko JangJian ,  Ting-Chun Wang ,  Szu-An Wu

IPC: H01L21/28 ,  H01L23/48 ,  B82Y40/00

CPC classification number: H01L23/4827 ,  H01L21/3105 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method includes forming an opening in a dielectric layer, and forming a silicon rich layer on a surface of the dielectric layer. A portion of the silicon rich layer extends into the opening and contacts the dielectric layer. A tantalum-containing layer is formed over and the contacting the silicon rich layer. An annealing is performed to react the tantalum-containing layer with the silicon rich layer, so that a tantalum-and-silicon containing layer is formed.

Abstract translation: 一种方法包括在电介质层中形成开口，并且在介电层的表面上形成富硅层。 富硅层的一部分延伸到开口中并与电介质层接触。 在富含硅层上方形成含钽层。 进行退火以使含钽层与富硅层反应，从而形成含钽和硅的层。

公开(公告)号：US08021992B2

公开(公告)日：2011-09-20

申请号：US11218695

申请日：2005-09-01

Applicant: Joung-Wei Liou ,  Tsang-Yu Liu ,  Chien-Feng Lin ,  Cheng-Liang Chang ,  Ming-Te Chen ,  Chia-Hui Lin ,  Ying-Hsiu Tsai ,  Szu-An Wu ,  Yin-Ping Lee

Inventor： Joung-Wei Liou ,  Tsang-Yu Liu ,  Chien-Feng Lin ,  Cheng-Liang Chang ,  Ming-Te Chen ,  Chia-Hui Lin ,  Ying-Hsiu Tsai ,  Szu-An Wu ,  Yin-Ping Lee

IPC: H01L21/31 ,  H01L21/469

CPC classification number: C23C16/045 ,  C23C16/46 ,  C23C16/507 ,  H01L21/76837

Abstract: A high density plasma chemical vapor deposition process including exciting gas mixture to create a plasma including ions, and directing the plasma into a dense region above the upper surface of the semiconductor wafer, heating the wafer using an additional heat source, and allowing a material from the plasma to deposit onto the semiconductor wafer.

Abstract translation: 一种高密度等离子体化学气相沉积方法，包括激发气体混合物以产生包括离子的等离子体，并将等离子体引导到半导体晶片的上表面上方的致密区域中，使用额外的热源加热晶片， 等离子体沉积到半导体晶片上。

公开(公告)号：US20090127097A1

公开(公告)日：2009-05-21

申请号：US11941435

申请日：2007-11-16

Applicant: Kei-Wei Chen ,  Shih-Ho Lin ,  Yu-Sheng Wang ,  Szu-An Wu ,  Ying-Lang Wang

Inventor： Kei-Wei Chen ,  Shih-Ho Lin ,  Yu-Sheng Wang ,  Szu-An Wu ,  Ying-Lang Wang

IPC: C23C14/00

CPC classification number: C23C14/345 ,  C23C14/046 ,  H01L21/76862 ,  H01L21/76873

Abstract: A method of forming an integrated circuit structure includes forming a dielectric layer; forming an opening in the dielectric layer; performing a net deposition step to form a seed layer having a portion in the opening, wherein the net deposition step comprises a first deposition and a first etching; performing a net etch step to the seed layer, wherein the net etch step comprises a first etching and a first deposition, wherein a portion of the seed layer remains after the net etch step; and growing a conductive material on the seed layer to fill a remaining portion of the opening.

Abstract translation: 形成集成电路结构的方法包括形成电介质层; 在介电层中形成开口; 执行净沉积步骤以形成具有在开口中的一部分的种子层，其中所述净沉积步骤包括第一沉积和第一蚀刻; 对所述种子层进行净蚀刻步骤，其中所述净蚀刻步骤包括第一蚀刻和第一沉积，其中所述种子层的一部分在所述净蚀刻步骤之后保留; 以及在种子层上生长导电材料以填充开口的剩余部分。

公开(公告)号：US20070153272A1

公开(公告)日：2007-07-05

申请号：US11322540

申请日：2005-12-30

Applicant: Joung-Wei Liou ,  Jacky Huang ,  Chih-Ming Ke ,  Szu-An Wu

Inventor： Joung-Wei Liou ,  Jacky Huang ,  Chih-Ming Ke ,  Szu-An Wu

IPC: G01J4/00

CPC classification number: G01N21/8422 ,  G01N21/211

Abstract: A system for measuring optical properties of a sample is provided. A light source provides incident polarized light. A detector detects reflected light from the sample surface. A processor determines a first coefficient (R) of the reflected light detected by the detector, determines a second coefficient (n), extinction coefficient (k), and thickness of the film based on the measured first coefficient, and determines a first dielectric constant (∈1) and a second dielectric constant (∈2) of the film according to the second coefficient (n) and extinction coefficient (k).

Abstract translation: 提供了一种用于测量样品的光学性质的系统。 光源提供入射偏振光。 检测器检测来自样品表面的反射光。 处理器确定由检测器检测的反射光的第一系数（R），基于测量的第一系数确定胶片的第二系数（n），消光系数（k）和厚度，并且确定第一介电常数 根据第二系数（n）和消光系数（k），薄膜的第二介电常数（εε2）和第二介电常数（ε∈2 <2）。

公开(公告)号：US20070049034A1

公开(公告)日：2007-03-01

申请号：US11218695

申请日：2005-09-01

Applicant: Joung-Wei Liou ,  Tsang-Yu Liu ,  Chien-Feng Lin ,  Cheng-Liang Chang ,  Ming-Te Chen ,  Chia-Hui Lin ,  Ying-Hsiu Tsai ,  Szu-An Wu ,  Yin-Ping Lee

Inventor： Joung-Wei Liou ,  Tsang-Yu Liu ,  Chien-Feng Lin ,  Cheng-Liang Chang ,  Ming-Te Chen ,  Chia-Hui Lin ,  Ying-Hsiu Tsai ,  Szu-An Wu ,  Yin-Ping Lee

IPC: H01L21/469 ,  C23C16/00

CPC classification number: C23C16/045 ,  C23C16/46 ,  C23C16/507 ,  H01L21/76837

Abstract: A high density plasma chemical vapor deposition process including exciting gas mixture to create a plasma including ions, and directing the plasma into a dense region above the upper surface of the semiconductor wafer, heating the wafer using an additional heat source, and allowing a material from the plasma to deposit onto the semiconductor wafer.

Abstract translation: 一种高密度等离子体化学气相沉积方法，包括激发气体混合物以产生包括离子的等离子体，并将等离子体引导到半导体晶片的上表面上方的致密区域中，使用额外的热源加热晶片， 等离子体沉积到半导体晶片上。

公开(公告)号：US20060270227A1

公开(公告)日：2006-11-30

申请号：US11136238

申请日：2005-05-24

Applicant: Shih-Chi Lin ,  Francis Wang ,  Wen-Long Lee ,  Szu-An Wu

Inventor： Shih-Chi Lin ,  Francis Wang ,  Wen-Long Lee ,  Szu-An Wu

IPC: H01L29/40 ,  H01L23/52 ,  H01L23/48 ,  H01L21/44

CPC classification number: H01L21/76877 ,  H01L21/02074 ,  Y10S438/906

Abstract: A method for treating a copper surface of a semiconductor device provides exposing the copper surface to a citric acid solution after the surface is formed using CMP (chemical mechanical polishing) or other methods. The citric acid treatment may take place during a cleaning operation that takes place in a wafer scrubber, or subsequent to such an operation. The citric acid treatment removes copper oxides that form on copper surfaces exposed to the environment and prevents hillock formation during subsequent high temperature operations. The copper surface is then annealed and the annealing followed by an NH3 plasma treatment which again removes any copper oxides that may be present. The NH3 plasma operation roughens exposed surfaces improving the adhesion of subsequently-formed films such as a dielectric film preferably formed in-situ with the NH3 plasma treatment. The subsequently-formed film is formed over an oxide-free, hillock-free copper surface.

Abstract translation: 用于处理半导体器件的铜表面的方法在使用CMP（化学机械抛光）或其它方法形成表面之后，使铜表面暴露于柠檬酸溶液。 柠檬酸处理可以在在晶圆洗涤器中进行的清洁操作中或者在这种操作之后进行。 柠檬酸处理除去在暴露于环境的铜表面上形成的铜氧化物，并防止在随后的高温操作期间形成小丘。 然后将铜表面退火并进行退火，然后进行NH 3等离子体处理，其再次除去可能存在的任何铜氧化物。 NH 3等离子体操作使暴露的表面粗糙化，改善随后形成的膜的粘附性，例如优选用NH 3等离子体处理原位形成的电介质膜。 随后形成的膜形成在无氧化物的无小丘的铜表面上。

公开(公告)号：US20060205232A1

公开(公告)日：2006-09-14

申请号：US11076702

申请日：2005-03-10

Applicant: Lih-Ping Li ,  Tzong-Sheng Chang ,  William Kuo ,  Tsung-Hsien Lee ,  Chun-Lin Tsai ,  Szu-An Wu ,  Yin-Ping Lee

Inventor： Lih-Ping Li ,  Tzong-Sheng Chang ,  William Kuo ,  Tsung-Hsien Lee ,  Chun-Lin Tsai ,  Szu-An Wu ,  Yin-Ping Lee

IPC: H01L21/31 ,  H01L21/469

CPC classification number: H01L21/0276 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828

Abstract: A method for etching a dielectric material in a semiconductor device is disclosed. After providing a conductive region, a dielectric layer is formed over the conductive region. A dielectric antireflective coating (DARC) layer is further formed on the dielectric layer. Then, a moisture-removal step is performed that removes moisture from the DARC layer and from an interface region between the dielectric and the DARC layer. A masking pattern is transferred into the DARC layer and the dielectric layer.

Abstract translation: 公开了一种在半导体器件中蚀刻介电材料的方法。 在提供导电区域之后，在导电区域上形成电介质层。 在电介质层上进一步形成电介质抗反射涂层（DARC）层。 然后，进行除湿步骤，其从DARC层和电介质层与DARC层之间的界面区域去除水分。 掩模图案被传送到DARC层和电介质层。

公开(公告)号：US20060017166A1

公开(公告)日：2006-01-26

申请号：US10929751

申请日：2004-08-30

Applicant: Po-Hsiung Leu ,  Harry Chuang ,  Ying-Hsiu Tsai ,  Shu-Tine Yang ,  Cheng-Hui Yang ,  Chung-Ming Feng ,  Szu-An Wu ,  Tsang-Yu Liu ,  Ming-Te Chen

Inventor： Po-Hsiung Leu ,  Harry Chuang ,  Ying-Hsiu Tsai ,  Shu-Tine Yang ,  Cheng-Hui Yang ,  Chung-Ming Feng ,  Szu-An Wu ,  Tsang-Yu Liu ,  Ming-Te Chen

IPC: H01L23/52

CPC classification number: H01L21/31629 ,  H01L21/02131 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76807 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device and method of manufacture thereof having a less free fluorine (F) fluorine containing Silica Glass (FSG) dielectric film formed thereon. The FSG dielectric film includes about 25% or less free F, has a porosity of about 5% or less and has a dielectric constant of about 3.8 or less. A first barrier layer may be disposed between a workpiece and the FSG dielectric film, and a second barrier layer may be disposed between the FSG dielectric film and at least one conductive line formed in the FSG dielectric film. The FSG dielectric film is formed by introducing SiF4:SiH4 at a reaction condition ratio of about 2.5 or less at a pressure of about 3 Torr or less and at an RF of about 500 watts to 5000 watts.

Abstract translation: 一种半导体器件及其制造方法，其上形成有较少游离的含氟（F）氟的二氧化硅玻璃（FSG）电介质膜。 FSG介电膜包括约25％或更少的游离F，具有约5％或更小的孔隙率，并且具有约3.8或更小的介电常数。 第一阻挡层可以设置在工件和FSG电介质膜之间，并且第二阻挡层可以设置在FSG电介质膜和形成在FSG绝缘膜中的至少一个导电线之间。 FSG电介质膜通过在约3托或更低的压力和约3托或更低的压力下以约2.5或更小的反应条件比引入SiF 4 Si:4H 4 约500瓦至5000瓦。

公开(公告)号：US20050121751A1

公开(公告)日：2005-06-09

申请号：US10729217

申请日：2003-12-04

Applicant: Shiu-Ko Jangjian ,  Jun Wu ,  Chi-Wen Liu ,  Ying-Lung Wang ,  Yi-Lung Cheng ,  Michael Chang ,  Szu-An Wu

Inventor： Shiu-Ko Jangjian ,  Jun Wu ,  Chi-Wen Liu ,  Ying-Lung Wang ,  Yi-Lung Cheng ,  Michael Chang ,  Szu-An Wu

IPC: H01L21/31 ,  H01L21/316 ,  H01L21/76 ,  H01L23/532 ,  H01L23/58

CPC classification number: H01L23/5329 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02131 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31629 ,  H01L21/31633 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76835 ,  H01L21/7684 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for fabricating a dielectric layer provides for use of a carbon source material separate from a halogen source material when forming a carbon and halogen doped silicate glass dielectric layer. The use of separate carbon and halogen source materials provides enhanced process latitude when forming the carbon and halogen doped silicate glass dielectric layer. Such a carbon and halogen doped silicate glass dielectric layer having a dielectric constant greater than about 3.0 is particularly useful as an intrinsic planarizing stop layer within a damascene method. A bilayer dielectric layer construction comprising a carbon and halogen doped silicate glass and a carbon doped silicate glass dielectric layer absent halogen doping is useful within a dual damascene method.