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公开(公告)号:US20150170914A1
公开(公告)日:2015-06-18
申请号:US14133511
申请日:2013-12-18
Applicant: ASM IP HOLDING B.V.
Inventor: Suvi P. Haukka , Fu Tang , Michael Givens , Jan Willem Maes , Qi Xie
IPC: H01L21/02
CPC classification number: H01L21/02568 , C23C16/0227 , C23C16/305 , C23C16/45525 , H01L21/02557 , H01L21/0262 , H01L21/02661 , H01L21/28264
Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.
Abstract translation: 在一些方面,提供了形成金属硫化物薄膜的方法。 根据一些方法,金属硫化物薄膜在循环过程中在反应空间中沉积在基底上,其中至少一个循环包括交替地和顺序地接触基底与第一气相金属反应物和第二气相硫 反应物。 在一些方面,提供了在基板表面上形成三维结构的方法。 在一些实施方案中,该方法包括在基材表面上形成金属硫化物薄膜,并在金属硫化物薄膜上形成覆盖层。 衬底表面可以包括高迁移率通道。
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公开(公告)号:US20240229233A1
公开(公告)日:2024-07-11
申请号:US18402243
申请日:2024-01-02
Applicant: ASM IP Holding B.V.
Inventor: Fu Tang , Eric Jen Cheng Liu , Eric James Shero
IPC: C23C16/40 , C23C16/44 , C23C16/448 , C23C16/455
CPC classification number: C23C16/407 , C23C16/403 , C23C16/4408 , C23C16/448 , C23C16/45553
Abstract: A method can comprise providing a zinc precursor to a reaction chamber comprising a substrate disposed therein; providing an oxygen species to the reaction chamber; forming a zinc oxide layer on the substrate in response to providing the zinc precursor and providing the oxygen species; and/or mitigating agglomeration of the zinc oxide layer. Mitigating agglomeration of the zinc oxide layer can comprise forming a capping layer on an outer surface of the zinc oxide layer such that the outer surface of the zinc oxide layer is not exposed to ambient oxygen, doping the zinc oxide layer with another material, and/or applying a post-deposition treatment to the zinc oxide layer.
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33.
公开(公告)号:US20240030296A1
公开(公告)日:2024-01-25
申请号:US18376014
申请日:2023-10-03
Applicant: ASM IP Holding B.V.
Inventor: Fu Tang , Peng-Fu Hsu , Michael Eugene Givens , Qi Xie
CPC classification number: H01L29/408 , H01L21/02145 , H01L21/0228 , H01L21/022 , H01L21/28158 , H01L29/66477 , C23C16/403 , H01L29/513 , H01L29/517 , H01L29/78 , H01L21/02205 , C23C16/401 , H01L29/161
Abstract: Methods for forming a metal silicate film on a substrate in a reaction chamber by a cyclical deposition process are provided. The methods may include: regulating the temperature of a hydrogen peroxide precursor below a temperature of 70° C. prior to introduction into the reaction chamber, and depositing the metal silicate film on the substrate by performing at least one unit deposition cycle of a cyclical deposition process. Semiconductor device structures including a metal silicate film formed by the methods of the disclosure are also provided.
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公开(公告)号:US20230197796A1
公开(公告)日:2023-06-22
申请号:US17660389
申请日:2022-04-22
Applicant: ASM IP HOLDING B.V.
Inventor: Fu Tang , Eric James Shero , Gejian Zhao , Eric Jen Cheng Liu
CPC classification number: H01L29/401 , H01L21/28088
Abstract: Threshold voltage (Vt) tuning layers may be sensitive to etching by reactants used to deposit overlying gate material, such as metal nitride. Methods for depositing Vt tuning layers are provided. In some embodiments Vt tuning layers may comprise a Vt tuning material in a neutral matrix. In some embodiments, processes for reducing or eliminating the etching of Vt tuning layers by halide reactants are described. In some embodiments a Vt tuning layer, such as a metal oxide layer, is treated by a nitridation process following deposition and prior to subsequent deposition of a metal nitride capping layer. In some embodiments an etch-protective layer, such as a NbO layer, is deposited over a Vt tuning layer prior to deposition of an overlying metal nitride layer.
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公开(公告)号:US20220367647A1
公开(公告)日:2022-11-17
申请号:US17873885
申请日:2022-07-26
Applicant: ASM IP Holding B.V.
Inventor: Fu Tang , Peng-Fu Hsu , Michael Eugene Givens , Qi Xie
Abstract: Methods for forming a metal silicate film on a substrate in a reaction chamber by a cyclical deposition process are provided. The methods may include: regulating the temperature of a hydrogen peroxide precursor below a temperature of 70° C. prior to introduction into the reaction chamber, and depositing the metal silicate film on the substrate by performing at least one unit deposition cycle of a cyclical deposition process. Semiconductor device structures including a metal silicate film formed by the methods of the disclosure are also provided.
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36.
公开(公告)号:US20200161438A1
公开(公告)日:2020-05-21
申请号:US16194041
申请日:2018-11-16
Applicant: ASM IP Holding B.V.
Inventor: Fu Tang , Peng-Fu Hsu , Michael Eugene Givens , Qi Xie
Abstract: Methods for forming a metal silicate film on a substrate in a reaction chamber by a cyclical deposition process are provided. The methods may include: regulating the temperature of a hydrogen peroxide precursor below a temperature of 70° C. prior to introduction into the reaction chamber, and depositing the metal silicate film on the substrate by performing at least one unit deposition cycle of a cyclical deposition process. Semiconductor device structures including a metal silicate film formed by the methods of the disclosure are also provided.
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公开(公告)号:US20170317194A1
公开(公告)日:2017-11-02
申请号:US15144506
申请日:2016-05-02
Applicant: ASM IP Holding B.V.
Inventor: Fu Tang , Qi Xie , Jan Willem Maes , Xiaoqiang Jiang , Michael Eugene Givens
CPC classification number: H01L29/66833 , H01L21/02112 , H01L21/02205 , H01L21/0228 , H01L21/28282
Abstract: A method for forming layers suitable for a V-NAND stack is disclosed. Specifically, the method may include multiple cycles for forming an oxide and a nitride in order to form an oxynitride layer.
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公开(公告)号:US09711396B2
公开(公告)日:2017-07-18
申请号:US14741249
申请日:2015-06-16
Applicant: ASM IP Holding B.V.
Inventor: Fu Tang , Michael Eugene Givens , Jacob Huffman Woodruff , Qi Xie , Jan Willem Maes
IPC: H01L21/768 , H01L21/02
CPC classification number: H01L21/76829 , C23C16/02 , C23C16/045 , C23C16/305 , C23C16/45553 , H01L21/02175 , H01L21/02186 , H01L21/0228 , H01L21/02304 , H01L21/285 , H01L21/76814 , H01L21/76831 , H01L21/76895 , H01L23/485 , H01L29/42364 , H01L29/517 , H01L29/78
Abstract: In some aspects, methods of forming a metal chalcogenide thin film are provided. According to some methods, a metal chalcogenide thin film is deposited on a substrate in a reaction space in a cyclical deposition process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase chalcogen reactant. In some aspects, methods of forming three-dimensional structure on a substrate surface are provided. In some embodiments, the method includes forming a metal chalcogenide dielectric layer between a substrate and a conductive layer. In some embodiments the method includes forming an MIS-type contact structure including a metal chalcogenide dielectric layer.
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公开(公告)号:US20170117203A1
公开(公告)日:2017-04-27
申请号:US15397319
申请日:2017-01-03
Applicant: ASM IP Holding B.V.
Inventor: Fu Tang , Michael E. Givens , Qi Xie , Petri Raisanen
IPC: H01L23/31 , C23C16/455 , C23C16/44 , H01L21/02
CPC classification number: H01L23/3171 , C23C16/4405 , C23C16/45544 , H01L21/02178 , H01L21/02205 , H01L21/02274 , H01L21/0228 , H01L21/02301 , H01L21/02312 , H01L21/306 , H01L21/67011 , H01L23/02 , H01L23/29 , H01L23/293 , H01L2924/0002 , H01L2924/00
Abstract: Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase sulfur precursor to passivate the high-mobility semiconductor surface.
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公开(公告)号:US20170117202A1
公开(公告)日:2017-04-27
申请号:US15397237
申请日:2017-01-03
Applicant: ASM IP Holding B.V.
Inventor: Fu Tang , Michael E. Givens , Qi Xie , Xiaoqiang Jiang , Petri Raisanen , Pauline Calka
IPC: H01L23/31 , C23C16/40 , C23C16/455 , H01L21/02 , H01L23/29
CPC classification number: H01L23/3171 , C23C16/0227 , C23C16/0272 , C23C16/305 , C23C16/40 , C23C16/45544 , H01L21/02178 , H01L21/02205 , H01L21/02274 , H01L21/0228 , H01L21/02301 , H01L21/02312 , H01L21/02532 , H01L21/02546 , H01L21/02664 , H01L21/306 , H01L23/29 , H01L23/291 , H01L23/293 , H01L28/00 , H01L2924/0002 , H01L2924/00
Abstract: Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase chalcogen precursor to passivate the high-mobility semiconductor surface.
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