公开(公告)号：US20180054118A1

公开(公告)日：2018-02-22

申请号：US15243022

申请日：2016-08-22

Applicant: Ferric Inc.

Inventor： William Lee ,  David Jew ,  Joseph Meyer ,  Noah Sturcken

IPC: H02M3/158 ,  H03M1/66

CPC classification number: H02M3/158 ,  H02M1/38 ,  H02M3/157 ,  H02M3/1588 ,  H02M2001/0058 ,  Y02B70/1491

Abstract: A switched-mode power converter includes timing control feedback loop circuits to minimize or eliminate the potential difference across a high-power switch and a low-power switch during their transitions times. A first feedback circuit compares the measured voltage across the high-power switch at the moment the high-power switch closes with the input voltage to the high-power switch to control a low-to-high delay time. A second feedback circuit compares the measured voltage across the low-power switch at the moment the low-power switch closes with the input voltage to the low-power switch to control a high-to-low delay time. A third feedback circuit compares the measured voltage across the low-power switch at the moment the low-power switch opens. The output of the third feedback circuit is provided as inputs to the first and second feedback circuits. The third feedback circuit also controls the frequency of the power converter.

公开(公告)号：US09847718B2

公开(公告)日：2017-12-19

申请号：US14814033

申请日：2015-07-30

Applicant: Ferric Inc.

Inventor： Noah Sturcken ,  David Jew ,  Joe Meyer

IPC: H02M3/158 ,  H02M1/00

CPC classification number: H02M3/158 ,  H02M3/1584 ,  H02M2001/0045

Abstract: A DC-DC power converter includes a switched inductor power converter and a parallel linear voltage regulator. Two transistors are positioned in the switched inductor power converter to periodically set a bridge voltage thereby producing a square wave with a fixed frequency and variable duty cycle. An inductor and an output capacitor filter the bridge voltage so that only the average value of the bridge voltage is passed to the load. Parasitic impedance due to physical separation of the switched inductor power converter and the load is overcome by providing the parallel linear regulator with its own dedicated channel to the load.

公开(公告)号：US20170290156A1

公开(公告)日：2017-10-05

申请号：US15084046

申请日：2016-03-29

Applicant: Ferric Inc.

Inventor： Noah Sturcken ,  Ryan Davies ,  Hao Wu ,  Michael Lekas

IPC: H05K1/18 ,  H01L23/498 ,  H03H7/38 ,  H01L23/522

CPC classification number: H05K1/18 ,  H01F17/0013 ,  H01F2017/0066 ,  H01F2017/0086 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/5226 ,  H01L23/5227 ,  H03H1/00 ,  H03H7/38 ,  H05K1/165

Abstract: An integrated passive device and assemblies containing the same are disclosed. The integrated passive device can include a thin-film magnetic inductor. Various configurations of electrically connecting an integrated passive device to a processor and/or an interposer such as a chip-scale package are also disclosed.

公开(公告)号：US20170250134A1

公开(公告)日：2017-08-31

申请号：US15409697

申请日：2017-01-19

Applicant: Ferric Inc.

Inventor： Noah Sturcken ,  Ryan Davies

IPC: H01L23/522 ,  H01L23/00 ,  H01F41/04 ,  H01L49/02 ,  H01L21/321 ,  H01F41/02 ,  H01L21/56 ,  H01L23/528

CPC classification number: H01L23/5227 ,  C08K3/08 ,  C08K3/22 ,  C08K2003/0843 ,  C08K2003/0856 ,  C08K2003/0862 ,  C08K2003/2265 ,  C08K2003/2289 ,  C08K2003/2293 ,  H01F1/26 ,  H01F1/37 ,  H01F17/0013 ,  H01F41/0206 ,  H01F41/04 ,  H01F41/046 ,  H01F2003/106 ,  H01L21/321 ,  H01L21/563 ,  H01L23/295 ,  H01L23/3142 ,  H01L23/5226 ,  H01L23/528 ,  H01L24/17 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L28/10 ,  H01L2224/13022 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/2929 ,  H01L2224/29355 ,  H01L2224/29357 ,  H01L2224/2936 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/831 ,  H01L2224/8312 ,  H01L2224/83855 ,  H01L2224/83909 ,  H01L2224/92125 ,  H01L2924/0665 ,  H01L2924/13067 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1425 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19102 ,  H01L2924/2064 ,  H01L2924/2075 ,  H01L2924/3025 ,  H01L2924/00

Abstract: A magnetic polymer for use in microelectronic fabrication includes a polymer matrix and a plurality of ferromagnetic particles disposed in the polymer matrix. The magnetic polymer can be part of an insulation layer in an inductor formed in one or more backend wiring layers of an integrated device. The magnetic polymer can also be in the form of a magnetic epoxy layer for mounting contacts of the integrated device to a package substrate.

公开(公告)号：US20150371756A1

公开(公告)日：2015-12-24

申请号：US14746994

申请日：2015-06-23

Applicant: Ferric Inc.

Inventor： Noah Sturcken ,  Ryan Davies ,  Hao Wu

IPC: H01F27/28 ,  H01F27/29 ,  H01F1/14 ,  H01F1/147 ,  H01F27/24 ,  H01F27/32

CPC classification number: H01F27/24 ,  H01F1/14708 ,  H01F13/003 ,  H01F17/0013 ,  H01F17/04 ,  H01F17/062 ,  H01F27/255 ,  H01F27/2823 ,  H01F27/2895 ,  H01F27/38 ,  H01F41/06 ,  H01F41/14 ,  H01F2017/0066 ,  H01L28/10

Abstract: Inductive elements comprising anisotropic media and biasing coils for magnetically biasing thereof and methods of manufacture and operation for use in applications such as microelectronics. Application of an electrical current through the bias coils generates a magnetic field that biases the magnetic material such that a desirable orientation of anisotropy is achieved throughout the magnetic core and enables modulation of the inductive response of the device. Electrical conductors coupled to interconnects are magnetically coupled to magnetic core layers to produce self and/or mutual inductors.

Abstract translation: 包括用于磁偏置的各向异性介质和偏置线圈的感应元件以及用于微电子学等应用的制造和操作方法。 施加通过偏置线圈的电流产生偏置磁性材料的磁场，使得在整个磁芯上实现各向异性的理想取向，并且能够调制器件的感应响应。 耦合到互连件的电导体磁耦合到磁芯层以产生自身和/或互感器。

公开(公告)号：US11735349B2

公开(公告)日：2023-08-22

申请号：US16557476

申请日：2019-08-30

Applicant: Ferric Inc.

Inventor： Noah Sturcken ,  Denis Shishkov ,  Matthew Cavallaro ,  Michael Lekas ,  Ryan Davies

IPC: H01F41/02 ,  H01F27/24 ,  H01F27/25 ,  H01F41/18

CPC classification number: H01F27/24 ,  H01F27/25 ,  H01F41/0213 ,  H01F41/18

Abstract: A method for manufacturing a vertically-laminated ferromagnetic core includes (a) depositing a conductive seed layer on or over a first side of a substrate; (b) depositing a masking layer on or over a second side of the substrate, the first and second sides on opposite sides of the substrate; (c) forming a pattern in the masking layer; (d) dry etching the substrate, based on the pattern in the masking layer, from the second side to the first side to expose portions of the conductive seed layer; and (e) depositing a ferromagnetic material onto the exposed portions of the conductive seed layer to form vertically-oriented ferromagnetic layers.

公开(公告)号：US20230215615A1

公开(公告)日：2023-07-06

申请号：US18150517

申请日：2023-01-05

Applicant: Ferric Inc.

Inventor： Michael Lekas ,  Noah Sturcken

IPC: H01F27/28 ,  H01L25/16 ,  H01L23/52 ,  H01L23/495 ,  H01L21/48 ,  H01F27/26 ,  H01F27/32 ,  H02M3/00

CPC classification number: H01F27/2847 ,  H01L25/16 ,  H01L23/52 ,  H01L23/49534 ,  H01L21/4828 ,  H01F27/266 ,  H01F27/324 ,  H01L23/49548 ,  H02M3/003 ,  H01L24/05

Abstract: An electronics assembly includes a plurality of planar conductive metal sheets including a first conductive metal sheet, a second conductive metal sheet attached and electrically coupled to the first metal sheet, and a third conductive metal sheet attached and electrically coupled to the second metal sheet. The second metal sheet is located between the first and third conductive metal sheets. Air gaps are defined in the plurality of planar conductive metal sheets to form metal traces that define electrically isolated conductive paths from an outer surface of the first conductive metal sheet to an outer surface of the third conductive metal sheet in a multilevel conductive wiring network. The multilevel conductive wiring network can be attached and electrically coupled to a microchip and to one or more capacitors to form a power converter.

公开(公告)号：US11197374B2

公开(公告)日：2021-12-07

申请号：US16279574

申请日：2019-02-19

Applicant: Ferric Inc.

Inventor： Noah Sturcken ,  Joseph Meyer ,  Michael Lekas ,  Ryan Davies ,  David Jew ,  William Lee

IPC: H02M3/158 ,  H05K1/18 ,  H05K1/11 ,  H05K1/02 ,  H01F27/24 ,  H01F27/28 ,  H01F41/02 ,  H01F41/04 ,  H05K1/16 ,  H02M3/00 ,  H01F17/00 ,  H05K1/03 ,  H02M1/00

Abstract: A switched inductor DC-DC power converter chiplet includes a CMOS power switch, an LC filter, regulation circuitry, feedback control circuitry, and interface control circuitry integrated on a common substrate. The inductor for the LC filter can be formed on the same surface or on opposing surfaces of the substrate as the electrical terminations for the substrate. Another embodiment includes a switched inductor DC-DC power converter chiplet having a first powertrain phase and multiple second powertrain phases. When the load current is less than or equal to a threshold load current, the power conversion efficiency can be improved by only operating the first powertrain phase. When the load current is greater than the threshold load current, the power conversion efficiency can be improved by operating one or more second powertrain phases.

公开(公告)号：US11146175B2

公开(公告)日：2021-10-12

申请号：US16800276

申请日：2020-02-25

Applicant: Ferric Inc.

Inventor： Samira Zaliasl ,  Noah Sturcken ,  Denis Shishkov ,  Michael Lekas

IPC: H02M3/335 ,  H02M1/08 ,  H02M3/00 ,  H02M1/00

Abstract: A power converter includes a primary circuit and a secondary circuit. The primary circuit includes two primary LC circuits that are in parallel electrically with each other. A first node of each primary LC circuit is electrically coupled to a high-voltage input. A second node of each primary LC circuit is coupled to a respective terminal of a primary inductor that forms a transformer with a secondary inductor in the secondary circuit. Each primary LC circuit is electrically coupled to a primary switch that operates at approximately the resonance frequency of the primary LC circuits to output an alternating current that passes through the primary inductor. The terminals of the secondary inductor are coupled to respective secondary switches. The switches operate at the resonance frequency of the primary LC circuit to rectify the power. A low-pass filter outputs the mean of the received voltage.

公开(公告)号：US11064610B2

公开(公告)日：2021-07-13

申请号：US16006450

申请日：2018-06-12

Applicant: Ferric Inc.

Inventor： Noah Sturcken ,  Ryan Davies ,  Michael Lekas

IPC: H01F27/28 ,  H05K1/18 ,  H01F41/04 ,  H01F41/02 ,  H01F27/24 ,  H05K1/16 ,  H05K1/02 ,  H05K1/11 ,  H01L49/02 ,  H01F10/26 ,  H01F41/32 ,  H01F17/00 ,  H05K1/03

Abstract: An inductor includes a planar laminated magnetic core and a conductive winding. The planar magnetic core includes an alternating sequence of a magnetic layer and a non-magnetic layer. The non-magnetic layer includes an insulating layer that is disposed between first and second interface layers. The conductive winding turns around in a generally spiral manner on the outside of the planar laminated magnetic core. The inductor can be integrated into a multilevel wiring network in a semiconductor integrated circuit to form a microelectronic device, such as a transformer, a power converter, or a microprocessor.