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公开(公告)号:US20160276279A1
公开(公告)日:2016-09-22
申请号:US15170250
申请日:2016-06-01
Applicant: Infineon Technologies AG
Inventor: Thorsten Meyer
IPC: H01L23/538 , H01L25/00 , H01L23/31 , H01L25/065 , H01L21/48 , H01L21/56
CPC classification number: H01L23/5389 , H01L21/4853 , H01L21/486 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L23/3114 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L23/5384 , H01L23/5386 , H01L24/96 , H01L25/0655 , H01L25/105 , H01L25/50 , H01L2224/04105 , H01L2224/12105 , H01L2224/16237 , H01L2224/20 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01082 , H01L2924/1305 , H01L2924/13055 , H01L2924/14 , H01L2924/15311 , H01L2924/00
Abstract: A semiconductor device includes a semiconductor chip, an electrically insulating element separated from the semiconductor chip by a space, and encapsulation material disposed in the space. The semiconductor chip includes a first face having a contact, and the electrically insulating element defines at least one through-hole. The encapsulation material is disposed around the semiconductor chip and around the electrically insulating element. Electrically conducting material is deposited in the through-hole of the electrically insulating element and communicates with the contact.
Abstract translation: 半导体器件包括半导体芯片,通过空间与半导体芯片分离的电绝缘元件和设置在该空间中的封装材料。 半导体芯片包括具有接触的第一面,电绝缘元件限定至少一个通孔。 封装材料设置在半导体芯片周围并且围绕电绝缘元件。 导电材料沉积在电绝缘元件的通孔中并与触点连通。
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公开(公告)号:US20140175625A1
公开(公告)日:2014-06-26
申请号:US14189304
申请日:2014-02-25
Applicant: Infineon Technologies AG
Inventor: Thorsten Meyer , Jens Pohl
IPC: H01L23/498
CPC classification number: H01L21/56 , H01L21/561 , H01L21/563 , H01L21/568 , H01L21/6836 , H01L21/78 , H01L23/28 , H01L23/31 , H01L23/3107 , H01L23/3121 , H01L23/3128 , H01L23/3135 , H01L23/3192 , H01L23/488 , H01L23/49861 , H01L23/50 , H01L23/5389 , H01L24/11 , H01L24/14 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2221/68327 , H01L2224/05001 , H01L2224/05026 , H01L2224/05548 , H01L2224/12105 , H01L2224/24195 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01029 , H01L2924/01082 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/30107 , H01L2224/82 , H01L2924/00 , H01L2224/05099
Abstract: A semiconductor device includes a chip, at least one element electrically coupled to the chip, an adhesive at least partially covering the at least one element, and a mold material at least partially covering the chip and the adhesive.
Abstract translation: 半导体器件包括芯片,至少一个元件,电耦合到芯片,至少部分覆盖至少一个元件的粘合剂,以及至少部分地覆盖芯片和粘合剂的模具材料。
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公开(公告)号:US20250060338A1
公开(公告)日:2025-02-20
申请号:US18939121
申请日:2024-11-06
Applicant: Infineon Technologies AG
Inventor: Derek Debie , Klaus Elian , Ludwig Heitzer , David Tumpold , Jens Pohl , Cyrus Ghahremani , Thorsten Meyer , Christian Geissler , Andreas Allmeier
Abstract: A radiation source device includes at least one membrane layer, a radiation source structure to emit electromagnetic or infrared radiation, a substrate and a spacer structure, wherein the substrate and the at least one membrane form a chamber, wherein a pressure in the chamber is lower than or equal to a pressure outside of the chamber, and wherein the radiation source structure is arranged between the at least one membrane layer and the substrate.
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公开(公告)号:US12176222B2
公开(公告)日:2024-12-24
申请号:US17536538
申请日:2021-11-29
Applicant: Infineon Technologies AG
Inventor: Chau Fatt Chiang , Thorsten Meyer , Chan Lam Cha , Wern Ken Daryl Wee , Chee Hong Lee , Swee Kah Lee , Norliza Morban , Khay Chwan Andrew Saw
IPC: H01L21/48 , H01L21/56 , H01L23/31 , H01L23/367 , H01L23/498 , H01L25/00 , H01L25/18
Abstract: A method of forming a semiconductor package includes providing a metal baseplate having a base section and a plurality of metal posts, the base section being a planar pad of substantially uniform thickness, the plurality of metal posts each extending up from a planar upper surface of the base section, mounting a semiconductor die on the upper surface of the metal baseplate, forming an encapsulant body of electrically insulating mold compound on the upper surface of the base section, electrically connecting terminals of the semiconductor die to the metal posts, and removing the base section so as to form package contacts from the metal posts at a first surface of the encapsulant body.
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公开(公告)号:US20230194478A1
公开(公告)日:2023-06-22
申请号:US18050178
申请日:2022-10-27
Applicant: Infineon Technologies AG
Inventor: Derek Debie , Klaus Elian , Ludwig Heitzer , David Tumpold , Jens Pohl , Cyrus Ghahremani , Thorsten Meyer , Christian Geissler , Andreas Allmeier
CPC classification number: G01N29/222 , G01N29/02 , G01N25/00 , G01N29/2425 , G01N2291/021
Abstract: A radiation source device includes at least one membrane layer, a radiation source structure to emit electromagnetic or infrared radiation, a substrate and a spacer structure, wherein the substrate and the at least one membrane form a chamber, wherein a pressure in the chamber is lower than or equal to a pressure outside of the chamber, and wherein the radiation source structure is arranged between the at least one membrane layer and the substrate.
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公开(公告)号:US20230170226A1
公开(公告)日:2023-06-01
申请号:US17536538
申请日:2021-11-29
Applicant: Infineon Technologies AG
Inventor: Chau Fatt Chiang , Thorsten Meyer , Chan Lam Cha , Wern Ken Daryl Wee , Chee Hong Lee , Swee Kah Lee , Norliza Morban , Khay Chwan Andrew Saw
IPC: H01L21/48 , H01L23/31 , H01L23/498 , H01L23/367 , H01L21/56 , H01L25/00 , H01L25/18
CPC classification number: H01L21/4853 , H01L23/31 , H01L23/49811 , H01L23/367 , H01L21/568 , H01L25/50 , H01L25/18
Abstract: A method of forming a semiconductor package includes providing a metal baseplate having a base section and a plurality of metal posts, the base section being a planar pad of substantially uniform thickness, the plurality of metal posts each extending up from a planar upper surface of the base section, mounting a semiconductor die on the upper surface of the metal baseplate, forming an encapsulant body of electrically insulating mold compound on the upper surface of the base section, electrically connecting terminals of the semiconductor die to the metal posts, and removing the base section so as to form package contacts from the metal posts at a first surface of the encapsulant body.
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公开(公告)号:US11652084B2
公开(公告)日:2023-05-16
申请号:US17078460
申请日:2020-10-23
Applicant: Infineon Technologies AG
Inventor: Thorsten Meyer , Gerald Ofner , Stephan Bradl , Stefan Miethaner , Alexander Heinrich , Horst Theuss , Peter Scherl
IPC: H01L23/00 , H01L23/495 , H01L23/31 , H01L21/677 , H01L21/56 , H01L21/67 , H01L21/48 , H01L21/78
CPC classification number: H01L24/96 , H01L21/4825 , H01L21/4839 , H01L21/561 , H01L21/677 , H01L21/67011 , H01L21/67703 , H01L21/78 , H01L23/3114 , H01L23/4952 , H01L23/49503 , H01L23/49541 , H01L23/49548 , H01L23/49582 , H01L24/97 , H01L21/565 , H01L21/568 , H01L23/3107 , H01L24/83 , H01L24/85 , H01L2224/0603 , H01L2224/291 , H01L2224/32245 , H01L2224/48247 , H01L2224/49111 , H01L2224/73265 , H01L2224/83005 , H01L2224/8384 , H01L2224/85005 , H01L2224/92247 , H01L2224/97 , H01L2924/181 , H01L2224/8384 , H01L2924/00014 , H01L2224/97 , H01L2224/83 , H01L2224/97 , H01L2224/85 , H01L2224/291 , H01L2924/014 , H01L2924/181 , H01L2924/00012 , H01L2224/73265 , H01L2224/32245 , H01L2224/48247 , H01L2924/00 , H01L2224/92247 , H01L2224/73265 , H01L2224/32245 , H01L2224/48247 , H01L2924/00
Abstract: A method of forming a semiconductor package includes providing a panel, providing one or more metal layers on an upper surface of the panel, forming a die pad and bond pads from the one or more metal layers, the die pad being adjacent to and spaced apart from the bond pads, attaching a die to the die pad, forming electrical connections between the die and the bond pads, encapsulating the die and the electrical connections with an electrically insulating mold compound, removing portions of the panel, and exposing the die pad and the bond pads after encapsulating the die.
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公开(公告)号:US20230051100A1
公开(公告)日:2023-02-16
申请号:US17980004
申请日:2022-11-03
Applicant: Infineon Technologies AG
Inventor: Bun Kian Tay , Mei Yih Goh , Martin Gruber , Josef Hoeglauer , Michael Juerss , Josef Maerz , Thorsten Meyer , Thorsten Scharf , Chee Voon Tan
IPC: H01L23/498 , H01L23/31 , H01L21/56 , H01L23/495 , H01L21/48
Abstract: A molded semiconductor package includes a lead frame having one or more first leads monolithically formed with a die pad and extending outward from the pad in a first direction. A semiconductor die is attached to the die pad at a first side of the die. A metal clip of a clip frame is attached to a power terminal at a second side of the die. One or more second leads monolithically formed with the metal clip extend outward from the clip in a second direction different than the first direction. A mold compound embeds the die. The first lead(s) and the second lead(s) are exposed at different sides of the mold compound and do not vertically overlap with one another. Within the mold compound, the clip transitions from a first level above the power terminal to a second level in a same plane as the leads.
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39.
公开(公告)号:US11552048B2
公开(公告)日:2023-01-10
申请号:US17101339
申请日:2020-11-23
Applicant: Infineon Technologies AG
Inventor: Oliver Hellmund , Barbara Eichinger , Thorsten Meyer , Ingo Muri
IPC: H01L23/544 , H01L23/00 , H01L21/78
Abstract: A semiconductor device includes a semiconductor die, an electrical contact arranged on a surface of the semiconductor die, and a metal layer arranged on the electrical contact, wherein the metal layer includes a singulated part of at least one of a metal foil, a metal sheet, a metal leadframe, or a metal plate. When viewed in a direction perpendicular to the surface of the semiconductor die, a footprint of the electrical contact and a footprint of the metal layer are substantially congruent.
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40.
公开(公告)号:US20220301959A1
公开(公告)日:2022-09-22
申请号:US17686558
申请日:2022-03-04
Applicant: Infineon Technologies AG
Inventor: Richard Knipper , Thorsten Meyer
Abstract: A semiconductor device includes a carrier comprising a recess, a semiconductor die disposed in the recess, and a parylene coating covering at least portions of the surfaces of the semiconductor die and the carrier.
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