公开(公告)号：US20170345831A1

公开(公告)日：2017-11-30

申请号：US15164749

申请日：2016-05-25

Applicant: Micron Technology, Inc.

Inventor： Ashonita A. Chavan ,  Ramanathan Gandhi ,  Beth R. Cook ,  Durai Vishak Nirmal Ramaswamy

IPC: H01L27/11507 ,  H01L49/02

Abstract: Some embodiments include a ferroelectric device comprising ferroelectric material adjacent an electrode. The device includes a semiconductor material-containing region along a surface of the ferroelectric material nearest the electrode. The semiconductor material-containing region has a higher concentration of semiconductor material than a remainder of the ferroelectric material. The device may be, for example, a transistor or a capacitor. The device may be incorporated into a memory array. Some embodiments include a method of forming a ferroelectric capacitor. An oxide-containing ferroelectric material is formed over a first electrode. A second electrode is formed over the oxide-containing ferroelectric material. A semiconductor material-enriched portion of the oxide-containing ferroelectric material is formed adjacent the second electrode.

公开(公告)号：US09231206B2

公开(公告)日：2016-01-05

申请号：US14026883

申请日：2013-09-13

Applicant: Micron Technology, Inc.

Inventor： Qian Tao ,  Matthew N. Rocklein ,  Beth R. Cook ,  D. V. Nirmal Ramaswamy

IPC: H01L47/00 ,  H01L45/00 ,  H01L27/115 ,  H01L49/02

CPC classification number: H01L27/11507 ,  H01L28/60 ,  H01L45/04 ,  H01L45/1253 ,  H01L45/14 ,  H01L45/147 ,  H01L45/1608 ,  H01L45/1641

Abstract: A method of forming a ferroelectric memory cell. The method comprises forming an electrode material exhibiting a desired dominant crystallographic orientation. A hafnium-based material is formed over the electrode material and the hafnium-based material is crystallized to induce formation of a ferroelectric material having a desired crystallographic orientation. Additional methods are also described, as are semiconductor device structures including the ferroelectric material.

Abstract translation: 形成铁电存储单元的方法。 该方法包括形成显示出期望的主要晶体取向的电极材料。 在电极材料上形成铪基材料，并且铪基材料结晶以引起具有所需晶体取向的铁电材料的形成。 还描述了另外的方法，以及包括铁电材料的半导体器件结构。

公开(公告)号：US08809157B2

公开(公告)日：2014-08-19

申请号：US14105623

申请日：2013-12-13

Applicant: Micron Technology, Inc.

Inventor： D. V. Nirmal Ramaswamy ,  Beth R. Cook ,  Lei Bi ,  Wayne Huang ,  Ian C. Laboriante

IPC: H01L21/20

CPC classification number: H01L45/1608 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1675

Abstract: A method of forming a memory cell includes forming one of multivalent metal oxide material or oxygen-containing dielectric material over a first conductive structure. An outer surface of the multivalent metal oxide material or the oxygen-containing dielectric material is treated with an organic base. The other of the multivalent metal oxide material or oxygen-containing dielectric material is formed over the treated outer surface. A second conductive structure is formed over the other of the multivalent metal oxide material or oxygen-containing dielectric material.

Abstract translation: 形成存储单元的方法包括在第一导电结构上形成多价金属氧化物材料或含氧电介质材料之一。 用有机碱处理多价金属氧化物材料或含氧电介质材料的外表面。 另外的多价金属氧化物材料或含氧电介质材料形成在经处理的外表面上。 在多价金属氧化物材料或含氧介电材料的另一个上形成第二导电结构。

公开(公告)号：US08633084B1

公开(公告)日：2014-01-21

申请号：US13654258

申请日：2012-10-17

Applicant: Micron Technology, Inc.

Inventor： D. V. Nirmal Ramaswamy ,  Beth R. Cook ,  Lei Bi ,  Wayne Huang ,  Ian C. Laboriante

IPC: H01L21/20

CPC classification number: H01L45/1608 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1675

Abstract: A method of forming a memory cell includes forming one of multivalent metal oxide material or oxygen-containing dielectric material over a first conductive structure. An outer surface of the multivalent metal oxide material or the oxygen-containing dielectric material is treated with an organic base. The other of the multivalent metal oxide material or oxygen-containing dielectric material is formed over the treated outer surface. A second conductive structure is formed over the other of the multivalent metal oxide material or oxygen-containing dielectric material.

Abstract translation: 形成存储单元的方法包括在第一导电结构上形成多价金属氧化物材料或含氧电介质材料之一。 用有机碱处理多价金属氧化物材料或含氧电介质材料的外表面。 另外的多价金属氧化物材料或含氧电介质材料形成在经处理的外表面上。 在多价金属氧化物材料或含氧介电材料的另一个上形成第二导电结构。

公开(公告)号：US11935574B2

公开(公告)日：2024-03-19

申请号：US17496564

申请日：2021-10-07

Applicant: Micron Technology, Inc.

Inventor： Michael Mutch ,  Ashonita A. Chavan ,  Sameer Chhajed ,  Beth R. Cook ,  Kamal Kumar Muthukrishnan ,  Durai Vishak Nirmal Ramaswamy ,  Lance Williamson

IPC: H01L21/00 ,  G11C11/22 ,  H01L49/02 ,  H10B53/00

CPC classification number: G11C11/221 ,  H01L28/60 ,  H10B53/00

Abstract: A memory cell comprises a capacitor comprising a first capacitor electrode having laterally-spaced walls, a second capacitor electrode comprising a portion above the first capacitor electrode, and capacitor insulator material between the second capacitor electrode and the first capacitor electrode. The capacitor comprises an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material. A parallel current leakage path is between the second capacitor electrode and the first capacitor electrode. The parallel current leakage path is circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprises leaker material that is everywhere laterally-outward of laterally-innermost surfaces of the laterally-spaced walls of the first capacitor electrode. Other embodiments, including methods, are disclosed.

公开(公告)号：US20240045604A1

公开(公告)日：2024-02-08

申请号：US17879581

申请日：2022-08-02

Applicant: Micron Technology, Inc.

Inventor： Zhuo Chen ,  Beth R. Cook ,  Dale W. Collins ,  Muralikrishnan Balakrishnan

IPC: G06F3/06

CPC classification number: G06F3/0635 ,  G06F3/0604 ,  G06F3/0679

Abstract: Methods, systems, and devices for self-aligned techniques for forming connections in a memory device are described. A redistribution layer (RDL) for coupling an electrode of a capacitor of a memory cell with a corresponding selector device may be fabricated at a same time or stage as the electrode, using self-aligned techniques. When forming portions of a memory cell, a cavity for the electrode may be etched, and a portion of the RDL that extends from the electrode cavity to a corresponding selector device may also be selectively etched. The resulting cavities may be filled with an electrode material, which may form the electrode and couple the electrode to the corresponding selector device. The resulting memory device may support implementation of a staggered configuration for memory cells, and may include electrodes that share a crystalline structure with one or more corresponding portions of an RDL.

公开(公告)号：US11170834B2

公开(公告)日：2021-11-09

申请号：US16507826

申请日：2019-07-10

Applicant: Micron Technology, Inc.

Inventor： Michael Mutch ,  Ashonita A. Chavan ,  Sameer Chhajed ,  Beth R. Cook ,  Kamal Kumar Muthukrishnan ,  Durai Vishak Nirmal Ramaswamy ,  Lance Williamson

IPC: G11C11/22 ,  H01L49/02 ,  H01L27/11502

Abstract: A memory cell comprises a capacitor comprising a first capacitor electrode having laterally-spaced walls, a second capacitor electrode comprising a portion above the first capacitor electrode, and capacitor insulator material between the second capacitor electrode and the first capacitor electrode. The capacitor comprises an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material. A parallel current leakage path is between the second capacitor electrode and the first capacitor electrode. The parallel current leakage path is circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprises leaker material that is everywhere laterally-outward of laterally-innermost surfaces of the laterally-spaced walls of the first capacitor electrode. Other embodiments, including methods, are disclosed.

公开(公告)号：US20210134816A1

公开(公告)日：2021-05-06

申请号：US17131065

申请日：2020-12-22

Applicant: Micron Technology, Inc.

Inventor： Alessandro Calderoni ,  Beth R. Cook ,  Durai Vishak Nirmal Ramaswamy ,  Ashonita A. Chavan

IPC: H01L27/11509 ,  H01G4/008 ,  H01G4/06 ,  H01G4/40 ,  H01L49/02 ,  H01L27/11504 ,  G11C11/22 ,  H01L27/11507

Abstract: Some embodiments include an integrated assembly having first electrodes with top surfaces, and with sidewall surfaces extending downwardly from the top surfaces. The first electrodes are solid pillars. Insulative material is along the sidewall surfaces of the first electrodes. Second electrodes extend along the sidewall surfaces of the first electrodes and are spaced from the sidewall surfaces by the insulative material. Conductive-plate-material extends across the first and second electrodes, and couples the second electrodes to one another. Leaker-devices electrically couple the first electrodes to the conductive-plate-material and are configured to discharge at least a portion of excess charge from the first electrodes to the conductive-plate-material. Some embodiments include methods of forming integrated assemblies.

公开(公告)号：US20210012824A1

公开(公告)日：2021-01-14

申请号：US16507826

申请日：2019-07-10

Applicant: Micron Technology, Inc.

Inventor： Michael Mutch ,  Ashonita A. Chavan ,  Sameer Chhajed ,  Beth R. Cook ,  Kamal Kumar Muthukrishnan ,  Durai Vishak Nirmal Ramaswamy ,  Lance Williamson

IPC: G11C11/22 ,  H01L27/11502 ,  H01L49/02

Abstract: A memory cell comprises a capacitor comprising a first capacitor electrode having laterally-spaced walls, a second capacitor electrode comprising a portion above the first capacitor electrode, and capacitor insulator material between the second capacitor electrode and the first capacitor electrode. The capacitor comprises an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material. A parallel current leakage path is between the second capacitor electrode and the first capacitor electrode. The parallel current leakage path is circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprises leaker material that is everywhere laterally-outward of laterally-innermost surfaces of the laterally-spaced walls of the first capacitor electrode. Other embodiments, including methods, are disclosed.

公开(公告)号：US10833092B2

公开(公告)日：2020-11-10

申请号：US16255569

申请日：2019-01-23

Applicant: Micron Technology, Inc.

Inventor： Alessandro Calderoni ,  Beth R. Cook ,  Durai Vishak Nirmal Ramaswamy ,  Ashonita A. Chavan

IPC: H01L27/11509 ,  H01G4/008 ,  H01G4/06 ,  H01G4/40 ,  H01L49/02 ,  H01L27/11504 ,  G11C11/22 ,  H01L27/11507

Abstract: Some embodiments include an integrated assembly having first electrodes with top surfaces, and with sidewall surfaces extending downwardly from the top surfaces. The first electrodes are solid pillars. Insulative material is along the sidewall surfaces of the first electrodes. Second electrodes extend along the sidewall surfaces of the first electrodes and are spaced from the sidewall surfaces by the insulative material. Conductive-plate-material extends across the first and second electrodes, and couples the second electrodes to one another. Leaker-devices electrically couple the first electrodes to the conductive-plate-material and are configured to discharge at least a portion of excess charge from the first electrodes to the conductive-plate-material. Some embodiments include methods of forming integrated assemblies.