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    Data protecting method, memory control circuit unit and memory storage device
    31.
    发明授权
    Data protecting method, memory control circuit unit and memory storage device 有权

    公开(公告)号：US09720609B1

    公开(公告)日：2017-08-01

    申请号：US15147914

    申请日：2016-05-06

    Applicant: PHISON ELECTRONICS CORP.

    Inventor： Horng-Sheng Yan ,  Kok-Yong Tan

    IPC: G06F12/00 ,  G06F3/06

    CPC classification number: G06F3/0619 ,  G06F3/0655 ,  G06F3/0688 ,  G06F11/1068 ,  G11C29/52 ,  G11C29/76

    Abstract: A data protecting method for a rewritable non-volatile memory module is provided. The method includes assigning a plurality of physical pages into a plurality of encoding groups to group a first physical page to a first encoding group and group a second physical page to a second encoding group, where each of the physical pages stores user data and a parity code corresponding to the user data, the first physical page is composed of memory cells of a first word line, and the second physical page is composed of memory cells of a second word line adjacent to the first word line. The method also includes respectively encoding the user data in the physical pages of the encoding groups for generating a plurality of group parity codes respectively corresponding to the encoding groups.

    MEMORY MANAGEMENT METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE DEVICE
    32.
    发明申请
    MEMORY MANAGEMENT METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE DEVICE 审中-公开
    存储器管理方法，存储器控制电路单元和存储器存储器件

    公开(公告)号：US20170046068A1

    公开(公告)日：2017-02-16

    申请号：US14860722

    申请日：2015-09-22

    Applicant: PHISON ELECTRONICS CORP.

    Inventor： Kok-Yong Tan

    IPC: G06F3/06

    CPC classification number: G06F3/0679 ,  G06F3/0616 ,  G06F3/0652 ,  G06F12/0246 ,  G06F2212/1036 ,  G06F2212/7202 ,  G06F2212/7205 ,  G06F2212/7211

    Abstract: A memory management method for a rewritable non-volatile memory module is provided. The method includes: selecting at least one first physical erasing unit from at least part of physical erasing units according to a first parameter. The method further includes: selecting a second physical erasing unit from the at least one first physical erasing unit according to a second parameter, wherein the second parameter is different from the first parameter; and copying at least part of data stored in the second physical erasing unit to a third physical erasing unit.

    Abstract translation: 提供了一种用于可重写非易失性存储器模块的存储器管理方法。 该方法包括：根据第一参数从至少部分物理擦除单元中选择至少一个第一物理擦除单元。 该方法还包括：根据第二参数从所述至少一个第一物理擦除单元中选择第二物理擦除单元，其中所述第二参数不同于所述第一参数; 以及将存储在第二物理擦除单元中的数据的至少一部分复制到第三物理擦除单元。

    Buffer memory accessing method, memory controller and memory storage device
    36.
    发明授权
    Buffer memory accessing method, memory controller and memory storage device 有权

    公开(公告)号：US09733832B2

    公开(公告)日：2017-08-15

    申请号：US14825178

    申请日：2015-08-13

    Applicant: PHISON ELECTRONICS CORP.

    Inventor： Kok-Yong Tan

    IPC: G06F3/06

    CPC classification number: G06F3/0604 ,  G06F3/0611 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688

    Abstract: A method for accessing a buffer memory in a memory storage device is provided, wherein the buffer memory, which has a plurality of write buffer units, is equipped in the memory storage device having a rewritable non-volatile memory module. The method includes: receiving a write data from a host system and determining whether the number of used write buffer unit is smaller than a predefined value or not. The method also includes: if the number of the used write buffer unit is not smaller than the predefined value, temporarily storing the write data into one of the write buffer unit which is not being used and transmitting a confirmation message corresponding to the write data to the host system after a predefined time interval. Therefore, the method can reduce the latency of write operations of the host system.

    MEMORY MANAGEMENT METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE APPARATUS
    38.
    发明申请
    MEMORY MANAGEMENT METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE APPARATUS 审中-公开
    存储器管理方法，存储器控制电路单元和存储器存储装置

    公开(公告)号：US20170003897A1

    公开(公告)日：2017-01-05

    申请号：US14828464

    申请日：2015-08-17

    Applicant: PHISON ELECTRONICS CORP.

    Inventor： Horng-Sheng Yan ,  Kok-Yong Tan

    IPC: G06F3/06 ,  G06F12/02

    CPC classification number: G06F3/0655 ,  G06F3/061 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7202 ,  G06F2212/7205 ,  G06F2212/7209

    Abstract: A memory management method, a memory control circuit unit and a memory storage apparatus are provided. The method includes: receiving a first write command and writing data corresponding to the first write command into a first spare physical erasing unit; detecting an amount of second spare physical erasing units excluding the first spare physical erasing unit; determining whether the amount of the second spare physical erasing units is less than a threshold value; and performing a first procedure if the amount of the second spare physical erasing units is less than the threshold value. The first procedure includes: moving valid data in the physical erasing units into at least one third spare physical erasing unit; and adjusting the threshold value from a first threshold value to a second threshold value.

    Abstract translation: 提供存储器管理方法，存储器控制电路单元和存储器存储装置。 该方法包括：接收第一写入命令并将与第一写入命令相对应的数据写入第一备用物理擦除单元; 检测除第一备用物理擦除单元之外的第二备用物理擦除单元的量; 确定所述第二备用物理擦除单元的量是否小于阈值; 以及如果所述第二备用物理擦除单元的量小于所述阈值，则执行第一过程。 第一个过程包括：将物理擦除单元中的有效数据移动到至少一个第三备用物理擦除单元; 以及将阈值从第一阈值调整到第二阈值。

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