公开(公告)号：US08558116B2

公开(公告)日：2013-10-15

申请号：US12923994

申请日：2010-10-19

Applicant: Yang Je Lee ,  Dek Gin Yang ,  Dong Gi An ,  Jae Ho Shin

Inventor： Yang Je Lee ,  Dek Gin Yang ,  Dong Gi An ,  Jae Ho Shin

IPC: H05K1/00

CPC classification number: H05K3/06 ,  H05K1/0218 ,  H05K1/0278 ,  H05K1/028 ,  H05K1/09 ,  H05K3/0035 ,  H05K3/281 ,  H05K3/386 ,  H05K3/4644 ,  H05K3/4652 ,  H05K3/4691 ,  H05K2201/0154 ,  H05K2201/0187 ,  H05K2201/0707 ,  H05K2203/0554 ,  H05K2203/1152 ,  Y10T29/49128 ,  Y10T29/49165

Abstract: The present invention provides a multilayer rigid flexible printed circuit board including: a flexible region including a flexible film having a circuit pattern formed on one or both surfaces thereof and a laser blocking layer formed on the circuit pattern; and a rigid region formed adjacent to the flexible region and including a plurality of pattern layers on one or both surfaces of extended portions extended to both sides of the flexible film of the flexible region, and a method for manufacturing the same.

Abstract translation: 本发明提供了一种多层刚性柔性印刷电路板，包括：柔性区域，包括柔性膜，其具有形成在其一个或两个表面上的电路图案和形成在电路图案上的激光阻挡层; 以及刚性区域，其形成在柔性区域附近，并且在延伸到柔性区域的柔性膜的两侧的延伸部分的一个或两个表面上包括多个图案层及其制造方法。

公开(公告)号：US12009311B2

公开(公告)日：2024-06-11

申请号：US17106907

申请日：2020-11-30

Applicant: Snap Inc.

Inventor： Stephen Andrew Steger ,  Emily Lauren Clopp

IPC: H05K1/02 ,  H01L23/552 ,  H05K9/00

CPC classification number: H01L23/552 ,  H05K1/0216 ,  H05K9/0081 ,  H05K9/0024 ,  H05K9/0052 ,  H05K9/0071 ,  H05K2201/0707 ,  H05K2201/10371

Abstract: Various circuit board systems and methods of use and manufacture thereof are disclosed. A circuit board system can have a first circuit board including a substrate and a first component susceptible to electromagnetic interference carried by the substrate. The system can also include a second circuit board including a second substrate, and a shield engaged to the substrate of the first component, the shield at least partially covering the first component and being configured to protect the first component from electromagnetic interference, wherein the shield couples the substrate of the first circuit board to the substrate of the second circuit board.

公开(公告)号：US20240023226A1

公开(公告)日：2024-01-18

申请号：US18362742

申请日：2023-07-31

Applicant: CANON KABUSHIKI KAISHA

Inventor： Yo Kobayashi ,  Koji Hirai

IPC: H05K1/02

CPC classification number: H05K1/0219 ,  H05K1/0215 ,  H05K2201/0707 ,  H05K2201/10409

Abstract: A printed circuit board includes a front layer including frame ground regions on which connectors to be connected with external apparatuses or communication cables are mounted and which are connected with a ground, a signal ground region which is separated from the frame ground regions at the front layer, on which electronic devices configured to receive signals from the connectors are mounted, and which is connected with a ground, and a static electricity removal ground region separated from the frame ground regions and the signal ground region at the front layer, situated outside the frame ground regions, and connected with a ground.

公开(公告)号：US20190208620A1

公开(公告)日：2019-07-04

申请号：US16328535

申请日：2017-08-29

Applicant: Intel Corporation

Inventor： Jackson Chung Peng KONG ,  Bok Eng CHEAH ,  Khang Choong YONG ,  Ramaswamy PARTHASARATHY

IPC: H05K1/02

CPC classification number: H05K1/0222 ,  H05K1/0219 ,  H05K1/0224 ,  H05K2201/0707 ,  H05K2201/09672

Abstract: Embodiments are generally directed to 3D high-inductive ground plane for crosstalk reduction. An embodiment of a printed circuit board includes a first signal trace and a second signal trace on a first layer, wherein the first signal trace and second signal trace are non-intersecting; a second layer below the first layer; a third layer below the second layer; and a three-dimensional (3D) ground plane, the 3D ground plane including a first plurality of segments on the third layer, a second plurality of segments on the second layer, and a plurality of metal vias to connect the first plurality of segments and the second plurality of segments in the ground plane.

公开(公告)号：US10079417B2

公开(公告)日：2018-09-18

申请号：US15614640

申请日：2017-06-06

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Noboru Kato ,  Satoshi Ishino ,  Jun Sasaki ,  Kuniaki Yosui ,  Takahiro Baba ,  Nobuo Ikemoto

IPC: H05K7/00 ,  H01P3/08 ,  H01P3/02 ,  H05K1/02 ,  H05K1/14 ,  H01P5/00 ,  H05K5/00 ,  H05K1/18 ,  H01P5/12 ,  H01P5/02 ,  H05K3/36 ,  H01P3/00

CPC classification number: H01P3/02 ,  H01P3/003 ,  H01P3/026 ,  H01P3/08 ,  H01P3/082 ,  H01P3/085 ,  H01P5/00 ,  H01P5/028 ,  H05K1/0218 ,  H05K1/0221 ,  H05K1/0237 ,  H05K1/0242 ,  H05K1/025 ,  H05K1/028 ,  H05K1/0296 ,  H05K1/14 ,  H05K1/148 ,  H05K1/186 ,  H05K3/361 ,  H05K2201/0707 ,  H05K2201/09218

Abstract: A transmission line portion of a flat cable includes first regions and second regions connected alternately. In the first region, the transmission line portion is a flexible tri-plate transmission line including a dielectric element including a signal conductor, a first ground conductor including opening portions, and a second ground conductor which is a solidly filled conductor. In the second region, the transmission line portion is a hard tri-plate transmission line including a wide dielectric element including a meandering conductor, and a first ground conductor and a second ground conductor which are solidly filled conductors. A variation width of the characteristic impedance in the second region is larger than a variation width of the characteristic impedance in the first region.

公开(公告)号：US20180168077A1

公开(公告)日：2018-06-14

申请号：US15379107

申请日：2016-12-14

Applicant: A.K. Stamping Company, Inc.

Inventor： Arthur Kurz ,  Michael Schneider

IPC: H05K9/00 ,  H05K7/20 ,  H05K1/02

CPC classification number: H05K9/0032 ,  H05K7/2039 ,  H05K2201/066 ,  H05K2201/0707

Abstract: This disclosure relates to a two-piece shield comprising a fence having integrally formed sidewalls and an upper frame, and a lid. The lid attaches to the fence, which is attached to the circuit board. The fence is a relatively thick, flexible material for supporting the lid. The fence has a recess so that the lid can be recessed into the fence to position the lid closer to the circuit for enhanced heat absorption. The lid could be made of a thicker heat absorbing material than the fence, again to facilitate heat absorption. The lid can be press-fit into the recess of the fence. The fence and lid can have a dovetail configuration to retain the lid in the fence.

公开(公告)号：US09839147B2

公开(公告)日：2017-12-05

申请号：US14882294

申请日：2015-10-13

Applicant: Apple Inc.

Inventor： Matthew D. Rohrbach

IPC: H05K5/02 ,  B60R11/02 ,  F16M11/04 ,  F16M11/22 ,  F16M11/24 ,  F16M13/00 ,  F16M13/02 ,  H04B1/3877 ,  H01F7/02 ,  G06F1/16 ,  H05K1/02 ,  H05K9/00 ,  B60R11/00 ,  H04M1/04

CPC classification number: H05K5/0204 ,  B60R11/0252 ,  B60R2011/0028 ,  F16M11/041 ,  F16M11/22 ,  F16M11/242 ,  F16M13/00 ,  F16M13/022 ,  G06F1/1633 ,  H01F7/0252 ,  H04B1/3877 ,  H04M1/04 ,  H05K1/0216 ,  H05K1/0298 ,  H05K9/002 ,  H05K2201/0707

Abstract: A magnetic stand for a tablet device is disclosed. The magnetic stand is configured to rigidly hold a portion of the tablet device in place and to shield the magnetic field from adversely affecting nearby devices susceptible to strong magnetic fields. The shielding portion of the magnetic stand allows for significant increases in magnetic field strength when compared to similarly configured, unshielded products.

公开(公告)号：US20170311438A1

公开(公告)日：2017-10-26

申请号：US15490012

申请日：2017-04-18

Applicant: Laird Technologies, Inc.

Inventor： Mohammadli Khorrami ,  Paul Francis Dixon ,  George William Rhyne

IPC: H05K1/02 ,  H01L23/64 ,  H01L23/00 ,  H05K1/18 ,  H01L23/31 ,  H01L23/552 ,  H05K3/30

CPC classification number: H05K1/0216 ,  H01L23/3114 ,  H01L23/552 ,  H01L23/64 ,  H01L23/642 ,  H01L23/645 ,  H01L24/48 ,  H01L24/85 ,  H01L2924/141 ,  H01L2924/1615 ,  H01L2924/16251 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/19107 ,  H05K1/0233 ,  H05K1/18 ,  H05K3/30 ,  H05K9/0003 ,  H05K9/0028 ,  H05K2201/0707 ,  H05K2201/10015 ,  H05K2201/1003 ,  H05K2201/10371 ,  H05K2201/2018

Abstract: According to various aspects, exemplary embodiments are disclosed of board level shields with virtual grounding capability. In an exemplary embodiment, a board level shield includes one or more resonators configured to be operable for virtually connecting the board level shield to a ground plane or a shielding surface. Also disclosed are exemplary embodiments of methods relating to making board level shields having virtual grounding capability. Additionally, exemplary embodiments are disclosed of methods relating to providing shielding for one or more components on a substrate by using a board level shield having virtual grounding capability. Further exemplary embodiments are disclosed of methods relating to making system in package (SiP) or system on chip (SoC) shielded modules and methods relating to providing shielding for one or more components of SiP or SoC module.

公开(公告)号：US20170290140A1

公开(公告)日：2017-10-05

申请号：US15091251

申请日：2016-04-05

Applicant: HARMAN INTERNATIONAL INDUSTRIES, INC.

Inventor： Elijah Auger ,  Sabin Oana

IPC: H05K1/02 ,  H01Q1/50 ,  H05K1/11

CPC classification number: H05K1/0216 ,  H01Q1/50 ,  H05K1/111 ,  H05K1/115 ,  H05K7/142 ,  H05K9/0033 ,  H05K9/0039 ,  H05K2201/0707 ,  H05K2201/10098

Abstract: An electronic device including a substrate having opposing top and bottom surfaces is provided. A ground layer is disposed in the substrate. An electrically conductive chassis has a mounting surface to receive the bottom surface of the substrate and is in electrical contact with the ground layer by a ground stitch via. An electromagnetic shield is defined by the ground layer, the ground stitch via and the chassis to enclose the bottom surface of the substrate and protect the bottom surface from electromagnetic interference. A non-conductive cover is assembled to the substrate in tension so that an interior surface of the cover applies a force to the top surface of the substrate thereby ensuring the chassis maintains in electrical contact with the ground layer.

公开(公告)号：US20170271733A1

公开(公告)日：2017-09-21

申请号：US15614640

申请日：2017-06-06

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Noboru KATO ,  Satoshi ISHINO ,  Jun SASAKI ,  Kuniaki YOSUI ,  Takahiro BABA ,  Nobuo IKEMOTO

IPC: H01P3/02 ,  H01P3/08 ,  H01P5/00 ,  H05K1/02 ,  H05K1/14 ,  H01P5/02 ,  H05K3/36

CPC classification number: H01P3/02 ,  H01P3/003 ,  H01P3/026 ,  H01P3/08 ,  H01P3/082 ,  H01P3/085 ,  H01P5/00 ,  H01P5/028 ,  H05K1/0218 ,  H05K1/0221 ,  H05K1/0237 ,  H05K1/0242 ,  H05K1/025 ,  H05K1/028 ,  H05K1/0296 ,  H05K1/14 ,  H05K1/148 ,  H05K1/186 ,  H05K3/361 ,  H05K2201/0707 ,  H05K2201/09218

Abstract: A transmission line portion of a flat cable includes first regions and second regions connected alternately. In the first region, the transmission line portion is a flexible tri-plate transmission line including a dielectric element including a signal conductor, a first ground conductor including opening portions, and a second ground conductor which is a solidly filled conductor. In the second region, the transmission line portion is a hard tri-plate transmission line including a wide dielectric element including a meandering conductor, and a first ground conductor and a second ground conductor which are solidly filled conductors. A variation width of the characteristic impedance in the second region is larger than a variation width of the characteristic impedance in the first region.