公开(公告)号：US20180046817A1

公开(公告)日：2018-02-15

申请号：US15543422

申请日：2016-01-14

Applicant: Atul GUPTA

Inventor： Atul GUPTA

IPC: G06F21/62 ,  G06F21/30 ,  H04L9/32 ,  G06F17/30

CPC classification number: G06F21/6209 ,  G06F16/9566 ,  G06F21/305 ,  H04L9/3263

Abstract: The present invention provides a method and system to facilitate the verification of genuineness of a document by visiting a unique, non-forgeable, permanent URL printed on the document and comparing the document against the original document stored at a database hosted by the system of the present invention. The verifier is given a verification certificate which can also be checked for genuineness by visiting another unique URL printed on the verification certificate.

公开(公告)号：US08685846B2

公开(公告)日：2014-04-01

申请号：US12695729

申请日：2010-01-28

Applicant: Russell J. Low ,  William T. Weaver ,  Nicholas P. T. Bateman ,  Atul Gupta

Inventor： Russell J. Low ,  William T. Weaver ,  Nicholas P. T. Bateman ,  Atul Gupta

IPC: H01L21/425

CPC classification number: H01L21/266 ,  H01J37/09 ,  H01J37/3171 ,  H01J2237/0458 ,  H01J2237/31711 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

Abstract: An improved technique for processing a substrate is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for processing a substrate. The method may comprise ion implanting a substrate disposed downstream of the ion source with ions generated in an ion source; and disposing a first portion of a mask in front of the substrate to expose the first portion of the mask to the ions, the mask being supported by the first and second mask holders, the mask further comprising a second portion wound in the first mask holder.

Abstract translation: 公开了一种用于处理衬底的改进技术。 在一个特定的示例性实施例中，该技术可以被实现为用于处理衬底的方法。 该方法可以包括离子注入在离子源的下游设置的离子，其离子在离子源中产生; 以及将掩模的第一部分设置在所述基板的前面以将所述掩模的所述第一部分暴露于所述离子，所述掩模由所述第一和第二掩模保持器支撑，所述掩模还包括缠绕在所述第一掩模保持器中的第二部分 。

公开(公告)号：US08679868B2

公开(公告)日：2014-03-25

申请号：US14043115

申请日：2013-10-01

Applicant: Atul Gupta ,  Nicholas P. T. Bateman

Inventor： Atul Gupta ,  Nicholas P. T. Bateman

IPC: H01L21/00

CPC classification number: H01L31/18 ,  H01L31/0684 ,  H01L31/1804 ,  H01L31/1864 ,  H01L31/1868 ,  Y02E10/547 ,  Y02P70/521

Abstract: An improved bifacial solar cell is disclosed. In some embodiments, the front side includes an n-type field surface field, while the back side includes a p-type emitter. In other embodiments, the p-type emitter is on the front side. To maximize the diffusion of majority carriers and lower the series resistance between the contact and the substrate, the regions beneath the metal contacts are more heavily doped. Thus, regions of higher dopant concentration are created in at least one of the FSF or the emitter. These regions are created through the use of selective implants, which can be performed on one or two sides of the bifacial solar cell to improve efficiency.

Abstract translation: 公开了一种改进的双面太阳能电池。 在一些实施例中，前侧包括n型场表面场，而后侧包括p型发射器。 在其他实施例中，p型发射器在前侧。 为了使多数载流子的扩散最大化并降低接触和衬底之间的串联电阻，金属接触点下方的区域更加重掺杂。 因此，在至少一个FSF或发射极中产生较高掺杂浓度的区域。 这些区域是通过使用选择性植入物产生的，这可以在双面太阳能电池的一侧或两侧进行，以提高效率。

公开(公告)号：US08664027B2

公开(公告)日：2014-03-04

申请号：US13364476

申请日：2012-02-02

Applicant: San Yu ,  Atul Gupta

Inventor： San Yu ,  Atul Gupta

IPC: H01L21/00

CPC classification number: H01L33/44 ,  H01L21/2654 ,  H01L21/26586 ,  H01L33/0095 ,  H01L2933/0025

Abstract: A method of LED manufacturing is disclosed. A coating is applied to a mesa. This coating may have different thicknesses on the sidewalls of the mesa compared to the top of the mesa. Ion implantation into the mesa will form implanted regions in the sidewalls in one embodiment. These implanted regions may be used for LED isolation or passivation.

Abstract translation: 公开了一种LED制造方法。 将涂层施加到台面。 与台面的顶部相比，该涂层在台面的侧壁上可能具有不同的厚度。 在一个实施例中，离子注入台面将在侧壁中形成注入区域。 这些注入区可用于LED隔离或钝化。

公开(公告)号：US08598547B2

公开(公告)日：2013-12-03

申请号：US13170815

申请日：2011-06-28

Applicant: Russell J. Low ,  Atul Gupta ,  William T. Weaver

Inventor： Russell J. Low ,  Atul Gupta ,  William T. Weaver

IPC: A61N5/00 ,  G21G5/00

CPC classification number: H01J37/20 ,  G21K5/10 ,  H01J37/304 ,  H01J37/3045 ,  H01J37/3171 ,  H01J2237/20285 ,  H01J2237/31703 ,  H01L31/18 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

Abstract: Glitches during ion implantation of a workpiece, such as a solar cell, can be compensated for. In one instance, a workpiece is implanted during a first pass at a first speed. This first pass results in a region of uneven dose in the workpiece. The workpiece is then implanted during a second pass at a second speed. This second speed is different from the first speed. The second speed may correspond to the entire workpiece or just the region of uneven dose in the workpiece.

Abstract translation: 可以补偿工件（例如太阳能电池）的离子注入期间的毛刺。 在一种情况下，在第一速度的第一次通过期间植入工件。 该第一次通过导致工件中不均匀剂量的区域。 然后在第二次通过期间以第二速度植入工件。 第二速度与第一速度不同。 第二速度可以对应于整个工件或者对应于工件中不均匀剂量的区域。

公开(公告)号：US08546157B2

公开(公告)日：2013-10-01

申请号：US13413965

申请日：2012-03-07

Applicant: Atul Gupta ,  Nicholas P. T. Bateman

Inventor： Atul Gupta ,  Nicholas P. T. Bateman

IPC: H01L21/00

CPC classification number: H01L31/18 ,  H01L31/0684 ,  H01L31/1804 ,  H01L31/1864 ,  H01L31/1868 ,  Y02E10/547 ,  Y02P70/521

Abstract: An improved bifacial solar cell is disclosed. In some embodiments, the front side includes an n-type field surface field, while the back side includes a p-type emitter. In other embodiments, the p-type emitter is on the front side. To maximize the diffusion of majority carriers and lower the series resistance between the contact and the substrate, the regions beneath the metal contacts are more heavily doped. Thus, regions of higher dopant concentration are created in at least one of the FSF or the emitter. These regions are created through the use of selective implants, which can be performed on one or two sides of the bifacial solar cell to improve efficiency.

Abstract translation: 公开了一种改进的双面太阳能电池。 在一些实施例中，前侧包括n型场表面场，而后侧包括p型发射器。 在其他实施例中，p型发射器在前侧。 为了使多数载流子的扩散最大化并降低接触和衬底之间的串联电阻，金属接触点下方的区域更加重掺杂。 因此，在至少一个FSF或发射极中产生较高掺杂浓度的区域。 这些区域是通过使用选择性植入物产生的，这可以在双面太阳能电池的一侧或两侧进行，以提高效率。

公开(公告)号：US08461032B2

公开(公告)日：2013-06-11

申请号：US12397542

申请日：2009-03-04

Applicant: Nicholas Bateman ,  Atul Gupta ,  Christopher Hatem ,  Deepak Ramappa

Inventor： Nicholas Bateman ,  Atul Gupta ,  Christopher Hatem ,  Deepak Ramappa

IPC: H01L21/425

CPC classification number: H01L33/025 ,  H01L21/26513 ,  H01L31/022441 ,  H01L31/0236 ,  H01L31/03529 ,  H01L31/0682 ,  H01L31/1864 ,  Y02E10/547 ,  Y02P70/521

Abstract: A method of tailoring the dopant profile of a substrate by utilizing two different dopants, each having a different diffusivity is disclosed. The substrate may be, for example, a solar cell. By introducing two different dopants, such as by ion implantation, furnace diffusion, or paste, it is possible to create the desired dopant profile. In addition, the dopants may be introduced simultaneously, partially simultaneously, or sequentially. Dopant pairs preferably consist of one lighter species and one heavier species, where the lighter species has a greater diffusivity. For example, dopant pairs such as boron and gallium, boron and indium, phosphorus and arsenic, and phosphorus and antimony, can be utilized.

Abstract translation: 公开了通过利用两种不同的掺杂剂来调整衬底的掺杂剂分布的方法，每种掺杂剂具有不同的扩散率。 衬底可以是例如太阳能电池。 通过引入两种不同的掺杂剂，例如通过离子注入，炉扩散或糊状物，可以产生所需的掺杂剂分布。 此外，掺杂剂可以同时，部分同时或顺序地引入。 掺杂剂对优选由一种较轻的物质和一种较重的物质组成，其中较轻的物质具有较大的扩散系数。 例如，可以使用诸如硼和镓，硼和铟，磷和砷的掺杂物对，以及磷和锑。

公开(公告)号：US08461030B2

公开(公告)日：2013-06-11

申请号：US12947078

申请日：2010-11-16

Applicant: Anthony Renau ,  Ludovic Godet ,  Timothy J. Miller ,  Joseph C. Olson ,  Vikram Singh ,  James Buonodono ,  Deepak A. Ramappa ,  Russell J. Low ,  Atul Gupta ,  Kevin M. Daniels

Inventor： Anthony Renau ,  Ludovic Godet ,  Timothy J. Miller ,  Joseph C. Olson ,  Vikram Singh ,  James Buonodono ,  Deepak A. Ramappa ,  Russell J. Low ,  Atul Gupta ,  Kevin M. Daniels

IPC: H01L21/26 ,  H01L21/42

CPC classification number: B01J19/081 ,  H01J37/3171 ,  H01J37/32357 ,  H01J37/32422 ,  H01J37/32623 ,  H01J2237/0453 ,  H01J2237/1205 ,  H01L21/2236 ,  H01L31/022425 ,  H01L31/068 ,  H01L31/08 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

Abstract: A plasma processing apparatus comprises a plasma source configured to produce a plasma in a plasma chamber, such that the plasma contains ions for implantation into a workpiece. The apparatus also includes a focusing plate arrangement having an aperture arrangement configured to modify a shape of a plasma sheath of the plasma proximate the focusing plate such that ions exiting an aperture of the aperture arrangement define focused ions. The apparatus further includes a processing chamber containing a workpiece spaced from the focusing plate such that a stationary implant region of the focused ions at the workpiece is substantially narrower that the aperture. The apparatus is configured to create a plurality of patterned areas in the workpiece by scanning the workpiece during ion implantation.

公开(公告)号：US08407509B2

公开(公告)日：2013-03-26

申请号：US12901579

申请日：2010-10-11

Applicant: Rajeev Sharma ,  Ajay Kumar ,  Naresh Dhamija ,  Atul Gupta ,  Ajay K. Gaite ,  Llamparidhi l

Inventor： Rajeev Sharma ,  Ajay Kumar ,  Naresh Dhamija ,  Atul Gupta ,  Ajay K. Gaite ,  Llamparidhi l

IPC: G06F1/04 ,  G06F13/00 ,  G06F13/42

CPC classification number: G06F13/1689 ,  G06F13/4243

Abstract: A method for compensating for variations in timing of data sent to a processor on data bit lines relative to a strobe clock sent to the processor on a strobe clock line that can be used in a dual data rate (DDR) memory identifies discrete minimum and maximum time offset values for test data in selected data bit patterns for the data bit lines. The discrete minimum time offset value is the minimum timing adjustment required to allow the processor to receive the data in a steady-state condition during a data valid window of the strobe clock and the discrete maximum time offset value is a maximum timing adjustment required to allow the processor to receive the data in a steady-state condition during a data valid window of the strobe clock. The discrete minimum and maximum time offset values identify a valid range when the data bit lines supply data in a steady-state condition for latching into the processor by the strobe clock.

Abstract translation: 用于补偿在数据位线上相对于在双数据速率（DDR）存储器中使用的选通时钟线上发送到处理器的选通时钟的数据位线发送的数据的时序变化的方法，该方法能够识别离散的最小和最大值 用于数据位线的选定数据位模式中的测试数据的时间偏移值。 离散的最小时间偏移值是在选通时钟的数据有效窗口期间允许处理器在稳态条件下接收数据所需的最小定时调整，并且离散最大时间偏移值是允许允许的最大定时调整 所述处理器在所述选通时钟的数据有效窗口期间以稳态条件接收所述数据。 当数据位线在稳态条件下提供数据以通过选通时钟锁存到处理器中时，离散的最小和最大时间偏移值标识有效范围。

公开(公告)号：US20120244692A1

公开(公告)日：2012-09-27

申请号：US13489031

申请日：2012-06-05

Applicant: Nicholas Bateman ,  Kevin Daniels ,  Atul Gupta ,  Russell Low ,  Benjamin Riordon ,  Robert Mitchell ,  Steven Anella

Inventor： Nicholas Bateman ,  Kevin Daniels ,  Atul Gupta ,  Russell Low ,  Benjamin Riordon ,  Robert Mitchell ,  Steven Anella

IPC: H01L21/266

CPC classification number: H01L21/677 ,  H01J37/3171 ,  H01J2237/31711 ,  H01L21/68735 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

Abstract: An improved, lower cost method of processing substrates, such as to create solar cells is disclosed. In addition, a modified substrate carrier is disclosed. The carriers typically used to carry the substrates are modified so as to serve as shadow masks for a patterned implant. In some embodiments, various patterns can be created using the carriers such that different process steps can be performed on the substrate by changing the carrier or the position with the carrier. In addition, since the alignment of the substrate to the carrier is critical, the carrier may contain alignment features to insure that the substrate is positioned properly on the carrier. In some embodiments, gravity is used to hold the substrate on the carrier, and therefore, the ions are directed so that the ion beam travels upward toward the bottom side of the carrier.

Abstract translation: 公开了一种改进的，低成本的处理衬底的方法，例如制造太阳能电池。 此外，公开了改进的基板载体。 通常用于承载衬底的载体被修改为用作图案化植入物的荫罩。 在一些实施例中，可以使用载体创建各种图案，使得可以通过用载体改变载体或位置来在基板上执行不同的工艺步骤。 此外，由于基板与载体的对准是关键的，所以载体可以包含对准特征以确保基板正确地定位在载体上。 在一些实施例中，使用重力来将衬底保持在载体上，因此，引导离子使得离子束朝向载体的底侧向上移动。