Scheduling heterogeneous computation on multithreaded processors

    公开(公告)号:US12118398B2

    公开(公告)日:2024-10-15

    申请号:US16041066

    申请日:2018-07-20

    Abstract: Aspects include computation systems that can identify computation instances that are not capable of being reentrant, or are not reentrant capable on a target architecture, or are non-reentrant as a result of having a memory conflict in a particular execution situation. For example, a system can have a plurality of computation units, each with an independently schedulable SIMD vector. Computation instances can be defined by a program module, and a data element(s) that may be stored in a local cache for a particular computation unit of the plurality. Each local cache does not maintain coherency controls for such data elements. During scheduling, a scheduler can maintain a list of running (or runnable) instances, and attempt to schedule new computation instances by determining whether any new computation instance conflicts with a running instance and responsively defer scheduling. Such memory conflict checks can be conditioned on a flag or other indication of the potential for non-reentrancy.

    METHODS AND SYSTEMS FOR PERFORMING A SPARSE SUBMANIFOLD CONVOLUTION USING AN NNA

    公开(公告)号:US20240320298A1

    公开(公告)日:2024-09-26

    申请号:US18591401

    申请日:2024-02-29

    CPC classification number: G06F17/16

    Abstract: Methods of implementing a sparse submanifold convolution using a neural network accelerator. The methods include: receiving, at the neural network accelerator, an input tensor in a sparse format; performing, at the neural network accelerator, for each position of a kernel of the sparse submanifold convolution, a 1×1 convolution between the received input tensor and weights of filters of the sparse submanifold convolution at that kernel position to generate a plurality of partial outputs; and combining appropriate partial outputs of the plurality of partial outputs to generate an output tensor of the sparse submanifold convolution in sparse format.

    HARDWARE EFFICIENT ROUNDING
    45.
    发明公开

    公开(公告)号:US20240319963A1

    公开(公告)日:2024-09-26

    申请号:US18581261

    申请日:2024-02-19

    CPC classification number: G06F7/49963

    Abstract: A binary logic circuit and method for rounding an unsigned normalised n-bit binary number to an m-bit binary number. A correction value of length of n bits and a pre-truncation value of length of n bits are determined. The correction value is determined by shifting the n-bit number by m bits. The pre-truncation value is determined based on at least the n-bit number, the correction value, a value for the most significant bit (MSB) of the n-bit number, and a rounding value having a ‘1’ at the n−mth bit position and a ‘0’ at all other bits. The rounded m-bit number is then obtained by truncating the n−m least significant bits (LSB) of the pre-truncation value.

    DATA COMPRESSION AND DECOMPRESSION METHODS AND SYSTEMS IN RAY TRACING

    公开(公告)号:US20240303867A1

    公开(公告)日:2024-09-12

    申请号:US18599517

    申请日:2024-03-08

    Abstract: A method of compressing data for representing displacement information in a ray tracing system, wherein the displacement information indicates displacements to be applied to geometry in a scene to be rendered by the ray tracing system. The method includes retrieving a pair of datasets representing the displacement information, wherein a first of the datasets comprises a first array of values, and a second of the datasets comprises a second array of values; retrieving values from a corresponding array position in each of the first and second arrays, wherein the retrieved values form a pair of values representing an upper and lower bound of a magnitude of displacement for the corresponding array position. The method includes identifying which of a plurality of predetermined conditions the pair of values satisfies, and encoding the pair of values as a single value in a compressed dataset, wherein the single value represents the identified predetermined condition.

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