公开(公告)号：US10535595B2

公开(公告)日：2020-01-14

申请号：US15776402

申请日：2015-12-26

Applicant: Intel Corporation

Inventor： Robert L. Sankman ,  Adel A. Elsherbini

IPC: H01L23/48 ,  H01L23/52 ,  H01L23/498 ,  H01L25/065 ,  H01L23/538 ,  H01L23/00

Abstract: Embodiments are generally directed to a conductive base embedded interconnect. An embodiment of an apparatus includes a substrate; an embedded interconnect layer in a first side of the substrate, the embedded interconnect layer including a plurality of contacts; and one or more conductive paths through the substrate, the one or more conductive paths being connected with the embedded interconnect layers.

公开(公告)号：US10476545B2

公开(公告)日：2019-11-12

申请号：US15745980

申请日：2015-09-25

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  Telesphor Kamgaing ,  Sasha N. Oster ,  Brandon M. Rawlings ,  Georgios C. Dogiamis

IPC: H04B1/40 ,  H04B1/00 ,  H01L25/00 ,  H01L23/00

Abstract: Communication is described between integrated circuit packages using a millimeter-wave wireless radio fabric. In one example a first package has a radio transceiver to communicate with a radio transceiver of a second package. The second package has a radio transceiver to communicate with the radio transceiver of the first package. A switch communicates with the first package and the second package to establish a connection through the respective radio transceivers between the first package and the second package. A system board carries the first package, the second package, and the switch.

公开(公告)号：US20190305396A1

公开(公告)日：2019-10-03

申请号：US15972441

申请日：2018-05-07

Applicant: Intel Corporation

Inventor： Georgios Dogiamis ,  Adel A. Elsherbini

IPC: H01P1/208 ,  H01P3/12 ,  H01P5/10 ,  H01P11/00

Abstract: Microelectronic assemblies that include a lithographically-defined substrate integrated waveguide (SIW) component, and related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate portion having a first face and an opposing second face; and an SIW component that may include a first conductive layer on the first face of the package substrate portion, a dielectric layer on the first conductive layer, a second conductive layer on the dielectric layer, and a first conductive sidewall and an opposing second conductive sidewall in the dielectric layer, wherein the first and second conductive sidewalls are continuous structures.

公开(公告)号：US10432167B2

公开(公告)日：2019-10-01

申请号：US15088814

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  Feras Eid ,  Baris Bicen ,  Telesphor Kamgaing ,  Vijay K. Nair ,  Johanna M. Swan ,  Georgios C. Dogiamis ,  Valluri R. Rao

IPC: H03H9/17 ,  H03H9/02 ,  H03H9/24 ,  H03H9/15

Abstract: Embodiments of the invention include a piezoelectric resonator which includes an input transducer having a first piezoelectric material, a vibrating structure coupled to the input transducer, and an output transducer coupled to the vibrating structure. In one example, the vibrating structure is positioned above a cavity of an organic substrate. The output transducer includes a second piezoelectric material. In operation the input transducer causes an input electrical signal to be converted into mechanical vibrations which propagate across the vibrating structure to the output transducer.

公开(公告)号：US20190198961A1

公开(公告)日：2019-06-27

申请号：US16329587

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Georgios C. Dogiamis ,  Telesphor Kamgaing ,  Sasha N. Oster ,  Adel A. Elsherbini ,  Shawna M. Liff ,  Johanna M. Swan ,  Brandon M. Rawlings ,  Richard J. Dischler

IPC: H01P3/16 ,  H01Q9/04 ,  H01P11/00

CPC classification number: H01P3/16 ,  H01P3/122 ,  H01P11/002 ,  H01P11/006 ,  H01Q9/045 ,  H04L67/10

Abstract: A method of forming a waveguide comprises forming an elongate waveguide core including a dielectric material; and arranging a conductive sheet around an outside surface of the dielectric core to produce a conductive layer around the waveguide core.

公开(公告)号：US10263346B2

公开(公告)日：2019-04-16

申请号：US15197531

申请日：2016-06-29

Applicant: INTEL CORPORATION

Inventor： Telesphor Kamgaing ,  Adel A. Elsherbini

IPC: H01Q21/29 ,  H01Q3/24 ,  H01Q3/26 ,  H01Q15/08 ,  H01Q21/06 ,  H01Q23/00 ,  H01Q25/00 ,  H01P11/00 ,  H01Q1/50 ,  H01Q1/36

Abstract: Embodiments of the present disclosure are directed to a single-package communications device that includes an antenna module with a plurality of independently selectable arrays of antenna elements. The antenna elements of the different arrays may send and/or receive data signals over different ranges of signal angles. The communications device may further include a switch module to separately activate the individual arrays. In some embodiments, a radio frequency (RF) communications module may be included in the package of the communications device. In some embodiments, the RF communications module may be configured to communicate over a millimeter-wave (mm-wave) network using the plurality of arrays of antenna elements.

公开(公告)号：US10256206B2

公开(公告)日：2019-04-09

申请号：US15923346

申请日：2018-03-16

Applicant: Intel Corporation

Inventor： Javier A. Falcon ,  Ye Seul Nam ,  Adel A. Elsherbini ,  Roman Caudillo ,  James S. Clarke

IPC: H01L23/00 ,  H01L39/04 ,  H01L23/16

Abstract: Embodiments of the present disclosure describe novel qubit device packages, as well as related computing devices and methods. In one embodiment, an exemplary qubit device package includes a qubit die and a package substrate, where the qubit die is coupled to the package substrate using one or more preforms. In particular, a single preform may advantageously be used to replace a plurality of individual contacts, e.g. a plurality of individual solder bumps, electrically coupling the qubit die to the package substrate. Such packages may reduce design complexity and undesired coupling, and enable inclusion of larger numbers of qubits in a single qubit die.

公开(公告)号：US10215164B2

公开(公告)日：2019-02-26

申请号：US14961116

申请日：2015-12-07

Applicant: Intel Corporation

Inventor： Nadine L. Dabby ,  Feras Eid ,  Adel A. Elsherbini ,  Braxton Lathrop ,  Aleksandar Aleksov ,  Sasha Oster

IPC: H01L41/113 ,  F03G5/08 ,  H02N2/18

Abstract: A device for harvesting energy from fabric or clothing includes a piece of fabric or clothing. One or more piezoelectric harvesters are coupled with the piece of fabric or clothing. The piezoelectric harvesters are capable of producing electric energy in response to the movement of the piece of fabric or clothing. Additionally, the device includes one or more energy storage mediums coupled to the one or more piezoelectric harvesters. The energy storage mediums are capable of storing the energy produced by the one or more piezoelectric harvesters. Further, the method for harvesting energy from fabric or clothing involves moving a piece of fabric such that one or more piezoelectric harvesters generate electricity. The method for harvesting energy from fabric or clothing also involves storing the generated electricity in one or more energy storage mediums.

公开(公告)号：US09824901B2

公开(公告)日：2017-11-21

申请号：US15085538

申请日：2016-03-30

Applicant: Intel Corporation

Inventor： Sasha Oster ,  Adel A. Elsherbini ,  Joshua D. Heppner ,  Shawna M. Liff

IPC: H01L21/56 ,  H01L23/31

CPC classification number: H01L23/315 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/42 ,  H01L23/4334 ,  H01L23/467 ,  H01L2224/16227 ,  H01L2224/97 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2224/81

Abstract: Molded electronics package cavities are formed by placing a sacrificial material in the mold and then decomposing, washing, or etching away this sacrificial material. The electronics package that includes this sacrificial material is then overmolded, with little or no change needed in the overmolding process. Following overmolding, the sacrificial material is removed such as using a thermal, chemical, optical, or other decomposing process. This proposed use of sacrificial material allows for formation of complex 3-D cavities, and reduces or eliminates the need for precise material removal tolerances. Multiple instances of the sacrificial material may be removed simultaneously, replacing a serial drilling process with a parallel material removal manufacturing process.

公开(公告)号：US20170288290A1

公开(公告)日：2017-10-05

申请号：US15087802

申请日：2016-03-31

Applicant: Intel Corporation

Inventor： Sasha N. Oster ,  Adel A. Elsherbini ,  Kemal Aygun ,  Robert L. Sankman

IPC: H01P3/06 ,  H01B11/18 ,  G06F1/16

CPC classification number: H01P3/06 ,  G06F1/16 ,  H01B11/1891 ,  H01P3/02

Abstract: Electrical cable technology is disclosed. In one example, an electrical cable can include a transmission line conductor, a ground conductor, and a dielectric material. The dielectric material can have at least a portion with a thickness separating the transmission line conductor and the ground conductor that is variable along a length of the electrical cable. Such a non-uniform cable (e.g., a cable having components or features that vary in size and/or geometry along the length of the cable) can provide high IO density with acceptable conductive losses and cross-talk while maintaining a desired impedance.