Information processing apparatus, information processing method, and information processing program

    公开(公告)号:US09658909B2

    公开(公告)日:2017-05-23

    申请号:US14755564

    申请日:2015-06-30

    Inventor: Takafumi Torino

    Abstract: An information processing apparatus includes a storage configured to store trace information relating to execution conditions of monitoring subjects, and a determination value, the determination value being a number of the monitoring subjects using a specific resource that can be used by the monitoring subjects, and a processor configured to increase the determination value by a predetermined value when one of the monitoring subjects starts to use the specific resource, reduce the determination value by the predetermined value when one of the monitoring subjects stops using the specific resource, and delete the trace information stored in the storage when the determination value indicates that none of the monitoring subjects are using the specific resource.

    Opportunistic execution of secondary copy operations

    公开(公告)号:US09645891B2

    公开(公告)日:2017-05-09

    申请号:US14561046

    申请日:2014-12-04

    Abstract: Rather than relying on pre-defined scheduling of secondary copy operations such as backup jobs, the illustrative opportunistic approach initiates secondary copy operations based on changing operational conditions in a storage management system. An adaptive backup readiness score is based on a number of backup-readiness operational factors. An illustrative enhanced data agent which is associated with the target database application (or other executable component) may monitor the operational factors and determine the backup readiness score based on weights assigned to the respective operational factors. The enhanced data agent may evaluate recent backup jobs to determine which of the operational factors that contributed to the backup readiness score may have been most relevant. Based on the most-relevant analysis, the enhanced data agent may adapt the weights assigned to the monitored operational factors, so that the backup readiness score may be more suitable and responsive to ongoing operational conditions in the system.

    Causing an interrupt based on event count
    48.
    发明授权
    Causing an interrupt based on event count 有权
    导致基于事件计数的中断

    公开(公告)号:US09575766B2

    公开(公告)日:2017-02-21

    申请号:US13991878

    申请日:2011-12-29

    Abstract: Some implementations provide techniques and arrangements for causing an interrupt in a processor in response to an occurrence of a number of events. A first event counter counts the occurrences of a type of event within the processor and outputs a signal to activate a second event counter in response to reaching a first predefined count. The second event counter counts the occurrences of the type of event within the processor and causes an interrupt of the processor in response to reaching a second predefined count.

    Abstract translation: 一些实现提供了响应于多个事件的发生而在处理器中引起中断的技术和布置。 第一事件计数器对处理器内事件类型的发生进行计数,并响应于达到第一预定义计数而输出信号以激活第二事件计数器。 第二事件计数器对处理器内的事件类型的发生进行计数,并响应于达到第二预定义计数而导致处理器的中断。

    CALCULATING THE CLOCK FREQUENCY OF A PROCESSOR
    49.
    发明申请
    CALCULATING THE CLOCK FREQUENCY OF A PROCESSOR 有权
    计算处理器的时钟频率

    公开(公告)号:US20170010627A1

    公开(公告)日:2017-01-12

    申请号:US14792593

    申请日:2015-07-06

    Abstract: Apparatuses, methods, systems, and computer program products are disclosed for calculating a clock rate of a processor. A baseline data module receives a first set of performance data associated with a processor. The performance data is generated using a hardware element that captures performance data for the processor. The hardware element is external to the processor. An update data module receives a second set of performance data associated with the processor a predefined time interval after the first set of performance data is received. The second set of performance data corresponds to the first set of performance data. A rate module calculates a clock rate for the processor based on the first set of performance data and the second set of performance data.

    Abstract translation: 公开了用于计算处理器的时钟速率的装置,方法,系统和计算机程序产品。 基线数据模块接收与处理器相关联的第一组性能数据。 使用捕获处理器的性能数据的硬件元素生成性能数据。 硬件元素在处理器外部。 更新数据模块在接收到第一组性能数据之后的预定时间间隔内接收与处理器相关联的第二组性能数据。 第二组演奏数据对应于第一组演奏数据。 速率模块基于第一组性能数据和第二组性能数据来计算处理器的时钟速率。

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