公开(公告)号：US20100073845A1

公开(公告)日：2010-03-25

申请号：US12237409

申请日：2008-09-25

Applicant: SEIGI SUH ,  Esther Kim ,  William J. Borland ,  Christopher Allen Gross ,  Omega N. Mack ,  Timothy R. Overcash

Inventor： SEIGI SUH ,  Esther Kim ,  William J. Borland ,  Christopher Allen Gross ,  Omega N. Mack ,  Timothy R. Overcash

IPC: H01G4/00 ,  B05D5/12

CPC classification number: H01G4/12 ,  H01G13/00 ,  H05K1/162 ,  H05K2201/0175 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2203/1126 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49163

Abstract: Disclosed are methods of making a dielectric on a metal foil, and a method of making a large area capacitor that includes a dielectric on a metal foil. A first dielectric layer is formed over the metal foil by physical vapor deposition, and a dielectric precursor layer is formed over the first dielectric layer by chemical solution deposition. The metal foil, first dielectric layer and dielectric precursor layer are prefired at a prefiring temperature in the range of 350 to 650° C. The prefired dielectric precursor layer, the first dielectric layer and the base metal foil are subsequently fired at a firing temperature in the range of 700 to 1200° C.

Abstract translation: 公开了在金属箔上制造电介质的方法，以及制造在金属箔上包含电介质的大面积电容器的方法。 通过物理气相沉积在金属箔上形成第一电介质层，并且通过化学溶液沉积在第一介电层上形成电介质前体层。 金属箔，第一电介质层和电介质前体层在预热温度为350至650℃的范围内预烧制。预烧电介质前体层，第一介电层和贱金属箔随后在焙烧温度 范围700〜1200℃

公开(公告)号：US07638714B2

公开(公告)日：2009-12-29

申请号：US11969485

申请日：2008-01-04

Applicant: Yu-Hsueh Lin

Inventor： Yu-Hsueh Lin

IPC: H05K1/00

CPC classification number: H05K7/205 ,  H01L23/3732 ,  H01L2924/0002 ,  H05K1/053 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0323 ,  H05K2203/0315 ,  H01L2924/00

Abstract: A method for manufacturing a substrate board with high efficiency of heat conduction and electrical isolation is disclosed. The method comprises the steps of: providing a substrate layer with an arrangement surface and a heat-dissipating surface; executing an anodic treatment on the arrangement surface and the heat-dissipating surface to respectively form a first anodic treatment layer and a second anodic treatment layer; forming a heat conduction and electrical isolation layer on the second anodic treatment layer; and forming a diamond like carbon (DLC) layer on the heat conduction and electrical isolation layer. The heat expansion coefficient of the substrate layer is greater than that of the second anodic treatment layer, the heat conduction and electrical isolation layer, and the DLC layer in turn.

Abstract translation: 公开了一种用于制造具有高效率的热传导和电隔离的基板的方法。 该方法包括以下步骤：为衬底层提供布置表面和散热表面; 对配置面和散热面进行阳极处理，分别形成第一阳极处理层和第二阳极处理层; 在所述第二阳极处理层上形成导热和电隔离层; 并在导热和电隔离层上形成类金刚石碳（DLC）层。 衬底层的热膨胀系数大于第二阳极处理层，热传导和电隔离层以及DLC层的热膨胀系数。

公开(公告)号：US07601181B2

公开(公告)日：2009-10-13

申请号：US11923974

申请日：2007-10-25

Applicant: William Borland ,  Ian Burn ,  Jon Fredrick Ihlefeld ,  Jon Paul Maria ,  Seigi Suh

Inventor： William Borland ,  Ian Burn ,  Jon Fredrick Ihlefeld ,  Jon Paul Maria ,  Seigi Suh

IPC: H01L21/8242 ,  H01G9/00

CPC classification number: H01L21/02197 ,  C01G23/006 ,  C01P2004/82 ,  C01P2006/40 ,  H01G4/1227 ,  H01G4/33 ,  H01L21/02337 ,  H01L21/31691 ,  H05K1/162 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0355 ,  Y10T29/417 ,  Y10T29/435 ,  Y10T29/4913 ,  Y10T428/31678

Abstract: Described herein are methods for making articles comprising a dielectric layer formed from any solution composition that can form barium titanate during firing and containing manganese in an amount between 0.002 and 0.05 atom percent of the solution composition, wherein the dielectric layer has been formed on metal foil and fired in a reducing atmosphere.

Abstract translation: 本文描述了制备制品的方法，所述方法包括由任意溶液组合物形成的介电层，所述溶液组合物在焙烧期间可以形成钛酸钡并且含有0.002至0.05原子％的溶液组成的量，其中介电层已经形成在金属箔 并在还原气氛中开火。

公开(公告)号：US07592626B2

公开(公告)日：2009-09-22

申请号：US11635000

申请日：2006-12-07

Applicant: Yumiko Ozaki ,  Osamu Shinoura

Inventor： Yumiko Ozaki ,  Osamu Shinoura

IPC: H01L27/108

CPC classification number: H01G4/206 ,  H01L28/55 ,  H05K1/162 ,  H05K2201/0175 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2203/1105 ,  H05K2203/135

Abstract: A capacitor comprises: a lower electrode formed of a foil made of a polycrystalline metal; an upper conductor layer; and a dielectric layer disposed between the lower electrode and the upper electrode layer. Grain boundaries of the polycrystalline metal appear at the top surface of the lower electrode. The capacitor further comprises an insulator that is disposed between the top surface of the dielectric layer and the bottom surface of the upper electrode layer and that is present only in part of a region in which the top surface of the dielectric layer and the bottom surface of the upper electrode layer face each other. The insulator is disposed to cover at least part of the grain boundaries appearing at the top surface of the lower electrode when seen from above the top surface of the dielectric layer. The insulator is formed by electrophoresis.

Abstract translation: 电容器包括：由多晶金属制成的箔形成的下电极; 上导体层; 以及设置在下电极和上电极层之间的电介质层。 多晶金属的晶界出现在下电极的顶表面。 电容器还包括设置在电介质层的顶表面和上电极层的底表面之间的绝缘体，并且其仅存在于介电层的顶表面和底表面的部分区域中的一部分 上电极层彼此面对。 当从电介质层的顶表面上方观察时，绝缘体设置成覆盖出现在下电极的顶表面处的晶界的至少一部分。 绝缘体通过电泳形成。

公开(公告)号：US20090197375A1

公开(公告)日：2009-08-06

申请号：US12320559

申请日：2009-01-29

Applicant: Ryoichi Kajiwara ,  Shigehisa Motowaki ,  Kazutoshi Itou ,  Hiroshi Hozoji

Inventor： Ryoichi Kajiwara ,  Shigehisa Motowaki ,  Kazutoshi Itou ,  Hiroshi Hozoji

IPC: H01L21/02 ,  B05D3/02 ,  B05D3/06 ,  H05H1/00 ,  B32B15/01

CPC classification number: H01L23/49582 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49586 ,  H01L24/29 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29116 ,  H01L2224/2919 ,  H01L2224/29298 ,  H01L2224/32245 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/48699 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/84801 ,  H01L2224/92247 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/351 ,  H05K1/0306 ,  H05K1/053 ,  H05K1/056 ,  H05K3/28 ,  H05K2201/0175 ,  H05K2201/0195 ,  H05K2203/121 ,  Y10T428/12493 ,  Y10T428/12868 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2924/00012

Abstract: A fabrication method for a metal-base/polymer-resin bonded structured body according to the present invention includes the steps of: (1) applying, to a surface of the metal base, a solution containing an organometallic compound decomposable at 350° C. or lower; (2) baking the applied solution in an oxidizing atmosphere to form, on the surface of the metal base, a coating containing an oxide of the metal of the organometallic compound; (3) providing the polymer resin on the coating; and (4) hardening the polymer resin to provide the metal-base/polymer-resin bonded structured body.

Abstract translation: 根据本发明的金属基/聚合物 - 树脂结合结构体的制造方法包括以下步骤：（1）向金属基材的表面施加含有可在350℃分解的有机金属化合物的溶液。 或更低; （2）在氧化气氛中烘烤涂布的溶液，在金属基材的表面形成含有有机金属化合物的金属的氧化物的涂层; （3）在涂层上提供聚合物树脂; 和（4）硬化聚合物树脂以提供金属基/聚合物 - 树脂结合体。

公开(公告)号：US07561406B2

公开(公告)日：2009-07-14

申请号：US11730154

申请日：2007-03-29

Applicant: Hitoshi Saita ,  Yuko Saya ,  Kiyoshi Uchida ,  Kenji Horino

Inventor： Hitoshi Saita ,  Yuko Saya ,  Kiyoshi Uchida ,  Kenji Horino

IPC: H01G4/008 ,  H01G4/06 ,  H01G7/00

CPC classification number: H01G4/008 ,  H01G4/33 ,  H01L27/016 ,  H01L27/0682 ,  H01L27/0802 ,  H01L27/0811 ,  H01L28/55 ,  H05K1/09 ,  H05K1/162 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0355 ,  Y10T29/417 ,  Y10T29/435

Abstract: A thin film capacitor with high capacity and low leak current is provided. The thin film capacitor includes a nickel substrate with nickel (Ni) purity of 99.99 weight percent or above, and a dielectric layer and an electrode layer disposed in this order on the nickel substrate. The thin film capacitor is typically manufactured as follows. A precursor dielectric layer is formed on a nickel substrate with nickel purity of 99.99 weight percent or above, and is subjected to annealing to form a dielectric layer. The diffusion of impurities from the nickel substrate to the precursor dielectric layer during annealing is suppressed.

Abstract translation: 提供了具有高容量和低漏电流的薄膜电容器。 薄膜电容器包括镍（Ni）纯度为99.99重量％以上的镍基板，以及依次设置在镍基板上的电介质层和电极层。 薄膜电容器通常如下制造。 在镍基底上形成前体电介质层，其镍纯度为99.99重量％以上，并进行退火以形成电介质层。 抑制了退火时的杂质从镍基体向前体电介质层的扩散。

公开(公告)号：US07514038B2

公开(公告)日：2009-04-07

申请号：US10861976

申请日：2004-06-04

Applicant: Shaun Pendo ,  Rajiv Shah ,  Edward Chernoff

Inventor： Shaun Pendo ,  Rajiv Shah ,  Edward Chernoff

IPC: G01N21/00 ,  H05K3/40 ,  H05K1/03

CPC classification number: H05K3/28 ,  A61B5/0006 ,  H05K1/0306 ,  H05K3/4061 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0317 ,  H05K2201/09472 ,  H05K2203/082 ,  H05K2203/085 ,  H05K2203/1147 ,  H05K2203/1476 ,  H05K2203/1572 ,  H05K2203/308

Abstract: A substrate with hermetically sealed vias extending from one side of the substrate to another and a method for fabricating same. The vias may be filled with a conductive material such as, for example, a fritless ink. The conductive path formed by the conductive material aids in sealing one side of the substrate from another. One side of the substrate may include a sensing element and another side of the substrate may include sensing electronics.

Abstract translation: 具有从衬底的一侧延伸到另一侧的气密密封通孔的衬底及其制造方法。 通孔可以填充有导电材料，例如无油墨。 由导电材料形成的导电路径有助于将基板的一侧与另一侧密封。 衬底的一侧可以包括感测元件，并且衬底的另一侧可以包括感测电子器件。

公开(公告)号：US20090077799A1

公开(公告)日：2009-03-26

申请号：US12232189

申请日：2008-09-12

Applicant: Chih Kui Yang

Inventor： Chih Kui Yang

IPC: H05K1/18 ,  H05K3/10

CPC classification number: H05K1/162 ,  H05K3/0023 ,  H05K3/107 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2201/0175 ,  H05K2201/0209 ,  H05K2201/0959 ,  Y10T29/49155

Abstract: The present invention relates to a circuit board structure with a capacitor embedded therein and the method for fabricating the same. The disclosed structure comprises: a core board; a buffer layer disposed on two surfaces of the core board and having a plurality of open areas; a first circuit layer disposed in the open areas; a high dielectric material film disposed over the first circuit layer and the buffer layer on at least one surface of the core board; and a second circuit layer disposed on the high dielectric material film, wherein the region where the second circuit layer corresponds to the first circuit layer functions as a capacitor, and the first circuit layer on two surfaces of the core board electrically connects to each other by at least one plated through hole. The present invention improves the problem of void generation and enhances the precision of the capacitor region.

Abstract translation: 本发明涉及一种其中嵌有电容器的电路板结构及其制造方法。 所公开的结构包括：芯板; 缓冲层，设置在所述芯板的两个表面上并具有多个开放区域; 布置在所述开放区域中的第一电路层; 设置在所述芯板的至少一个表面上的所述第一电路层和所述缓冲层之上的高电介质材料膜; 以及设置在高电介质材料膜上的第二电路层，其中第二电路层对应于第一电路层的区域用作电容器，并且芯板的两个表面上的第一电路层通过 至少一个电镀通孔。 本发明改善了空穴产生的问题，提高了电容器区域的精度。

公开(公告)号：US07506995B2

公开(公告)日：2009-03-24

申请号：US11656641

申请日：2007-01-23

Applicant: James G. Thomas ,  Bryan T. Warner ,  Michael J. McCarthy

Inventor： James G. Thomas ,  Bryan T. Warner ,  Michael J. McCarthy

IPC: F21V23/00

CPC classification number: F21V29/74 ,  F21S4/10 ,  F21V15/01 ,  F21V21/002 ,  F21V29/75 ,  F21Y2115/10 ,  H05K1/0203 ,  H05K1/053 ,  H05K1/056 ,  H05K3/28 ,  H05K2201/0175 ,  H05K2201/10106 ,  Y10S362/80

Abstract: The present invention provides a lighting system for use within a display sign, wherein the lighting system comprises a first module having a multi-layer circuit board and an arrangement of components electrically connected to the circuit board. The component arrangement includes a driver control chip that provides regulated voltage to the light emitting diodes, at least one surface mounted resistor, and a pair of light emitting diodes wherein each diode is mounted to a longitudinal end portion of the circuit board. Thus, the driver control chip is positioned between the light emitting diodes. The component arrangement further includes a high-frequency capacitor that filters undesired electrical noise and a rectifying diode that converts electrical potential from alternating current to direct current. A second module is electrically connected to the first module by a pair of flexible conductor wires. The second module includes a multi-layer circuit board and an arrangement of components electrically connected to the circuit board. The component arrangement of the second module is similar to that of the first module, wherein a light emitting diode is mounted to each longitudinal end portion of the circuit board.

Abstract translation: 本发明提供了一种在显示符号内使用的照明系统，其中照明系统包括具有多层电路板的第一模块和电连接到电路板的组件的布置。 该组件装置包括驱动器控制芯片，其向发光二极管提供调节电压，至少一个表面安装的电阻器和一对发光二极管，其中每个二极管安装到电路板的纵向端部。 因此，驱动器控制芯片位于发光二极管之间。 组件布置还包括滤除不需要的电噪声的高频电容器和将电流从交流电转换成直流电的整流二极管。 第二模块通过一对柔性导线与第一模块电连接。 第二模块包括多层电路板和电连接到电路板的组件的布置。 第二模块的组件布置类似于第一模块的组件布置，其中发光二极管安装到电路板的每个纵向端部。

公开(公告)号：US20090035913A1

公开(公告)日：2009-02-05

申请号：US11832995

申请日：2007-08-02

Applicant: Lijie Bao ,  Zhigang Rick Li ,  Damien F. Reardon ,  James F. Ryley ,  Cengiz Ahmet Palanduz

Inventor： Lijie Bao ,  Zhigang Rick Li ,  Damien F. Reardon ,  James F. Ryley ,  Cengiz Ahmet Palanduz

IPC: H01L21/20

CPC classification number: H01G4/1227 ,  H01G4/12 ,  H01L21/31691 ,  H01L28/55 ,  H05K1/162 ,  H05K3/1291 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0355 ,  H05K2203/1105 ,  H05K2203/1126

Abstract: Deposited thin-film dielectrics having columnar grains and high dielectric constants are formed on heat treated and polished metal foil. The sputtered dielectrics are annealed at low oxygen partial pressures.

Abstract translation: 在热处理和抛光的金属箔上形成具有柱状晶粒和高介电常数的沉积的薄膜电介质。 溅射电介质在低氧分压下进行退火。