公开(公告)号：US07948079B2

公开(公告)日：2011-05-24

申请号：US12549289

申请日：2009-08-27

Applicant: Chih-kuang Yang

Inventor： Chih-kuang Yang

IPC: H01L29/40

CPC classification number: H05K1/147 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/15311 ,  H05K1/142 ,  H05K3/361 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  Y10T428/31678 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: Disclosed is a method of manufacturing a hybrid structure of multi-layer substrates. The method comprises steps of: separating a border district of at least one metal layer connecting with a border district of the corresponding dielectric layer from adjacent metal layers and adjacent dielectric layers for each multi-layer substrate and connecting a separated border of a metal layer of one multi-layer substrate with a separated border district of a metal layer of another multi-layer substrate to form a connection section. The hybrid structure comprises at least a first multi-layer substrate and a second multi-layer substrate. At least one first metal layer is connected with at least one second metal layer to form a connection section.

Abstract translation: 公开了一种制造多层基板的混合结构的方法。 该方法包括以下步骤：将与相应电介质层的边界区连接的至少一个金属层的边界区域与相邻的金属层和相邻的电介质层分别用于每个多层基板并连接金属层的金属层的分离边界 一个多层基板，具有另一多层基板的金属层的分离边界区域，以形成连接部分。 所述混合结构至少包括第一多层基板和第二多层基板。 至少一个第一金属层与至少一个第二金属层连接以形成连接部分。

公开(公告)号：US20110005811A1

公开(公告)日：2011-01-13

申请号：US12920828

申请日：2009-03-12

Applicant: Hajime Yamato

Inventor： Hajime Yamato

IPC: H05K1/00 ,  H05K3/36

CPC classification number: H05K3/4635 ,  H05K3/281 ,  H05K3/4611 ,  H05K3/4691 ,  H05K2201/09109 ,  Y10T29/49126

Abstract: A method of manufacturing a rigid-flex circuit board includes preparing a first and a second coverlay film (200, 250), and a first and a second circuit substrate (100, 150) having a first and a second circuit (103, 153) formed thereon, and a first interlayer adhesive sheet (300); Stacking the first coverlay film (200), the first circuit substrate (100) disposed such that the first circuit (103) opposes the first coverlay film (200), the first interlayer adhesive sheet (300) located in a region where a rigid portion (700) is to be formed, the second coverlay film (250), and the second circuit substrate (150) disposed such that the second circuit (153) opposes the second coverlay film (250), and executing a heat-pressing process.

Abstract translation: 一种刚性柔性电路板的制造方法，包括制备第一和第二覆盖膜（200,250）以及具有第一和第二电路（103,153）的第一和第二电路基板（100,150） 和第一层间粘合片（300）; 堆叠第一覆盖膜（200），第一电路基板（100）设置成使得第一电路（103）与第一覆盖膜（200）相对，第一层间粘合片（300）位于刚性部分 （700），第二覆盖膜（250）和第二电路基板（150）设置成使得第二电路（153）与第二覆盖膜（250）相对，并执行热压工艺。

公开(公告)号：US07776426B2

公开(公告)日：2010-08-17

申请号：US11365887

申请日：2006-03-02

Applicant: Yoshiharu Itahana ,  Junji Nakamura ,  Akio Sawabe

Inventor： Yoshiharu Itahana ,  Junji Nakamura ,  Akio Sawabe

IPC: B32B9/00

CPC classification number: H01L23/3735 ,  H01L23/5386 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K1/0306 ,  H05K3/38 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09109 ,  H05K2203/0545 ,  Y10T428/12535 ,  Y10T428/12576 ,  Y10T428/12611 ,  Y10T428/24917 ,  Y10T428/24926 ,  H01L2924/00

Abstract: A ceramic circuit substrate and a manufacturing method thereof are provided, which has excellent thermal shock tolerance by forming a gap between a circuit pattern section and a ceramic substrate, and has a capability of preventing etchant residue from remaining therein. The ceramic circuit substrate according to the present invention includes patterns of brazing material (8 and 9) formed on the ceramic substrate, and a circuit pattern section jointed to the patterns of brazing material. The patterns of brazing material includes a line pattern along the edge of the circuit pattern. Also, a gap is formed within the line pattern located between the ceramic substrate and the circuit pattern.

Abstract translation: 提供一种陶瓷电路基板及其制造方法，其通过在电路图形部分和陶瓷基板之间形成间隙而具有优异的耐热冲击性，并且具有防止蚀刻残渣残留的能力。 根据本发明的陶瓷电路基板包括形成在陶瓷基板上的钎焊材料（8和9）的图案，以及连接到钎焊材料图案的电路图形部分。 钎焊材料的图案包括沿着电路图案的边缘的线图案。 此外，在位于陶瓷基板和电路图案之间的线图案内形成间隙。

公开(公告)号：US07687312B2

公开(公告)日：2010-03-30

申请号：US11856867

申请日：2007-09-18

Applicant: Chih-kuang Yang

Inventor： Chih-kuang Yang

IPC: H01L21/00

CPC classification number: H05K1/147 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/15311 ,  H05K1/142 ,  H05K3/361 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  Y10T428/31678 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: Disclosed is a method of manufacturing a hybrid structure of multi-layer substrates. The method comprises steps of: separating a border district of at least one metal layer connecting with a border district of the corresponding dielectric layer from adjacent metal layers and adjacent dielectric layers for each multi-layer substrate and connecting a separated border of a metal layer of one multi-layer substrate with a separated border district of a metal layer of another multi-layer substrate to form a connection section. The hybrid structure comprises at least a first multi-layer substrate and a second multi-layer substrate. At least one first metal layer is connected with at least one second metal layer to form a connection section.

Abstract translation: 公开了一种制造多层基板的混合结构的方法。 该方法包括以下步骤：将与相应电介质层的边界区连接的至少一个金属层的边界区域与相邻的金属层和相邻的电介质层分别用于每个多层基板并连接金属层的金属层的分离边界 一个多层基板，具有另一多层基板的金属层的分离边界区域，以形成连接部分。 所述混合结构至少包括第一多层基板和第二多层基板。 至少一个第一金属层与至少一个第二金属层连接以形成连接部分。

公开(公告)号：US20090168363A1

公开(公告)日：2009-07-02

申请号：US12317892

申请日：2008-12-30

Applicant: James E. Clayton ,  Zakaryae Fathi

Inventor： James E. Clayton ,  Zakaryae Fathi

IPC: H05K7/20 ,  H05K3/34

CPC classification number: H05K1/189 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/07811 ,  H01L2924/15311 ,  H05K1/147 ,  H05K3/0061 ,  H05K2201/043 ,  H05K2201/056 ,  H05K2201/09109 ,  H05K2201/10159 ,  H05K2201/1056 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49179 ,  H01L2924/00

Abstract: A multichip module comprises a multilayer substrate circuit having conductive patterns on its surface(s) to which microelectronic device(s) are attached. The conductive patterns include a series of electrical contacts adjacent to one edge of the substrate. The substrate is bonded to two rigid frames, one on each opposite surface. Each substrate has a series of castellations on one edge that are aligned and electrically connected to the respective contacts on the substrate, preferably by soldering. The castellations can serve as a self-aligning mechanism when the module is brought into contact with a low-profile pin array, and the module may be held in place on a motherboard by guide rails in a socket that engages the edges perpendicular to the castellated edge of the module. The module may further be provided with protective heat spreading covers.

Abstract translation: 多芯片模块包括在其表面上具有导电图案的多层衬底电路，微电子器件附接到多个衬底电路。 导电图案包括与衬底的一个边缘相邻的一系列电接触。 衬底被粘合到两个刚性框架上，每个相对表面上一个。 每个衬底在一个边缘上具有一系列在优选通过焊接的衬底上对准并电连接到衬底上的相应接触件的蓖耳。 当模块与低轮廓的针阵列接触时，这些哨座可以用作自对准机构，并且模块可以通过插座中的导轨固定在主板上的位置，该插座与垂直于雉鸡的边缘接合 模块的边缘。 模块还可以设置有保护性散热罩。

公开(公告)号：US20080289860A1

公开(公告)日：2008-11-27

申请号：US11805972

申请日：2007-05-24

Applicant: Kazuhide Kita ,  Hirokazu Hirai ,  Shuichi Fujita ,  Takashi Miwa

Inventor： Kazuhide Kita ,  Hirokazu Hirai ,  Shuichi Fujita ,  Takashi Miwa

IPC: H05K1/03

CPC classification number: H05K1/028 ,  H05K1/0373 ,  H05K3/281 ,  H05K3/381 ,  H05K3/386 ,  H05K3/4611 ,  H05K3/4635 ,  H05K3/4691 ,  H05K2201/0209 ,  H05K2201/09109 ,  H05K2203/025 ,  Y10T428/12549 ,  Y10T428/12569 ,  Y10T428/24917 ,  Y10T428/31681 ,  Y10T428/31721

Abstract: An object of the present invention is to provide a flexible printed wiring board and multilayered flexible printed wiring board in which, in methods of laminating substrates comprising a non-adhering section and an adhering section, adhesion of the FPC substrates of the flexure part can be prevented and adequate flex resistance can be maintained.The present invention provides a flexible printed wiring board comprising at least an electric insulating layer and a conductor layer wherein the surface of the electric insulating layer has a 10-point average roughness of at least 1.5 μm and less than 2.0 μm and contact angle of at least 60° and less than 120°, or has a 10-point average roughness of at least 2.0 μm and less than 4.0 μm, and also provides a multilayered flexible printed wiring board formed by the lamination of two or more of the flexible printed wiring boards in which the surface of the electric insulating layers of the two or more flexible printed wiring boards exposed in a bendable state are opposing in a non-adhered state, and a part of the wiring boards is laminated on each of a first multilayered flexible printed wiring board and a second multilayered flexible printed wiring board.

Abstract translation: 本发明的目的是提供一种柔性印刷布线板和多层柔性印刷布线板，其中在包括非粘合部分和粘合部分的基板的层压方法中，柔性部件的FPC基板的粘附可以是 防止并且可以保持足够的抗弯曲性。 本发明提供了一种柔性印刷布线板，其至少包括电绝缘层和导体层，其中电绝缘层的表面具有至少1.5μm和小于2.0μm的10点平均粗糙度和在 至少60°且小于120°，或者具有至少2.0μm和小于4.0μm的10点平均粗糙度，并且还提供通过层压两个或更多个柔性印刷布线而形成的多层柔性印刷布线板 其中以可弯曲状态暴露的两个或多个柔性印刷电路板的电绝缘层的表面在非粘合状态下相对的板，并且一部分布线板层叠在第一多层柔性印刷 接线板和第二多层柔性印刷线路板。

公开(公告)号：US07388756B1

公开(公告)日：2008-06-17

申请号：US11609806

申请日：2006-12-12

Applicant: Robert T. Worl ,  Bruce L. Blaser ,  Peter T. Heisen ,  Julio A. Navarro ,  Douglas A. Pietila ,  Scott A. Raby ,  Jimmy S. Takeuchi

Inventor： Robert T. Worl ,  Bruce L. Blaser ,  Peter T. Heisen ,  Julio A. Navarro ,  Douglas A. Pietila ,  Scott A. Raby ,  Jimmy S. Takeuchi

IPC: H05K7/00

CPC classification number: H05K1/118 ,  H01L2924/19107 ,  H01R12/52 ,  H01R12/62 ,  H05K1/0237 ,  H05K3/361 ,  H05K3/4691 ,  H05K2201/09081 ,  H05K2201/09109 ,  H05K2201/09318 ,  H05K2203/049

Abstract: A method and structure for producing an angled RF connection between a first element and a second element using a flexible substrate is provided. The method includes laminating a flexible substrate onto the first element; bending the flexible substrate such that a bonding pad on the flexible substrate is in a similar plane as a bonding pad on the second element; and creating the angled RF connection by wire bonding the bonding pad on the flexible substrate and the bonding pad on the second element. The structure includes a flexible substrate that is laminated onto a first element as an outer layer, flexible substrate having at least one bonding pad, and the flexible substrate able to bend in an angle that places the bonding pad in a same plane as a bonding pad on a second element.

Abstract translation: 提供了一种使用柔性基板在第一元件和第二元件之间产生成角度的RF连接的方法和结构。 该方法包括将柔性基板层压到第一元件上; 弯曲柔性基板，使得柔性基板上的接合焊盘处于与第二元件上的接合焊盘相似的平面中; 以及通过将所述接合焊盘引导到所述柔性基板上的所述接合焊盘和所述第二元件上的所述接合焊盘来产生所述成角度的RF连接 该结构包括层压到作为外层的第一元件上的柔性基板，具有至少一个接合焊盘的柔性基板，以及能够以与焊盘相同的平面将接合焊盘放置在一起的角度弯曲的柔性基板 在第二个元素上。

公开(公告)号：US07347950B2

公开(公告)日：2008-03-25

申请号：US11214965

申请日：2005-08-29

Applicant: Bum Young Myung ,  Dong Kuk Kim ,  Young Po Park ,  Young Seok Yoon ,  Dek Gin Yang

Inventor： Bum Young Myung ,  Dong Kuk Kim ,  Young Po Park ,  Young Seok Yoon ,  Dek Gin Yang

IPC: H01B13/00 ,  H05K3/02 ,  H05K3/10

CPC classification number: H05K3/4691 ,  C23C26/00 ,  C23C28/00 ,  C23C28/023 ,  H05K3/4652 ,  H05K2201/0187 ,  H05K2201/0355 ,  H05K2201/0382 ,  H05K2201/09109 ,  H05K2203/063 ,  Y10T29/49155

Abstract: A rigid flexible printed circuit board (PCB) and a method of fabricating the same. Since a polyimide copper clad laminate is not used during the fabrication of the rigid flexible PCB, an increase in cost resulting from use of the polyimide copper clad laminate and poor reliability of adhesion at an interface between different materials are avoided.

Abstract translation: 一种刚性柔性印刷电路板（PCB）及其制造方法。 由于在刚性柔性PCB的制造期间不使用聚酰亚胺覆铜层压板，所以避免了使用聚酰亚胺覆铜层压板所产生的成本的增加以及在不同材料之间的界面处的粘附可靠性差。

公开(公告)号：US20070262447A1

公开(公告)日：2007-11-15

申请号：US11748111

申请日：2007-05-14

Applicant: Koichi HIRANO ,  Tsukasa SHIRAISHI ,  Seiichi NAKATANI ,  Tatsuo OGAWA

Inventor： Koichi HIRANO ,  Tsukasa SHIRAISHI ,  Seiichi NAKATANI ,  Tatsuo OGAWA

IPC: H01L23/48

CPC classification number: H05K1/0271 ,  H01L23/49811 ,  H01L24/12 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13011 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K1/09 ,  H05K1/111 ,  H05K3/243 ,  H05K2201/0338 ,  H05K2201/0355 ,  H05K2201/09109 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A circuit board 1 having a base material 10 and an electrode 11 formed on at least one main surface of the base material 10 includes an easy peeling portion 12 formed in at least one of an inner portion and a side portion of the electrode 11, with the adhesive strength between the electrode 11 and the easy peeling portion 12 being less than the adhesive strength between the electrode 11 and the base material 10. A circuit board that has high connection reliability and enables narrow pitch mounting thereby can be provided.

Abstract translation: 具有基材10和形成在基材10的至少一个主表面上的电极11的电路板1包括形成在电极11的内部和侧部中的至少一个中的易剥离部分12， 电极11和容易剥离部12之间的粘合强度小于电极11与基材10之间的粘合强度。可以提供具有高连接可靠性并能实现窄间距安装的电路板。

公开(公告)号：US20070145587A1

公开(公告)日：2007-06-28

申请号：US11308519

申请日：2006-03-31

Applicant: Chih-Kuang Yang

Inventor： Chih-Kuang Yang

IPC: H01L23/52

CPC classification number: H05K3/0058 ,  H01L21/4857 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/16 ,  H01L2224/81001 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/3025 ,  H05K3/0067 ,  H05K2201/09109 ,  H05K2203/178 ,  Y02P70/613

Abstract: The invention provides a substrate with multi-layer interconnection structure, which includes a substrate and a multi-layer interconnection structure formed on the substrate. The multi-layer interconnection structure is adhered to the substrate in partial areas. The invention also provides a method of manufacturing and recycling such substrate and a method of packaging electronic devices by using such substrate. The invention also provides a method of manufacturing multi-layer interconnection devices.

Abstract translation: 本发明提供一种具有多层互连结构的基板，其包括基板和形成在基板上的多层互连结构。 多层互连结构在部分区域附着于基板。 本发明还提供了制造和再循环这种基板的方法以及通过使用这种基板来封装电子器件的方法。 本发明还提供一种制造多层互连装置的方法。