Abstract:
The present disclosure relates to a telecommunications jack including a housing having a port for receiving a plug. The jack also includes a plurality of contact springs adapted to make electrical contact with the plug when the plug is inserted into the port of the housing, and a plurality of wire termination contacts for terminating wires to the jack. The jack further includes a circuit board that electrically connects the contact springs to the wire termination contacts. The circuit board includes a crosstalk compensation arrangement for reducing crosstalk at the jack. The circuit board also includes arrangements that reduce return loss at the jack.
Abstract:
An output adapting device of a plug-in power system is used to connect an output terminal of the plug-in power system with an input terminal of an electronic device, so as to transmit the power from the plug-in power system to the electronic device. The adapting device includes an output adapting terminal and an input adapting terminal respectively corresponding to the output terminal and the input terminal, in which corresponding pins of the corresponding terminals have identical potential, and at least one corresponding pair of pins of the output adapting terminal and the input adapting terminal have different potential. Furthermore, the adapting device also includes an adapting unit for adapting and outputting the power from the output adapting terminal to another pin with identical potential of the input adapting terminal. Therefore, the output terminal of the plug-in power system can be standardized for widely applying in various electronic devices.
Abstract:
Described herein is a technique for reducing the effects of crosstalk between adjacent signal lines of a data path. The data path is formed by multiple signal lines arranged adjacent each other and traversing multiple segments. The signal lines are transposed between segments in a manner that is chosen to reduce differences in interline couplings between different pairs of the signal lines. The interline coupling of a pair of signal lines is represented as a function of coupling terms. A coupling term corresponds to each segment of a pair of signal lines, and is a function of the distance between the signal lines over that segment. Prior to transmitting a digital signal over the data path, the digital signal is encoded to reduce variations over time in a collective signal level of the digital signal.
Abstract:
A display device having a highly reliable electrostatic capacitive type touch panel which allows finger touch inputting and possesses excellent detection sensitivity is provided. With respect to X electrodes and Y electrodes which are formed on an electrostatic capacitive type touch panel, either one of the X electrodes and the Y electrodes is divided corresponding to a ratio between the number of X electrodes and the number of Y electrodes, and a floating electrode is formed in gaps formed along with the reduction of area of the electrode thus adjusting the area of the electrode. Due to the contraction of the area of the individual electrode, a noise level can be lowered more compared to lowering of a signal level and hence, an S/N ratio can be increased thus enhancing the detection sensitivity. Further, a line is branched on a flexible printed circuit board, intersecting lines are formed on a back surface of the flexible printed circuit board, and the intersecting lines are arranged to orthogonally intersect with lines formed on a front surface of the flexible printed circuit board thus lowering line capacitance.
Abstract:
To provide an electron source including: a wiring board having: a substrate provided with a groove on its surface; a first conductive member which is arranged along the groove in the groove; and a second conductive member which is arranged above the first conductive member crossing the first conductive member; and an electron-emitting device which is arranged on the wiring board and is electrically connected to the first conductive member and the second conductive member; wherein a particle is arranged between the first conductive member and an inner wall of the groove.
Abstract:
An electrically conductive structure includes a first conductive structure and a second conductive structure. Each has a conducting section at one end and a coupling section at the other end. The first and second conducting sections are electrically connected to a power and ground contact of an electronic device, respectively. The first and second coupling sections are respectively connected with power and ground layer of a circuit board. The first coupling sections are connected with the first conducting section through first extending sections and the second coupling sections are connected with the second conducting section through second extending sections. At least two coupling sections of the conductive structures are arranged in pairs. The first conductive structure and the second conductive structure are arranged in a staggered array to form two wiring loops having opposite current directions, thereby generating a magnetic flux cancellation effect.
Abstract:
A symmetrical circuit layout structure includes a number of signal wires, a ground wire and a dielectric layer. The signal wires include a first portion placed on a first plane and a second portion placed on a second plane. The ground wire includes a first portion placed above the first portion of the signal wires and adjacent to the second portion of the signal wires, and a second portion placed below the second portion of the signal wires and adjacent to the first portion of the signal wires. The dielectric layer is placed between the first plane and the second plane.
Abstract:
A method for connecting circuit boards, comprising: (i) preparing a first circuit board having connection parts assigned to end parts of a plurality of conductor wirings, and a second circuit board having connection parts assigned to corresponding end parts of a plurality of conductor wirings; (ii) disposing the connection parts of the first circuit board to face the connection parts of the second circuit board with a thermosetting adhesive film between the connection parts of the circuit boards; and (iii) applying heat and pressure to the connection parts and to the thermosetting adhesive film sufficiently high to thoroughly push away the adhesive film so as to establish electrical contact between connection parts of the circuit boards facing each other and to allow for curing of the adhesive; wherein the conductor wirings constituting the connection parts of at least one of the first and second circuit boards contain non-linear wirings.
Abstract:
A method of manufacturing a circuit module having a low price and good productivity, a collective board for the circuit module, and a circuit module manufactured by the method are provided. In the method of manufacturing the circuit module of the invention, when performing a burn-in test, a collective board 1 having a circuit board 2 can be used as a test board. Accordingly, since it is not necessary to have an additional test board, it is possible to obtain a low price product. In addition, since a test is performed in a state where the bare chip 8 is attached (e.g., soldering) to the circuit board 2, the number of the process of the bare chip 8. Accordingly, it is possible to obtain good productivity.
Abstract:
The present disclosure relates to a telecommunications jack including a housing having a port for receiving a plug. The jack also includes a plurality of contact springs adapted to make electrical contact with the plug when the plug is inserted into the port of the housing, and a plurality of wire termination contacts for terminating wires to the jack. The jack further includes a circuit board that electrically connects the contact springs to the wire termination contacts. The circuit board includes first and second conductive layers separated by a relatively thin dielectric layer. The first and second conductive layers include a crosstalk compensation arrangement having spaced-apart capacitor members. The relatively thin dielectric layer allows a high level of capacitance to be generated between the capacitor members.