公开(公告)号：US09578746B2

公开(公告)日：2017-02-21

申请号：US14695936

申请日：2015-04-24

Applicant: ScienBiziP Consulting (Shen Zhen) Co., Ltd.

Inventor： Hsien-Pei Lung ,  Wu-Zhe Yu

IPC: H05K1/00 ,  H05K1/11 ,  H05K1/02 ,  H05K5/00

CPC classification number: H05K1/115 ,  H05K1/0215 ,  H05K1/116 ,  H05K5/0026 ,  H05K2201/09272 ,  H05K2201/09572

Abstract: A circuit board includes a substrate defining a plurality of ground attaching holes and a plurality of first through-holes. The substrate includes a first surface and a side edge. Wherein, a plurality of parallel and spaced first conductive paths is formed on the first surface around each ground attaching hole. A first arcuate conductive portion is formed at each end of each first conductive path. An angle between each first conductive path and the side edge is 45° or 135°. The first through-holes respectively extend through the first arcuate conductive portions and electrically couple with the first conductive paths.

Abstract translation: 电路板包括限定多个接地安装孔和多个第一通孔的基板。 基板包括第一表面和侧边缘。 其中，在每个接地连接孔周围的第一表面上形成多个平行和间隔的第一导电路径。 第一弧形导电部分形成在每个第一导电路径的每一端。 每个第一导电路径和侧边缘之间的角度为45°或135°。 第一通孔分别延伸穿过第一弧形导电部分并与第一导电路径电耦合。

公开(公告)号：US20160353565A1

公开(公告)日：2016-12-01

申请号：US15161731

申请日：2016-05-23

Applicant: CANON KABUSHIKI KAISHA

Inventor： Junichiro Iri ,  Ryo Sato ,  Kazuhiro Idogawa ,  Chiaki Muraoka ,  Hiromasa Amma ,  Takuya Iwano

IPC: H05K1/02 ,  B41J2/14

CPC classification number: H05K1/028 ,  B41J2/14 ,  B41J2/1752 ,  B41J2/1753 ,  B41J2/17553 ,  H05K1/0296 ,  H05K3/0058 ,  H05K2201/09227 ,  H05K2201/09254 ,  H05K2201/09272 ,  H05K2201/09663 ,  H05K2201/09727 ,  H05K2201/0979

Abstract: A wire pattern is divided into a plurality of portions in order to provide a circuit board for which very reliably bonding can be achieved and a liquid ejection head including the circuit board.

Abstract translation: 线图案被分成多个部分，以便提供可以实现非常可靠地结合的电路板和包括电路板的液体喷射头。

公开(公告)号：US20160323990A1

公开(公告)日：2016-11-03

申请号：US15070659

申请日：2016-03-15

Applicant: FUJITSU LIMITED

Inventor： Takahiro KITAGAWA

IPC: H05K1/02 ,  H05K3/00 ,  H05K1/09

CPC classification number: H05K1/111 ,  H05K1/0216 ,  H05K2201/09272 ,  H05K2201/099 ,  H05K2201/10371 ,  Y02P70/611

Abstract: A printed substrate includes: a substrate; a copper layer formed on the substrate; and a resin formed on the substrate to cover a part of the copper layer, wherein the copper layer includes a first region covered by the resin and a second region in which a shield sheet metal is installed, the shield sheet metal surrounding a predetermined region of the substrate, and wherein an angle formed between an outer edge portion of the copper layer covered by the resin and an outer edge portion of the resin which covers the copper layer at a location at which the outer edge portion of the copper layer and the outer edge portion of the resin intersect each other as viewed in plan is an obtuse angle.

Abstract translation: 印刷基板包括：基板; 形成在所述基板上的铜层; 以及形成在所述基板上以覆盖所述铜层的一部分的树脂，其中所述铜层包括被所述树脂覆盖的第一区域和其中安装有屏蔽金属片的第二区域，所述屏蔽金属片围绕预定区域 并且其中在由所述树脂覆盖的铜层的外边缘部分和覆盖铜层的树脂的外边缘部分之间形成的角度处于铜层的外边缘部分和外层 如图所示，树脂的边缘部分彼此相交是钝角。

公开(公告)号：US20160255719A1

公开(公告)日：2016-09-01

申请号：US14763074

申请日：2014-12-03

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Song SONG ,  Kazuyoshi NAGAYAMA

IPC: H05K1/03 ,  H05K3/06 ,  H05K1/11 ,  H05K1/09 ,  H05K1/02

CPC classification number: H05K1/0393 ,  G02F1/13452 ,  H05K1/0248 ,  H05K1/0296 ,  H05K1/09 ,  H05K1/115 ,  H05K3/06 ,  H05K2201/0391 ,  H05K2201/09227 ,  H05K2201/09245 ,  H05K2201/09263 ,  H05K2201/09272 ,  H05K2201/10128 ,  H05K2201/10136

Abstract: The present disclosure discloses a wiring board used to connect a driving chip and a display panel, a flexible display panel and a display device. Signal output ends on the driving chip and signal input ends on the display panel may be arranged in pairs; and the wiring board may include fanout lines each of which is configured to connect a pair of signal output end and the signal input end. The wiring board may include a substrate; a plurality of segments of first connection lines having first resistivity is arranged on a first surface of the substrate; a plurality of segments of second connection lines having second resistivity is arranged on a second surface of the substrate opposite to the first surface. At least parts of the fanout lines are formed by connecting the first connection lines and the second connection lines.

Abstract translation: 本公开公开了一种用于连接驱动芯片和显示面板的接线板，柔性显示面板和显示装置。 驱动芯片上的信号输出结束，显示面板上的信号输入端可以成对布置; 并且布线板可以包括扇出线，每个扇出线被配置为连接一对信号输出端和信号输入端。 布线基板可以包括基板; 在基板的第一表面上布置有具有第一电阻率的第一连接线的多个段; 具有第二电阻率的第二连接线的多个段布置在与第一表面相对的基板的第二表面上。 扇出线的至少一部分通过连接第一连接线和第二连接线而形成。

公开(公告)号：US09232646B2

公开(公告)日：2016-01-05

申请号：US14102832

申请日：2013-12-11

Applicant: International Business Machines Corporation

Inventor： Jinwoo Choi ,  Daniel M. Dreps ,  Rohan U. Mandrekar

IPC: H01L23/528 ,  H05K1/02 ,  C04B37/00 ,  H05K1/03 ,  H05K3/46 ,  H01L21/48 ,  H05K3/12 ,  H01L23/522 ,  H05K1/09 ,  H01L23/13 ,  H01L23/498 ,  H05K3/00 ,  H05K3/24

CPC classification number: H05K1/0298 ,  B32B18/00 ,  C04B37/006 ,  C04B2237/34 ,  C04B2237/343 ,  C04B2237/366 ,  C04B2237/68 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4867 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L2924/0002 ,  H05K1/0245 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/005 ,  H05K3/1216 ,  H05K3/1233 ,  H05K3/1291 ,  H05K3/245 ,  H05K3/4667 ,  H05K2201/0338 ,  H05K2201/035 ,  H05K2201/09272 ,  H05K2201/09709 ,  H05K2203/0126 ,  H05K2203/063 ,  Y10T156/10 ,  H01L2924/00

Abstract: The embodiments of the present invention relate generally to the fabrication of integrated circuits, and more particularly to a structure and method for fabricating differential wiring patterns in multilayer glass-ceramic (MLC) modules. A structure and method of forming a MLC having layers with staggered, or offset, pairs of lines formed directly on one another are disclosed. In addition, a structure and method of forming a MLC having layers with staggered, or offset, pairs of lines that periodically reverse polarity are disclosed.

公开(公告)号：US09232645B2

公开(公告)日：2016-01-05

申请号：US14087341

申请日：2013-11-22

Applicant: International Business Machines Corporation

Inventor： Jinwoo Choi ,  Daniel M. Dreps ,  Rohan U. Mandrekar

IPC: H01L23/528 ,  H05K1/02 ,  C04B37/00 ,  H05K1/03 ,  H05K3/46 ,  H01L21/48 ,  H05K3/12 ,  H01L23/522 ,  H05K1/09 ,  H01L23/13 ,  H01L23/498 ,  H05K3/00 ,  H05K3/24

CPC classification number: H05K1/0298 ,  B32B18/00 ,  C04B37/006 ,  C04B2237/34 ,  C04B2237/343 ,  C04B2237/366 ,  C04B2237/68 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4867 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L2924/0002 ,  H05K1/0245 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/005 ,  H05K3/1216 ,  H05K3/1233 ,  H05K3/1291 ,  H05K3/245 ,  H05K3/4667 ,  H05K2201/0338 ,  H05K2201/035 ,  H05K2201/09272 ,  H05K2201/09709 ,  H05K2203/0126 ,  H05K2203/063 ,  Y10T156/10 ,  H01L2924/00

Abstract: The embodiments of the present invention relate generally to the fabrication of integrated circuits, and more particularly to a structure and method for fabricating differential wiring patterns in multilayer glass-ceramic (MLC) modules. A structure and method of forming a MLC having layers with staggered, or offset, pairs of lines formed directly on one another are disclosed. In addition, a structure and method of forming a MLC having layers with staggered, or offset, pairs of lines that periodically reverse polarity are disclosed.

Abstract translation: 本发明的实施例一般涉及集成电路的制造，更具体地涉及用于在多层玻璃 - 陶瓷（MLC）模块中制造差分布线图案的结构和方法。 公开了一种形成具有彼此直接形成的交错或偏移成对的层的MLC的结构和方法。 另外，公开了一种形成具有周期性反转极性的具有交错或偏移的线对的层的MLC的结构和方法。

公开(公告)号：US20150201491A1

公开(公告)日：2015-07-16

申请号：US14665455

申请日：2015-03-23

Applicant: FUJIFILM Corporation

Inventor： Takeichi TATSUTA

IPC: H05K1/09 ,  H05K1/02 ,  H05K3/12 ,  B41J2/01

CPC classification number: H05K1/092 ,  B05D5/00 ,  B41J2/01 ,  B41J2202/04 ,  H05K1/0274 ,  H05K1/0287 ,  H05K3/1208 ,  H05K3/125 ,  H05K2201/09272 ,  H05K2201/09681 ,  H05K2203/013 ,  H05K2203/0545 ,  H05K2203/1173

Abstract: A pattern forming method of ejecting inks in the form of droplets to a base material including a first region and a second region which differ from each other in terms of surface energy by an ink jet method, includes: a preparation step of preparing the base material including the first region and the second region; and a droplet ejection step of simultaneously ejecting a first ink and a second ink in the form of droplets to the first region and the second region respectively by using a multipass method, wherein the inks are at least two kinds of inks including the first ink having volatility and the second ink having curability, the first ink and the first region are lyophilic, and the second ink and the second region are lyophilic.

Abstract translation: 包括：通过喷墨法将液滴形式的油墨喷射到包括第一区域和第二区域的表面能方面彼此不同的基材的图案形成方法包括：制备基材的制备步骤 包括第一个地区和第二个地区; 以及液滴喷射步骤，通过使用多次方法分别将第一油墨和第二油墨以液滴的形式分别喷射到所述第一区域和所述第二区域，其中所述油墨是至少两种油墨，所述油墨包括所述第一油墨具有 挥发性和第二油墨具有固化性，第一油墨和第一区域是亲液的，第二油墨和第二区域是亲液的。

公开(公告)号：US20150144382A1

公开(公告)日：2015-05-28

申请号：US14087341

申请日：2013-11-22

Applicant: International Business Machines Corporation

Inventor： Jinwoo Choi ,  Daniel M. Dreps ,  Rohan U. Mandrekar

IPC: H05K1/02 ,  H05K3/46 ,  H05K3/00 ,  H05K3/12 ,  H05K1/03 ,  H05K1/09

CPC classification number: H05K1/0298 ,  B32B18/00 ,  C04B37/006 ,  C04B2237/34 ,  C04B2237/343 ,  C04B2237/366 ,  C04B2237/68 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4867 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L2924/0002 ,  H05K1/0245 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/005 ,  H05K3/1216 ,  H05K3/1233 ,  H05K3/1291 ,  H05K3/245 ,  H05K3/4667 ,  H05K2201/0338 ,  H05K2201/035 ,  H05K2201/09272 ,  H05K2201/09709 ,  H05K2203/0126 ,  H05K2203/063 ,  Y10T156/10 ,  H01L2924/00

Abstract: The embodiments of the present invention relate generally to the fabrication of integrated circuits, and more particularly to a structure and method for fabricating differential wiring patterns in multilayer glass-ceramic (MLC) modules. A structure and method of forming a MLC having layers with staggered, or offset, pairs of lines formed directly on one another are disclosed. In addition, a structure and method of forming a MLC having layers with staggered, or offset, pairs of lines that periodically reverse polarity are disclosed.

Abstract translation: 本发明的实施例一般涉及集成电路的制造，更具体地涉及用于在多层玻璃 - 陶瓷（MLC）模块中制造差分布线图案的结构和方法。 公开了一种形成具有彼此直接形成的交错或偏移成对的层的MLC的结构和方法。 另外，公开了一种形成具有周期性反转极性的具有交错或偏移的线对的层的MLC的结构和方法。

公开(公告)号：US09019048B1

公开(公告)日：2015-04-28

申请号：US14587097

申请日：2014-12-31

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kuniaki Yosui ,  Yuki Wakabayashi ,  Bunta Okamoto

IPC: H03H7/38 ,  H01P3/08

CPC classification number: H01P3/08 ,  H01P1/20363 ,  H01P3/081 ,  H01P3/085 ,  H01P5/028 ,  H03H7/38 ,  H05K1/0225 ,  H05K1/0253 ,  H05K2201/09272 ,  H05K2201/09618 ,  H05K2201/09727

Abstract: A high-frequency signal transmission line includes a plate-shaped dielectric element assembly, a linear signal line, and a first ground conductor. The linear signal line is provided at the dielectric element assembly and includes a plurality of thick portions and a plurality of thin portions with a smaller width than the thick portions. The first ground conductor is provided at the dielectric element assembly and positioned on one side in a normal direction to the dielectric element assembly relative to the signal line. The first ground conductor includes a plurality of openings overlapping with the signal line and also includes bridge portions provided between the openings so as to cross the thin portions. The bridge portions cross the thin portion obliquely when viewed in a plan view in the normal direction to the dielectric element assembly.

Abstract translation: 高频信号传输线包括板状电介质元件组件，线性信号线和第一接地导体。 线性信号线设置在电介质元件组件处，并且包括多个厚部分和多个具有比厚部分更小的宽度的薄部分。 第一接地导体设置在电介质元件组件处并且相对于信号线位于电介质元件组件的法向方向的一侧。 第一接地导体包括与信号线重叠的多个开口，并且还包括设置在开口之间以跨越薄部分的桥接部分。 当在与电介质元件组件的法线方向的平面图中观察时，桥接部分倾斜地交叉。

公开(公告)号：US08945986B2

公开(公告)日：2015-02-03

申请号：US14154916

申请日：2014-01-14

Applicant: Texas Instruments Incorporated

Inventor： Matthew David Romig ,  Lance Cole Wright ,  Leslie Edward Stark ,  Frank Stepniak ,  Sreenivasan K. Koduri

IPC: H01L21/00 ,  H01L23/00 ,  H05K1/18 ,  H05K3/12 ,  H05K3/32 ,  H05K1/09

CPC classification number: H01L23/00 ,  B41M3/06 ,  H01L23/48 ,  H01L24/24 ,  H01L24/25 ,  H01L24/76 ,  H01L24/80 ,  H01L24/82 ,  H01L25/0657 ,  H01L2224/24145 ,  H01L2224/24227 ,  H01L2224/321 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/76155 ,  H01L2224/82102 ,  H05K1/092 ,  H05K1/181 ,  H05K3/125 ,  H05K3/32 ,  H05K2201/09272 ,  H05K2201/10151 ,  H05K2201/10454 ,  Y02P70/611

Abstract: One method of making an electronic assembly includes mounting one electrical substrate on another electrical substrate with a face surface on the one substrate oriented transversely of a face surface of the other substrate. The method also includes inkjet printing on the face surfaces a conductive trace that connects an electrical contact on the one substrate with an electrical connector on the other substrate. An electronic assembly may include a first substrate having a generally flat surface with a first plurality of electrical contacts thereon; a second substrate having a generally flat surface with a second plurality of electrical contacts thereon, the surface of the second substrate extending transversely of the surface of said first substrate; and at least one continuous conductive ink trace electrically connecting at least one of the first plurality of electrical contacts with at least one of the second plurality of electrical contacts.

Abstract translation: 制造电子组件的一种方法包括将一个电气基板安装在另一个电气基板上，其中一个基板上的面表面横向于另一个基板的表面。 该方法还包括在表面上喷墨印刷导电迹线，导电迹线将一个基底上的电接触与另一基底上的电连接器连接。 电子组件可以包括具有大致平坦表面的第一基板，其上具有第一多个电触点; 第二基板，其具有大致平坦的表面，其上具有第二多个电触点，所述第二基板的表面横向于所述第一基板的表面延伸; 以及至少一个连续的导电油墨迹线将所述第一多个电触点中的至少一个与所述第二多个电触点中的至少一个电连接。