公开(公告)号：US20170150277A1

公开(公告)日：2017-05-25

申请号：US15322085

申请日：2015-05-18

Applicant: EPCOS AG

Inventor： Pirmin Hermann Otto Rombach

IPC: H04R19/04 ,  B81B3/00 ,  B81C1/00 ,  H04R19/00 ,  H04R31/00

CPC classification number: H04R19/04 ,  B81B3/0075 ,  B81B2201/0257 ,  B81C1/00531 ,  B81C2201/0136 ,  H04R19/005 ,  H04R31/00 ,  H04R31/006 ,  H04R2201/003

Abstract: A MEMS microphone with improved sensitivity and a method for producing such a MEMS microphone are disclosed. In an embodiment the MEMS microphone includes a carrier substrate, a capacitor having two electrodes, a substrate-side anchor and an electrode anchor, wherein the substrate-side anchor connects the substrate to the capacitor, wherein the electrode anchor connects the two electrodes of the capacitor, wherein one of the electrodes is a backplate and the other electrode is the anchored membrane, and wherein the substrate-side anchor has a bearing area on the substrate which exceeds a minimum area necessary for a mechanical stability of the MEMS microphone by not more than the minimum area.

公开(公告)号：US08993451B2

公开(公告)日：2015-03-31

申请号：US13088106

申请日：2011-04-15

Applicant: Srivatsa G. Kundalgurki ,  James F. McHugh

Inventor： Srivatsa G. Kundalgurki ,  James F. McHugh

IPC: H01L21/302 ,  H01L21/02 ,  H01L21/306 ,  H01L21/308 ,  H01L21/265 ,  B81C1/00

CPC classification number: H01L21/02057 ,  B81C1/00063 ,  B81C1/00626 ,  B81C2201/0136 ,  H01L21/26506 ,  H01L21/30608 ,  H01L21/3083

Abstract: Etch stabilizing ions (37) are introduced, e.g., by ion implantation (34), into a portion (36) of a substrate (20) underlying an etch window (24) in a masking layer (22) covering the substrate (20), where a trench (26) is desired to be formed. When the portion (36) of the substrate (20) containing the etch stabilizing ions (37) is etched to form the trench (26), the etch stabilizing ions (37) are progressively released at the etch interface (28′) as etching proceeds, substantially preventing gas micro-bubbles or other reaction products at the etch interface (28′) from disrupting etching. Using this method (700), products containing trenches (26) are much more easily formed and such trenches (26) have much smoother interior surface (28).

Abstract translation: 蚀刻稳定离子（37）例如通过离子注入（34）引入覆盖衬底（20）的掩模层（22）中的蚀刻窗（24）下面的衬底（20）的部分（36） ，其中希望形成沟槽（26）。 当蚀刻包含蚀刻稳定离子（37）的衬底（20）的部分（36）以形成沟槽（26）时，蚀刻稳定离子（37）在蚀刻界面（28'）处逐渐释放，如蚀刻 进行，基本上防止蚀刻界面（28'）处的气体微气泡或其他反应产物破坏蚀刻。 使用该方法（700），包含沟槽（26）的产品更容易形成，并且这种沟槽（26）具有更平滑的内表面（28）。

公开(公告)号：US08895448B2

公开(公告)日：2014-11-25

申请号：US13482020

申请日：2012-05-29

Applicant: Chung-Nan Chen

Inventor： Chung-Nan Chen

IPC: H01L21/302 ,  H01L21/461 ,  H05B3/14 ,  B81C1/00

CPC classification number: B81C1/00158 ,  B81C1/00595 ,  B81C2201/0136 ,  H05B3/141

Abstract: To form a single crystal silicon membrane with a suspension layer, a single crystal silicon substrate with crystal orientation is prepared. A doped layer is formed on the top surface of the single crystal silicon substrate. Multiple main etching windows are formed through the doped layer. A cavity is formed through the single crystal silicon substrate by anisotropic etching. The doped layer is above the cavity to form a suspension layer. If two electrode layers are formed on the two ends of the suspension layer, a micro-heater is constructed. The main etching windows extend in parallel to a crystal plane {111}. By both the single crystal structure and different impurity concentrations of the single crystal silicon substrate, the single crystal silicon substrate has a higher etch selectivity. When a large-area cavity is formed, the thickness of the suspension layer is still controllable.

Abstract translation: 为了形成具有悬浮层的单晶硅膜，制备晶体取向<111>的单晶硅衬底。 在单晶硅衬底的顶表面上形成掺杂层。 通过掺杂层形成多个主蚀刻窗口。 通过各向异性蚀刻通过单晶硅衬底形成空穴。 掺杂层在空腔之上以形成悬浮层。 如果在悬浮层的两端形成两个电极层，则构成微加热器。 主蚀刻窗平行于晶面{111}延伸。 通过单晶硅衬底的单晶结构和不同的杂质浓度，单晶硅衬底具有较高的蚀刻选择性。 当形成大面积腔时，悬浮层的厚度仍然可控。

公开(公告)号：US08691611B2

公开(公告)日：2014-04-08

申请号：US13290905

申请日：2011-11-07

Applicant: Arnim Hoechst ,  Jochen Reinmuth ,  Brett Diamond

Inventor： Arnim Hoechst ,  Jochen Reinmuth ,  Brett Diamond

IPC: H01L21/3065

CPC classification number: B81C1/00595 ,  B81B2201/0235 ,  B81B2203/0127 ,  B81B2203/0181 ,  B81B2203/053 ,  B81C2201/0112 ,  B81C2201/0133 ,  B81C2201/0136

Abstract: In a method for manufacturing a micromechanical membrane structure, a doped area is created in the front side of a silicon substrate, the depth of which doped area corresponds to the intended membrane thickness, and the lateral extent of which doped area covers at least the intended membrane surface area. In addition, in a DRIE (deep reactive ion etching) process applied to the back side of the silicon substrate, a cavity is created beneath the doped area, which DRIE process is aborted before the cavity reaches the doped area. The cavity is then deepened in a KOH etching process in which the doped substrate area functions as an etch stop, so that the doped substrate area remains as a basic membrane over the cavity.

Abstract translation: 在制造微机械膜结构的方法中，在硅衬底的前侧产生掺杂区域，其掺杂区域的深度对应于所需的膜厚度，并且其掺杂区域的横向范围至少覆盖预期的 膜表面积。 另外，在施加到硅衬底的背侧的DRIE（深反应离子蚀刻）工艺中，在掺杂区域之下产生空腔，在空腔到达掺杂区域之前DRIE工艺被中止。 然后在KOH蚀刻工艺中加深空腔，其中掺杂衬底区域用作蚀刻停止层，使得掺杂衬底区域保持为空腔上的基本膜。

公开(公告)号：US08519494B2

公开(公告)日：2013-08-27

申请号：US12737037

申请日：2009-04-21

Applicant: Torsten Kramer ,  Marcus Ahles ,  Armin Grundmann ,  Kathrin Knese ,  Hubert Benzel ,  Gregor Schuermann ,  Simon Armbruster

Inventor： Torsten Kramer ,  Marcus Ahles ,  Armin Grundmann ,  Kathrin Knese ,  Hubert Benzel ,  Gregor Schuermann ,  Simon Armbruster

IPC: G01P15/08

CPC classification number: B81C1/00158 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81C2201/0115 ,  B81C2201/0136 ,  G01L9/0042

Abstract: A method for manufacturing a micromechanical diaphragm structure having access from the rear of the substrate includes: n-doping at least one contiguous lattice-type area of a p-doped silicon substrate surface; porously etching a substrate area beneath the n-doped lattice structure; producing a cavity in this substrate area beneath the n-doped lattice structure; growing a first monocrystalline silicon epitaxial layer on the n-doped lattice structure; at least one opening in the n-doped lattice structure being dimensioned in such a way that it is not closed by the growing first epitaxial layer but instead forms an access opening to the cavity; an oxide layer being created on the cavity wall; a rear access to the cavity being created, the oxide layer on the cavity wall acting as an etch stop layer; and the oxide layer being removed in the area of the cavity.

Abstract translation: 用于制造从衬底的后部进入的微机械膜结构的方法包括：n掺杂p掺杂硅衬底表面的至少一个连续的格子型区域; 在n掺杂的晶格结构下面蚀刻衬底区域; 在该n型掺杂晶格结构下面的该衬底区域中产生空腔; 在n掺杂晶格结构上生长第一单晶硅外延层; n掺杂晶格结构中的至少一个开口的尺寸设计成使得其不被生长的第一外延层闭合​​，而是形成到腔的通路口; 在空腔壁上形成氧化物层; 产生到空腔的后部通路，空腔壁上的氧化层用作蚀刻停止层; 并且在空腔的区域中去除氧化物层。

公开(公告)号：US07976714B2

公开(公告)日：2011-07-12

申请号：US11969505

申请日：2008-01-04

Applicant: Lianzhong Yu

Inventor： Lianzhong Yu

IPC: C23F1/00

CPC classification number: B81C1/00182 ,  B81B2201/0235 ,  B81C2201/0136

Abstract: Methods for producing a MEMS device from a single silicon-on-insulator (SOI) wafer. An SOI wafer includes a silicon (Si) handle layer, a Si mechanism layer and an insulator layer located between the Si handle and Si mechanism layers. An example method includes etching active components from the Si mechanism layer. Then, the exposed surfaces of the Si mechanism layer is doped with boron. Next, portions of the insulator layer proximate to the etched active components of the Si mechanism layer are removed and the Si handle layer is etched proximate to the etched active components.

Abstract translation: 从单个绝缘体上硅（SOI）晶片制造MEMS器件的方法。 SOI晶片包括硅（Si）手柄层，Si机构层和位于Si手柄和Si机构层之间的绝缘体层。 示例性方法包括从Si机理层蚀刻活性组分。 然后，Si机理层的暴露表面掺杂有硼。 接下来，去除邻近Si机理层的蚀刻的有源部件的绝缘体层的部分，并且蚀刻附近的Si处理层。

公开(公告)号：US07794610B2

公开(公告)日：2010-09-14

申请号：US10583719

申请日：2004-12-23

Applicant: Claire Divoux ,  Marie-Helene Vaudaine ,  Thierry Enot

Inventor： Claire Divoux ,  Marie-Helene Vaudaine ,  Thierry Enot

IPC: H01L21/302 ,  B81C1/00 ,  B81C3/00

CPC classification number: G02B26/085 ,  B81B2201/038 ,  B81B2201/047 ,  B81B2203/0127 ,  B81B2203/0361 ,  B81C1/00626 ,  B81C2201/0136 ,  G02B26/0833 ,  G02B26/0841 ,  Y10S29/016 ,  Y10S438/924 ,  Y10T29/42

Abstract: The invention relates to a method for making an actuation system for an optical component comprising: etching of a first face of a component, to form pads on it, etching of a second face of the component, to expose a membrane made of the same material as the pads, production of the actuation means of the pads and the membrane.

Abstract translation: 本发明涉及一种用于制造光学部件的致动系统的方法，包括：蚀刻部件的第一面，在其上形成焊盘，蚀刻部件的第二面，暴露由相同材料制成的膜 作为垫，制造垫和膜的致动装置。

公开(公告)号：US20080164576A1

公开(公告)日：2008-07-10

申请号：US11958945

申请日：2007-12-18

Applicant: Giuseppe Barillaro ,  Alessandro Diligenti ,  Caterina Riva ,  Roberto Campedelli ,  Stefano Losa

Inventor： Giuseppe Barillaro ,  Alessandro Diligenti ,  Caterina Riva ,  Roberto Campedelli ,  Stefano Losa

IPC: H01L21/04 ,  H01L29/06

CPC classification number: B81C1/00539 ,  B81B2201/038 ,  B81B2201/07 ,  B81B2201/12 ,  B81B2203/0118 ,  B81B2203/019 ,  B81C1/00595 ,  B81C2201/0136 ,  B81C2203/0714 ,  H01L27/10

Abstract: A process for manufacturing an interaction system of a microelectromechanical type for a storage medium, the interaction system provided with a supporting element and an interaction element carried by the supporting element, envisages the steps of: providing a wafer of semiconductor material having a substrate with a first type of conductivity (P) and a top surface; forming a first interaction region having a second type of conductivity (N), opposite to the first type of conductivity (P), in a surface portion of the substrate in the proximity of the top surface; and carrying out an electrochemical etch of the substrate starting from the top surface, the etching being selective with respect to the second type of conductivity (N), so as to remove the surface portion of the substrate and separate the first interaction region from the substrate, thus forming the supporting element.

Abstract translation: 一种用于制造用于存储介质的微机电类型的相互作用系统的方法，具有支撑元件的相互作用系统和由支撑元件承载的相互作用元件，其设想是提供具有基板的半导体材料晶片，其具有 第一类电导率（P）和顶面; 在所述顶表面附近的所述衬底的表面部分中形成具有与所述第一类型的导电性（P）相反的第二导电类型（N）的第一相互作用区域; 并且从顶表面开始进行基板的电化学蚀刻，所述蚀刻相对于所述第二导电类型（N）是选择性的，以便移除所述基板的表面部分并将所述第一相互作用区域与所述基板分离 ，从而形成支撑元件。

公开(公告)号：US06946398B2

公开(公告)日：2005-09-20

申请号：US10651051

申请日：2003-08-29

Applicant: Shoji Okuda ,  Hiroshi Tokunaga ,  Osamu Tsuboi

Inventor： Shoji Okuda ,  Hiroshi Tokunaga ,  Osamu Tsuboi

IPC: G02B26/08 ,  B81B3/00 ,  B81C1/00 ,  H01L21/302

CPC classification number: B81C1/0019 ,  B81B2201/0271 ,  B81C2201/0136 ,  B81C2201/019

Abstract: The method for fabricating a micro machine comprises the step of burying an oxide film 54 in a first semiconductor substrate 6, the step of bonding the first semiconductor substrate to the second semiconductor substrate with an insulation film 18 therebetween, the step of forming a first mask 66 with an opening in a first region and a second region on both sides of the first region, the step of etching the first semiconductor substrate with a first mask 66 and an oxide film 54 as a mask to thereby form a spring portion 20a integral with the first semiconductor substrate between the oxide film and the insulation film to thereby form a torsion bar including the spring portion, the step of forming a second mask 74 with an opening in the first region and the second region, the step of etching the second semiconductor substrate by using the second mask 74, and the step of etching the insulation film 18 in the first region and the second region. The thickness of the torsion bar can be easily controlled. Thus, a micro machine having a torsion bar can be fabricated with high yields.

Abstract translation: 微机的制造方法包括在第一半导体基板6中埋入氧化膜54的步骤，将第一半导体基板与绝缘膜18接合在第二半导体基板上的工序，形成第一掩模 66，在第一区域的第一区域和第二区域的开口，第一区域的两侧的第二区域，用第一掩模66和氧化物膜54作为掩模蚀刻第一半导体衬底的步骤，从而形成一个一体化的弹簧部分20 其中第一半导体衬底在氧化物膜和绝缘膜之间，从而形成包括弹簧部分的扭杆，在第一区域和第二区域中形成具有开口的第二掩模74的步骤， 通过使用第二掩模74的半导体衬底以及蚀刻第一区域和第二区域中的绝缘膜18的步骤。 可以容易地控制扭杆的厚度。 因此，可以以高产率制造具有扭杆的微型机器。

公开(公告)号：US20050181529A1

公开(公告)日：2005-08-18

申请号：US11011888

申请日：2004-12-13

Applicant: Hubert Benzel ,  Frank Schaefer ,  Simon Armbruster ,  Gerhard Lammel ,  Christoph Schelling ,  Joerg Brasas

Inventor： Hubert Benzel ,  Frank Schaefer ,  Simon Armbruster ,  Gerhard Lammel ,  Christoph Schelling ,  Joerg Brasas

IPC: B81B3/00 ,  H01L21/00 ,  H01L29/24 ,  H01L33/00

CPC classification number: B81C1/00158 ,  B81B3/007 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0115 ,  B81C2201/0116 ,  B81C2201/0136

Abstract: A manufacturing method for a micromechanical semiconductor element includes providing on a semiconductor substrate a patterned stabilizing element having at least one opening. The opening is arranged such that it allows access to a first region in the semiconductor substrate, the first region having a first doping. Furthermore, a selective removal of at least a portion of the semiconductor material having the first doping out of the first region of the semiconductor substrate is provided. In addition, a membrane is produced above the first region using a first epitaxy layer applied on the stabilizing element. In a further method step, at least a portion of the first region is used to produce a cavity underneath the stabilizing element. In this manner, the present invention provides for the production of the patterned stabilizing element by means of a second epitaxy layer, which is applied on the semiconductor substrate.

Abstract translation: 微机电半导体元件的制造方法包括在半导体衬底上提供具有至少一个开口的图案化稳定元件。 开口被布置成使得其允许接近半导体衬底中的第一区域，第一区域具有第一掺杂。 此外，提供了选择性地去除半导体衬底的第一区域中具有第一掺杂的半导体材料的至少一部分。 此外，使用施加在稳定元件上的第一外延层，在第一区域上方产生膜。 在另一方法步骤中，第一区域的至少一部分用于在稳定元件下方产生空腔。 以这种方式，本发明提供了通过施加在半导体衬底上的第二外延层来生产图案化的稳定元件。