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    Polymer layer comprising silicone and at least one metal trace and a process of manufacturing the same
    53.
    发明申请
    Polymer layer comprising silicone and at least one metal trace and a process of manufacturing the same 有权
    包含硅氧烷和至少一种金属痕迹的聚合物层及其制造方法

    公开(公告)号：US20070104967A1

    公开(公告)日：2007-05-10

    申请号：US11270907

    申请日：2005-11-10

    Applicant: Lucien Laude ,  Robert Greenberg

    Inventor： Lucien Laude ,  Robert Greenberg

    IPC: B32B15/04 ,  B05D1/38 ,  B05D1/36

    CPC classification number: H05K3/185 ,  C08J7/12 ,  C08J2383/04 ,  C23C18/1608 ,  C23C18/1612 ,  C23C18/1657 ,  C23C18/204 ,  C23C18/206 ,  H05K3/28 ,  H05K3/387 ,  H05K2201/0133 ,  H05K2201/0162 ,  H05K2201/0209 ,  H05K2201/0236 ,  H05K2203/107 ,  H05K2203/1105 ,  Y10T428/26 ,  Y10T428/31663

    Abstract: The present invention provides a process for embedding at least one layer of at least one metal trace in a silicone-containing polymer, comprising: a) applying a polymer layer on a substrate; b) thermally treating the polymer; c) irradiating at least one surface area of the polymer with a light beam emitted by an excimer laser; d) immersing the irradiated polymer in at least one autocatalytic bath containing ions of at least one metal, and metallizing the polymer; e) thermally treating the metallized polymer; f) applying a polymer layer covering the thermally treated metallized polymer; and g) thermally treating the metallized covered polymer. The present invention further provides a polymer layer comprising silicone containing oxide particles of SiO2, TiO2, Sb2O3, SnO2, Al2O3, ZnO, Fe2O3, Fe3O4, talc, hydroxyapatite or mixtures thereof and at least one metal trace embedded in said polymer layer. The present invention further provides a flexible electrode array comprising silicone containing oxide particles of SiO2, TiO2, Sb2O3, SnO2, Al2O3, ZnO, Fe2O3, Fe3O4, talc, hydroxyapatite or mixtures thereof and at least one metal trace embedded in said polymer layer.

    Abstract translation: 本发明提供了一种在含硅酮聚合物中嵌入至少一层至少一种金属痕迹的方法，包括：a）在基底上施加聚合物层; b）热处理聚合物; c）用由准分子激光器发射的光束照射所述聚合物的至少一个表面积; d）将经辐射的聚合物浸入至少一种含有至少一种金属的离子的自催化浴中，并对聚合物进行金属化; e）热处理金属化聚合物; f）涂覆覆盖热处理的金属化聚合物的聚合物层; 和g）热处理金属化被覆聚合物。 本发明还提供一种聚合物层，其包含含硅氧烷的SiO 2，TiO 2，Sb 2 O 3， N 2，N 2 O 3，N 2，N 2 O 3， Fe 3 O 3，滑石，羟基磷灰石或其混合物，以及嵌入所述聚合物层中的至少一种金属迹线。 本发明还提供了一种柔性电极阵列，其包括含硅氧烷的SiO 2，TiO 2，Sb 2 O 3， / SUB>，SnO 2，Al 2 O 3，ZnO，Fe 2 O 3，3 < Fe 3 O 3，滑石，羟基磷灰石或其混合物，以及嵌入所述聚合物层中的至少一种金属迹线。

    Method for making a circuitry comprising conductive tracks, chips and micro-vias and use of same for producing printed circuits and multilayer modules with high density of integration
    56.
    发明申请
    Method for making a circuitry comprising conductive tracks, chips and micro-vias and use of same for producing printed circuits and multilayer modules with high density of integration 审中-公开
    用于制造包括导电轨道，芯片和微通孔的电路的方法及其用于制造具有高密度集成的印刷电路和多层模块的方法

    公开(公告)号：US20040048050A1

    公开(公告)日：2004-03-11

    申请号：US10343020

    申请日：2003-08-22

    Inventor： Robert Cassat ,  Vincent Lorentz

    IPC: B32B003/00

    CPC classification number: H05K3/4661 ,  H05K3/0035 ,  H05K3/108 ,  H05K3/184 ,  H05K2201/0236 ,  H05K2203/073 ,  H05K2203/1157 ,  H05K2203/125 ,  Y10T428/24917

    Abstract: The invention concerns a method for making a circuitry comprising conductive tracks, chips and micro-vias, at the top surface of a dielectric (303) consisting of a polymer matrix, a compound capable of inducing subsequent metallization and, if required one or several non-conductive and inert fillers, said dielectric (303) covering a level of circuitry (302) or metallized layer, which comprises steps which consist in: a) perforating right through said dielectric (303) without perforating the subjacent metallized layer or the subjacent level of circuitry (302), so as to form one or several micro-vias (304) at desired sites; b) forming, by metallization, metal tracks (312), chips (313) and micro-vias (311) at the surface of the dielectric (314) and of the micro-vias (304), while providing selective protection by depositing a protective layer.

    Abstract translation: 本发明涉及在由聚合物基质，能够诱导后续金属化的化合物组成的电介质（303）的顶表面上制造包括导电轨迹，芯片和微通孔的电路的方法，并且如果需要，一个或多个非 - 导电和惰性填料，所述电介质（303）覆盖电路层（302）或金属化层，其包括以下步骤：a）穿过所述电介质（303）而不穿透下面的金属化层或下层 的电路（302），以便在期望的位置形成一个或多个微通孔（304）; b）通过金属化在电介质（314）的表面和微通孔（304）上形成金属轨道（312），芯片（313）和微通孔（311），同时通过沉积 保护层。

    Fabrication method of printed wiring board
    57.
    发明授权
    Fabrication method of printed wiring board 失效
    印刷电路板的制造方法

    公开(公告)号：US5994034A

    公开(公告)日：1999-11-30

    申请号：US845037

    申请日：1997-04-21

    Applicant: Eiji Maehata

    Inventor： Eiji Maehata

    IPC: G03F7/004 ,  G03F7/40 ,  H05K3/18 ,  H05K3/46 ,  G03C5/16

    CPC classification number: G03F7/40 ,  H05K3/182 ,  H05K3/4661 ,  G03F7/405 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0236 ,  H05K2203/0525 ,  H05K2203/121

    Abstract: A fabrication method of a printed wiring board realizing high adhesion strength of a patterned conductive layer while keeping the high insulation reliability between adjacent conductive paths. First, an adhesive material is prepared, which is a mixture of a photo-setting resin as a matrix, fine particles of a photolyzable resin dispersed in the photo-setting resin, and a metal-organic compound/complex mixed with the photo-setting resin. The adhesive material is coated on an insulative base material to form an adhesive layer. The adhesive layer is then selectively exposed to light, selectively curing the photo-setting resin and selectively photolyzing the particles of the photolyzable resin. The exposed adhesive layer is developed by an alkaline developer solution, thereby transferring the pattern on the mask to the adhesive layer and removing the photolyzed particles for surface roughening of the remaining, unexposed parts of the adhesive layer. The metal-organic compound/complex in the unexposed parts of the adhesive layer is reduced for activation, causing the metal-organic compound/complex to reveal plating catalytic activity. A conductive layer is selectively formed on the unexposed parts of the adhesive layer by electroless plating performed under the plating catalytic activity of the activated metal-organic compound/complex.

    Abstract translation: 在保持相邻导电路径之间的高绝缘可靠性的同时实现图案化导电层的高粘合强度的印刷线路板的制造方法。 首先，制备作为基质的光固化树脂，分散在光固化​​树脂中的光可分散树脂的微粒和与光固化剂混合的金属有机化合物/络合物的混合物的粘合剂材料 树脂。 将粘合剂材料涂覆在绝缘基材上以形成粘合剂层。 然后选择性地将粘合剂层暴露于光，选择性地固化光固化树脂并选择性地光解光可光化树脂的颗粒。 曝光的粘合剂层由碱性显影剂溶液显影，从而将掩模上的图案转印到粘合剂层上，并除去光解颗粒以使粘合剂层的剩余的未曝光部分的表面粗糙化。 粘合剂层的未曝光部分中的金属有机化合物/络合物被还原以用于活化，导致金属 - 有机化合物/络合物显示电镀催化活性。 通过在活化的金属 - 有机化合物/络合物的电镀催化活性下进行的化学镀，在粘合剂层的未曝光部分上选择性地形成导电层。

    Solder mask system
    58.
    发明授权
    Solder mask system 失效
    焊接面罩系统

    公开(公告)号：US5789142A

    公开(公告)日：1998-08-04

    申请号：US586531

    申请日：1996-01-16

    Applicant: Vernon L. Brown

    Inventor： Vernon L. Brown

    IPC: G03F7/004 ,  H05K1/02 ,  H05K1/03 ,  H05K3/00 ,  H05K3/24 ,  H05K3/28 ,  H05K3/34 ,  G03F7/40

    CPC classification number: H05K3/243 ,  G03F7/0047 ,  H05K1/0218 ,  H05K3/242 ,  H05K3/3473 ,  H05K1/0373 ,  H05K2201/0236 ,  H05K2203/043 ,  H05K2203/054 ,  H05K2203/0571 ,  H05K3/0023 ,  H05K3/28

    Abstract: A masking method employing a photodefinable resin as a permanent dielectric mask, in which the resin contains a catalytic filler that when activated enables direct electroless plating of the resin. The resin serves to simplify selective electroplating of isolated surface features such as metal pads, while also improving the topology of the external surface of the circuit board, particularly when small metal pads require a controlled volume of a reflowable metal. The resin is preferably photodefined to eliminate recessed areas around the metal pads, thereby promoting definition of the metal features, and yielding a nearly planar surface. Additional features that can be provided with the method include external conductive ground planes and electromagnetic shield layers within a multilayer circuit board. The masking method can be advantageously used with both reflowable metals and metal alloys, such as tin/lead, and nonreflowable metals and metal alloys, such as gold, palladium and platinum.

    Abstract translation: 使用光可固化树脂作为永久介电掩模的掩模方法，其中所述树脂含有催化剂填料，其在被激活时能够直接化学镀该树脂。 该树脂用于简化诸如金属垫的隔离表面特征的选择性电镀，同时还改善电路板的外表面的拓扑，特别是当小金属焊盘需要受控体积的可回流金属时。 树脂优选被光定影以消除金属垫周围的凹陷区域，从而促进金属特征的定义，并产生近似平面的表面。 可以提供的附加特征包括多层电路板内的外部导电接地层和电磁屏蔽层。 掩模方法可以有利地用于可回流金属和金属合金，例如锡/铅，以及不可流动的金属和金属合金，例如金，钯和铂。

    Printed wire boards and method of making same
    59.
    发明授权
    Printed wire boards and method of making same 失效
    印刷线路板及其制作方法

    公开(公告)号：US5496613A

    公开(公告)日：1996-03-05

    申请号：US157038

    申请日：1993-12-02

    Applicant: Erik Middelman ,  Pieter H. Zuuring

    Inventor： Erik Middelman ,  Pieter H. Zuuring

    IPC: B32B5/12 ,  B32B7/12 ,  H05K1/03 ,  H05K3/00 ,  B32B9/00

    CPC classification number: H05K1/0366 ,  B32B5/12 ,  H05K1/036 ,  H05K2201/0236 ,  H05K2201/0287 ,  Y10T428/24058 ,  Y10T428/24124 ,  Y10T428/24917 ,  Y10T442/656

    Abstract: A laminate, adapted to be used as a supporting board for a printed circuit, is disclosed which comprises layers of an electrically non-conductive matrix material reinforced with unidirectionally (UD) oriented fibers with the layers comprising individual matrix material having different directions of orientation. The layers are stacked to form a laminate of crossing layers, and the laminate has a core plane relative to which the crossing layers are in mirror image relationship so that the laminate has orthotropic properties. The laminate comprises layers of adhesive material present at least between any pair of layers of UD-reinforced matrix material having different directions of orientation.

    Abstract translation: PCT No.PCT / EP92 / 01132 Sec。 371日期1993年12月2日第 102（e）日期1993年12月2日PCT提交1992年5月19日PCT公布。 WO92 / 22191 PCT出版物 公开了一种适于用作印刷电路的支撑板的层压板，其包括用单向（UD）定向纤维增强的非导电基体材料层，其中所述层包括单独的基体 材料具有不同的取向方向。 层叠以形成交叉层的层压体，并且层压体具有相对于其交叉层呈镜像关系的芯平面，使得层压体具有正交各向异性。 层压体包括至少存在于具有不同取向方向的任何一对UD增强基体材料层之间的粘合剂材料层。

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