中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

1025 records (took 0.028 seconds)

    Multilayered Wiring Board and Method of Manufacturing the Same
    53.
    发明申请
    Multilayered Wiring Board and Method of Manufacturing the Same 失效
    多层接线板及其制造方法

    公开(公告)号：US20110209910A1

    公开(公告)日：2011-09-01

    申请号：US13034792

    申请日：2011-02-25

    Applicant: Shinnosuke MAEDA ,  Satoshi HIRANO

    Inventor： Shinnosuke MAEDA ,  Satoshi HIRANO

    IPC: H05K1/11 ,  H01R9/00

    CPC classification number: H05K3/4682 ,  H05K1/112 ,  H05K3/205 ,  H05K2201/094 ,  H05K2201/09472 ,  H05K2201/099 ,  Y10T29/49147

    Abstract: A multilayered wiring board having a stack structure multilayered by alternately stacking a plurality of conductor layers and a plurality of resin insulation layers, wherein a solder resist is provided on at least one of a first main surface side and a second main surface side of the stack structure, a plurality of openings are formed in an outermost resin insulation layer that contacts with the solder resist, a plurality of the first main surface side connecting terminals or a plurality of the second main surface side connecting terminals being made of a copper layer as a main component and positioned in a plurality of the openings, terminal outer surfaces being positioned inwardly from an outer surface of the outermost resin insulation layer, and the solder resist extends into the plurality of openings and makes contact with an outer circumference portion of each of the terminal outer surfaces.

    Abstract translation: 一种多层布线基板，其具有通过交替堆叠多个导体层和多个树脂绝缘层而叠层的叠层结构，其中在所述堆叠的第一主表面侧和第二主表面侧中的至少一个上设置阻焊剂 结构中，在与阻焊剂接触的最外层树脂绝缘层中形成多个开口，多个第一主表面侧连接端子或多个第二主表面侧连接端子由铜层制成， 主要部件并且定位在多个开口中，端子外表面从最外层树脂绝缘层的外表面向内定位，并且阻焊剂延伸到多个开口中并与每个的外周部分接触 端子外表面。

    Method of Manufacturing Multilayer Wiring Substrate, and Multilayer Wiring Substrate
    54.
    发明申请
    Method of Manufacturing Multilayer Wiring Substrate, and Multilayer Wiring Substrate 有权
    制造多层接线基板和多层接线基板的方法

    公开(公告)号：US20110200788A1

    公开(公告)日：2011-08-18

    申请号：US13028588

    申请日：2011-02-16

    Applicant: Shinnosuke MAEDA ,  Tetsuo SUZUKI ,  Satoshi HIRANO

    Inventor： Shinnosuke MAEDA ,  Tetsuo SUZUKI ,  Satoshi HIRANO

    IPC: B32B3/24 ,  H05K3/06

    CPC classification number: H05K3/4682 ,  H05K1/112 ,  H05K3/205 ,  H05K2201/094 ,  H05K2201/09472 ,  H05K2201/099 ,  Y10T428/24331 ,  Y10T428/24339

    Abstract: A plurality of openings are formed in a resin insulation layer on a bottom surface side of a wiring laminate portion which constitutes a multilayer wiring substrate. A plurality of motherboard connection terminals are disposed to correspond to the openings. The motherboard connection terminals are primarily comprised of a copper layer, and peripheral portions of terminal outer surfaces thereof are covered by the outermost resin insulation layer. A dissimilar metal layer made of at least one metal which is lower in etching rate than copper is formed between an inner main surface of the outermost resin insulation layer and peripheral portions of the terminal outer surfaces.

    Abstract translation: 在构成多层布线基板的布线层叠体的底面侧的树脂绝缘层上形成有多个开口部。 多个主板连接端子被设置成对应于这些开口。 母板连接端子主要由铜层构成，其端子外表面的周边部分被最外层树脂绝缘层覆盖。 在最外层树脂绝缘层的内主表面和端子外表面的周边部分之间形成由蚀刻速率低于铜的至少一种金属制成的异种金属层。

    SUBSTRATE FOR MOUNTING ELEMENT AND PROCESS FOR ITS PRODUCTION
    56.
    发明申请
    SUBSTRATE FOR MOUNTING ELEMENT AND PROCESS FOR ITS PRODUCTION 审中-公开
    安装元件的基材及其生产工艺

    公开(公告)号：US20110186336A1

    公开(公告)日：2011-08-04

    申请号：US12955488

    申请日：2010-11-29

    Applicant: Katsuyoshi NAKAYAMA

    Inventor： Katsuyoshi NAKAYAMA

    IPC: H05K1/03 ,  H05K3/10

    CPC classification number: H05K3/30 ,  B24C3/322 ,  B24C7/0007 ,  H01L23/13 ,  H01L23/15 ,  H01L23/49827 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K1/113 ,  H05K3/246 ,  H05K2201/0347 ,  H05K2201/09472 ,  Y10T29/49155 ,  H01L2924/00

    Abstract: To provide a substrate for mounting element having sulfurization resistance improved by increasing planarity of the surface of a thick conductor layer.The substrate 10 for mounting element of the present invention has such a structure that on a surface of a LTCC substrate or ceramics substrate as an inorganic insulating substrate 1, a thick conductor layer 2 is formed as an element connection terminal. The thick conductor layer 2 is made of a metal composed mainly of silver (Ag) or copper (Cu) and formed by printing and firing a metal paste. This thick conductor layer has its surface planarized by wet blast treatment to a surface roughness Ra of at most 0.02 μm. A Ni/Au-plated layer 3 is formed on the thick conductor layer 2, so that the surface of the thick conductor layer 2 is completely covered without any space.

    Abstract translation: 为了提供通过增加厚导体层的表面的平坦度而提高耐硫化性的安装元件的基板。 本发明的安装元件用基板10具有如下的结构：在作为无机绝缘基板1的LTCC基板或陶瓷基板的表面上形成作为元件连接端子的厚导体层2。 厚导体层2由主要由银（Ag）或铜（Cu）组成的金属制成，并通过印刷和烧制金属膏形成。 该厚导体层的表面通过湿喷处理而平坦化，表面粗糙度Ra为0.02μm以下。 在厚导体层2上形成Ni / Au镀层3，使得厚导体层2的表面被完全覆盖而没有任何空间。

    Electrically conductive fluid interconnects for integrated circuit devices
    58.
    发明授权
    Electrically conductive fluid interconnects for integrated circuit devices 有权
    用于集成电路器件的导电流体互连

    公开(公告)号：US07939945B2

    公开(公告)日：2011-05-10

    申请号：US12113024

    申请日：2008-04-30

    Applicant: Ioan Sauciuc ,  Ward Scott

    Inventor： Ioan Sauciuc ,  Ward Scott

    IPC: H01L29/40

    CPC classification number: H05K3/321 ,  H01L2224/16225 ,  H05K3/3436 ,  H05K3/3463 ,  H05K2201/09472 ,  H05K2201/10734

    Abstract: Disclosed are embodiments of an electrically conductive fluid interconnect for coupling an integrated circuit (IC) device to a substrate. The IC device may be coupled to the substrate in a socketless manner or using a socket. The electrically conductive fluid interconnect may include, for example, a metal, an electrically conductive paste, or an electrically conductive polymer material. The fluid may be in a liquid or paste state over at least part of an operating temperature range of the IC device, and in other embodiments the fluid may be in the liquid or paste state at room temperature. Other embodiments are described and claimed.

    Abstract translation: 公开了用于将集成电路（IC）器件耦合到衬底的导电流体互连件的实施例。 IC器件可以以无插槽的方式或使用插座耦合到基板。 导电流体互连可以包括例如金属，导电膏或导电聚合物材料。 流体可以在IC器件的至少一部分工作温度范围内处于液体或糊状态，并且在其它实施例中，流体可以在室温下处于液体或糊状态。 描述和要求保护其他实施例。

    METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SUBSTRATE FOR THE SEMICONDUCTOR PACKAGE
    60.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SUBSTRATE FOR THE SEMICONDUCTOR PACKAGE 失效
    制造半导体封装的方法和制造半导体封装的衬底的方法

    公开(公告)号：US20100323474A1

    公开(公告)日：2010-12-23

    申请号：US12794293

    申请日：2010-06-04

    Applicant: Masashi Miyazaki

    Inventor： Masashi Miyazaki

    IPC: H01L21/60

    CPC classification number: H01L23/49827 ,  H01L21/4846 ,  H01L21/6835 ,  H01L23/49822 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/13021 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H05K1/113 ,  H05K3/205 ,  H05K3/4682 ,  H05K2201/09472 ,  H05K2201/10674 ,  H01L2224/0401

    Abstract: A method of manufacturing a semiconductor package, includes the steps of: forming a substrate on which a semiconductor chip is to be mounted; and mounting the semiconductor chip on the substrate through connection bumps, the substrate forming step including a first step of forming a plurality of electrode pads to be bonded to the connection bumps on a part of a support plate, a second step of forming one or more wiring layers on the support plate including the electrode pads with an insulation layer interposed between them, thereby forming a substrate having the electrode pads formed thereon on one side thereof, and a third step of removing the substrate from the support plate, wherein a plurality of first convex portions are formed on the support plate prior to the first step, and the electrode pads are formed on the first convex portions at the first step.

    Abstract translation: 一种制造半导体封装的方法，包括以下步骤：形成其上要安装半导体芯片的基板; 并且通过连接凸块将所述半导体芯片安装在所述基板上，所述基板形成步骤包括：第一步骤，在支撑板的一部分上形成要与所述连接凸块接合的多个电极焊盘;第二步骤，形成一个或多个 支撑板上的布线层包括电极焊盘，绝缘层插在它们之间，从而形成其一侧上形成有电极焊盘的基板，以及从支撑板移除基板的第三步骤 在第一步骤之前，在支撑板上形成第一凸起部分，并且在第一步骤中在第一凸部上形成电极焊盘。

Patent Agency Ranking