公开(公告)号：US08837808B2

公开(公告)日：2014-09-16

申请号：US13721015

申请日：2012-12-20

Applicant: Kinsus Interconnect Technology Corp.

Inventor： Chia-Chi Lo ,  Cheng-Hsiung Yang ,  Jun-Chung Hsu

IPC: G06K9/00 ,  G06T7/00

CPC classification number: H05K1/0269 ,  H05K3/0008 ,  H05K3/225 ,  H05K2201/09927 ,  H05K2201/09936

Abstract: Disclosed is a method of final defect inspection, including preparing a final defect inspection apparatus which includes a host device, a microscope, a bar code scanner, a support tool and a signal transceiver, using the host device to calibrate an original point in an outline of the circuit board based on a plurality of original mark positions generated by an electromagnetic pen, using the electromagnetic pen to mark each defect position on the inspection region on the circuit board where any defect is found through the microscope, using the signal transceiver to receive and transmit each defect position to the host device, and using the host device to calculate the coordinate of a scrap region based on a relative position between the original point and each defect position so as to generate a shipment file.

Abstract translation: 公开了一种最终缺陷检查的方法，包括使用主机设备准备包括主机，显微镜，条形码扫描仪，支持工具和信号收发器的最终缺陷检查设备来校准轮廓中的原始点 基于由电磁笔产生的多个原始标记位置的电路​​板，使用电磁笔来标记电路板上通过显微镜发现任何缺陷的检查区域上的每个缺陷位置，使用信号收发器接收 并且将每个缺陷位置发送到主机设备，并且使用主机设备基于原始点和每个缺陷位置之间的相对位置来计算废料区域的坐标，以便生成出货文件。

公开(公告)号：US08787022B2

公开(公告)日：2014-07-22

申请号：US13010475

申请日：2011-01-20

Applicant: Takakatsu Moriai ,  Toyokazu Eguchi ,  Atsushi Kaneko ,  Atsushi Okada

Inventor： Takakatsu Moriai ,  Toyokazu Eguchi ,  Atsushi Kaneko ,  Atsushi Okada

IPC: H05K7/20

CPC classification number: G06F1/185 ,  G06F1/20 ,  H01L23/552 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/02 ,  H05K1/0298 ,  H05K3/0052 ,  H05K7/20472 ,  H05K2201/09145 ,  H05K2201/09936 ,  H05K2201/10409 ,  H01L2924/00

Abstract: According to one embodiment, coupling capacitance in a state in which a first heat radiation member is arranged between parallel flat plates of a first capacitor formed by a surface of a housing opposed to one surface of a printed circuit board and the printed circuit board is smaller than coupling capacitance in a state in which an integrally formed object having a relative dielectric constant of 5.8 is arranged between the first capacitor to cover a first radiating region containing the controller and the first nonvolatile semiconductor memories.

Abstract translation: 根据一个实施例，在第一散热构件布置在由与印刷电路板的一个表面相对的壳体的表面形成的第一电容器的平行平板和印刷电路板之间的状态下的耦合电容较小 在第一电容器之间布置有相对介电常数为5.8的整体形成的物体的状态下的耦合电容，以覆盖包含控制器的第一辐射区域和第一非易失性半导体存储器。

公开(公告)号：US20140177939A1

公开(公告)日：2014-06-26

申请号：US13721015

申请日：2012-12-20

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Chia-Chi Lo ,  Cheng-Hsiung Yang ,  Jun-Chung Hsu

IPC: G06T7/00

CPC classification number: H05K1/0269 ,  H05K3/0008 ,  H05K3/225 ,  H05K2201/09927 ,  H05K2201/09936

Abstract: Disclosed is a method of final defect inspection, including preparing a final defect inspection apparatus which includes a host device, a microscope, a bar code scanner, a support tool and a signal transceiver, using the host device to calibrate an original point in an outline of the circuit board based on a plurality of original mark positions generated by an electromagnetic pen, using the electromagnetic pen to mark each defect position on the inspection region on the circuit board where any defect is found through the microscope, using the signal transceiver to receive and transmit each defect position to the host device, and using the host device to calculate the coordinate of a scrap region based on a relative position between the original point and each defect position so as to generate a shipment file.

Abstract translation: 公开了一种最终缺陷检查的方法，包括使用主机设备准备包括主机，显微镜，条形码扫描仪，支持工具和信号收发器的最终缺陷检查设备来校准轮廓中的原始点 基于由电磁笔产生的多个原始标记位置的电路​​板，使用电磁笔来标记电路板上通过显微镜发现任何缺陷的检查区域上的每个缺陷位置，使用信号收发器接收 并且将每个缺陷位置发送到主机设备，并且使用主机设备基于原始点和每个缺陷位置之间的相对位置来计算废料区域的坐标，以便生成出货文件。

公开(公告)号：US20140174796A1

公开(公告)日：2014-06-26

申请号：US14136957

申请日：2013-12-20

Applicant: Canon Kabushiki Kaisha

Inventor： Shinsaku Watanabe

IPC: H05K1/02

CPC classification number: H05K1/0269 ,  H05K1/0266 ,  H05K1/0274 ,  H05K1/0393 ,  H05K2201/0108 ,  H05K2201/09936

Abstract: A flexible printed circuit board having a copper foil character with good visibility and without copper foil pattern peeling. The flexible printed circuit board has a base material having optical transparency, a wiring pattern formed on one surface of the base material; a first opaque cover lay film covering a surface of the wiring pattern, a character formed on the other surface of the base material; and a second opaque cover lay film covering a surface of the character. The first opaque cover lay film has an opening portion is formed therein, and the character is formed so as to be visually recognizable through the opening portion.

Abstract translation: 具有铜箔字符的柔性印刷电路板，具有良好的可视性并且没有铜箔图案剥离。 柔性印刷电路板具有具有光学透明性的基材，形成在基材的一个表面上的布线图案; 覆盖所述布线图案的表面的第一不透明覆盖膜，形成在所述基材的另一个表面上的字符; 以及覆盖角色表面的第二不透明覆盖膜。 第一不透明覆盖膜在其中形成有开口部分，并且该字符形成为通过开口部分在视觉上可识别。

公开(公告)号：US08754332B2

公开(公告)日：2014-06-17

申请号：US13058268

申请日：2009-08-03

Applicant: Yukihiro Sumida ,  Takeshi Muraoka

Inventor： Yukihiro Sumida ,  Takeshi Muraoka

IPC: H05K1/00

CPC classification number: H05K3/361 ,  G02F1/13452 ,  H05K1/0266 ,  H05K1/0269 ,  H05K1/117 ,  H05K3/323 ,  H05K2201/09381 ,  H05K2201/09663 ,  H05K2201/09727 ,  H05K2201/0979 ,  H05K2201/09936

Abstract: Provided is a flexible substrate wherein a connection portion between the flexible substrate and an electric circuit board meets requirements of narrow wiring pitch and low resistance at the connection portion. An electric circuit structure, which has the flexible substrate and the electric circuit board to which the flexible substrate is connected, is also provided. A wiring pattern (22) is formed on a flexible base film (21), a connection terminal (25) connected electrically to an electrode terminal of another electric circuit board is arranged at an end portion of the wiring pattern (22), and the connection terminal (25) includes wide connection terminals (25b, 25c) having a terminal width extending across plural lines of the wiring pattern (22).

Abstract translation: 提供了柔性基板，其中柔性基板和电路板之间的连接部分满足连接部分处的窄布线间距和低电阻的要求。 还提供了具有柔性基板和连接柔性基板的电路板的电路结构。 布线图案（22）形成在柔性基膜（21）上，与布线图案（22）的端部配置有与电极基板的电极端子电连接的连接端子（25） 连接端子（25）包括具有延伸穿过布线图案（22）的多条线的端子宽度的宽连接端子（25b，25c）。

公开(公告)号：US08448571B2

公开(公告)日：2013-05-28

申请号：US13171464

申请日：2011-06-29

Applicant: Xiao-Fei Zheng

Inventor： Xiao-Fei Zheng

IPC: B41M1/12 ,  B41C1/14 ,  B41L13/00 ,  H05K1/03

CPC classification number: H05K3/1216 ,  H05K1/0269 ,  H05K2201/09936 ,  H05K2203/166

Abstract: A method for screen printing a printed circuit board substrate comprises the following steps. A printed circuit board substrate including a copper foil layer is provided. Pluralities of marks are formed on the copper foil layer. A plurality of printing screens are provided, each includes an screen pattern and an opening corresponding to a respective mark. Printing material is applied on the ith screen Si to form an ith printing pattern and cover the ith mark at the ith opening, the ith printing pattern conforms to the ith screen pattern; checking whether the ith mark is covered by the printing material when i is less than N. Printing material is applied on the (i+1)th screen Si+1 so as to form an (i+1)th printing pattern on the copper foil layer and covers the (i+1)th Mark Mi+1 at the (i+1)th opening, if the ith mark is covered by the printing material.

Abstract translation: 丝网印刷印刷电路板基板的方法包括以下步骤。 提供了包括铜箔层的印刷电路板基板。 在铜箔层上形成多个标记。 提供了多个印刷屏幕，每个印刷屏幕包括一个屏幕图案和一个对应于相应标记的开口。 打印材料应用于第i个屏幕Si上，形成第i个印刷图案，并在第i个开口处覆盖第i个印记，第i个打印图案符合第i个屏幕图案; 检查当i小于N时第i个标记是否被打印材料覆盖。在第（i + 1）个屏幕Si + 1上施加印刷材料，以便在铜上形成第（i + 1）印刷图案 如果第i个标记被打印材料覆盖，则在第（i + 1）个开口处覆盖第（i + 1）个Mark Mi + 1。

公开(公告)号：US08168894B2

公开(公告)日：2012-05-01

申请号：US12504627

申请日：2009-07-16

Applicant: Hsiao-Wan Kuo

Inventor： Hsiao-Wan Kuo

IPC: H05K1/00

CPC classification number: H05K1/142 ,  H05K1/0266 ,  H05K1/0287 ,  H05K3/0052 ,  H05K2201/09936 ,  H05K2201/09945 ,  H05K2201/10106 ,  H05K2201/10287

Abstract: The present invention provides a light emitting diode (LED) circuit board with a multi-directional electrical connection. The board includes a board body with a surface and an assembly plane as well as four sides and corresponding corners, and a plurality of positive and negative electric contacts, separately arranged onto the surface of the board body nearby four sides, and also arranged at intervals. The circuit of the LED circuit board is simplified, helping to facilitate multi-directional electrical connection and expansion, and to improve significantly the paving efficiency of the LED circuit board with better practicability and industrial benefits.

Abstract translation: 本发明提供一种具有多方向电连接的发光二极管（LED）电路板。 板包括具有表面和组装平面以及四个侧面和相应角部的板体，以及分别布置在四个侧面附近的板体表面上的多个正负电触点，并且还间隔地布置 。 LED电路板的电路简化，有助于促进多方向电连接和扩展，并显着提高LED电路板的铺路效率，具有更好的实用性和工业效益。

公开(公告)号：US20110273834A1

公开(公告)日：2011-11-10

申请号：US13010475

申请日：2011-01-20

Applicant: Takakatsu Moriai ,  Toyokazu Eguchi ,  Atsushi Kaneko ,  Atsushi Okada

Inventor： Takakatsu Moriai ,  Toyokazu Eguchi ,  Atsushi Kaneko ,  Atsushi Okada

IPC: G06F1/16

CPC classification number: G06F1/185 ,  G06F1/20 ,  H01L23/552 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/02 ,  H05K1/0298 ,  H05K3/0052 ,  H05K7/20472 ,  H05K2201/09145 ,  H05K2201/09936 ,  H05K2201/10409 ,  H01L2924/00

Abstract: According to one embodiment, coupling capacitance in a state in which a first heat radiation member is arranged between parallel flat plates of a first capacitor formed by a surface of a housing opposed to one surface of a printed circuit board and the printed circuit board is smaller than coupling capacitance in a state in which an integrally formed object having a relative dielectric constant of 5.8 is arranged between the first capacitor to cover a first radiating region containing the controller and the first nonvolatile semiconductor memories.

Abstract translation: 根据一个实施例，在第一散热构件布置在由与印刷电路板的一个表面相对的壳体的表面形成的第一电容器的平行平板和印刷电路板之间的状态下的耦合电容较小 在第一电容器之间布置有相对介电常数为5.8的整体形成的物体的状态下的耦合电容，以覆盖包含控制器的第一辐射区域和第一非易失性半导体存储器。

公开(公告)号：US07898818B2

公开(公告)日：2011-03-01

申请号：US11683144

申请日：2007-03-07

Applicant: Daniel W. Kehoe

Inventor： Daniel W. Kehoe

IPC: H05K1/18

CPC classification number: H01G4/38 ,  H01G2/065 ,  H01G4/30 ,  H05K1/0231 ,  H05K1/181 ,  H05K2201/09936 ,  H05K2201/10454 ,  H05K2201/10522 ,  H05K2201/10636 ,  H05K2203/168 ,  Y02P70/611 ,  Y10T29/49169

Abstract: Variably oriented capacitive elements for printed circuit boards (PCBs) and method of manufacturing the same. In one form the disclosure, a PCB can include a first multiple-layered capacitor including a first orientation and placed along a surface operable to mount electronic components. The PCB can also include a second multiple-layered capacitor including a second orientation different from the first. The second multiple-layered capacitor can be placed along the surface near the first multiple-layered capacitor.

Abstract translation: 用于印刷电路板（PCB）的可变方向电容元件及其制造方法。 在本公开的一种形式中，PCB可以包括包括第一取向的第一多层电容器，并且沿着可操作以安装电子部件的表面放置。 PCB还可以包括第二多层电容器，其包括与第一取向不同的第二取向。 第二多层电容器可以沿着第一多层电容器附近的表面放置。

公开(公告)号：US20100010665A1

公开(公告)日：2010-01-14

申请号：US12439554

申请日：2007-08-28

Applicant: Yoshihisa Kakuda

Inventor： Yoshihisa Kakuda

IPC: G06F7/00

CPC classification number: H05K1/0269 ,  H05K3/341 ,  H05K3/3484 ,  H05K2201/09936

Abstract: A board inspection device 1 comprises: an inspection unit 50 for inspecting a board P; a board-supplying unit 24 that enables a board P to be manually supplied to the inspection unit 50; and a liquid crystal monitor 4 for displaying prescribed information including the results of an inspection of the board P, wherein the board inspection device 1 is further provided with: a camera 52 for recognizing identification information assigned to the board P; and a control unit 60 that confirms inspection history of the board P based on the identification information acquired via the camera 52 and controls, when it is confirmed that the board P has already been inspected, the liquid crystal monitor 4 to display information to the effect that the board P has already been inspected and prohibits execution of an inspection operation on the board P by the inspection unit 50.

Abstract translation: 板检查装置1包括：用于检查板P的检查单元50; 板供给单元24，其能够将板P手动供给到检查单元50; 以及液晶监视器4，用于显示包括板P的检查结果的规定信息，其中板检测装置1还设置有：用于识别分配给板P的识别信息的照相机52; 以及控制单元60，其基于经由照相机52获取的识别信息来确认纸板P的检查历史，并且当确认已经检查了纸板P时，控制液晶监视器4以显示信息 板P已经被检查，并且禁止由检查单元50在板P上执行检查操作。