公开(公告)号：US08226438B2

公开(公告)日：2012-07-24

申请号：US12789621

申请日：2010-05-28

Applicant: Thomas S. Cohen ,  Marc B. Cartier, Jr. ,  Mark W. Gailus

Inventor： Thomas S. Cohen ,  Marc B. Cartier, Jr. ,  Mark W. Gailus

IPC: H01R13/648

CPC classification number: H05K7/1445 ,  H01R13/514 ,  H01R13/6587 ,  H01R13/6591 ,  H05K1/0231 ,  H05K1/0237 ,  H05K1/116 ,  H05K1/14 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09718 ,  H05K2201/10189 ,  H05K2203/1572

Abstract: A midplane has a first side to which contact ends of a first differential connector are connected and a second side opposite the first side to which contact ends of a second differential connector are connected. The midplane includes a plurality of vias extending from the first side to the second side, with the vias providing first signal launches on the first side and second signal launches on the second side. The first signal launches are provided in a plurality of rows, with each row having first signal launches along a first line and first signal launches along a second line substantially parallel to the first line. The second signal launches are provided in a plurality of columns, with each column having second signal launches along a third line and second signal launches along a fourth line substantially parallel to the third line.

Abstract translation: 中平面具有连接第一差分连接器的接触端的第一侧和与第二差分连接器的接触端连接的第一侧相对的第二侧。 中平面包括从第一侧延伸到第二侧的多个通孔，其中通孔在第一侧上提供第一信号发射，而第二信号在第二侧上发射。 第一信号发射被设置成多行，每行具有沿着第一线的第一信号发射，并且第一信号沿着基本上平行于第一线的第二线发射。 第二信号发射被提供在多列中，每列具有沿着第三线的第二信号发射，而第二信号沿着基本上平行于第三线的第四线发射。

公开(公告)号：US08207451B2

公开(公告)日：2012-06-26

申请号：US12284677

申请日：2008-09-24

Applicant: Hsin-Chia Lu ,  Tsung-Yi Chou

Inventor： Hsin-Chia Lu ,  Tsung-Yi Chou

IPC: H05K1/11

CPC classification number: H05K1/0253 ,  H05K1/0219 ,  H05K2201/09236 ,  H05K2201/09663

Abstract: A ground-plane slotted type signal transmission circuit board is proposed, which is designed for use with a high-speed digital signal processing system for providing a low-loss signal transmission function. The proposed circuit board structure is characterized by the formation of a slotted structure (i.e., elongated cutaway portion) in the ground plane at the beneath of each signal line. Since the slotted structure is a void portion, the electric field of a gigahertz signal being transmitting through the overlaying signal line would be unable to induce electric currents in the void portion of the ground plane. This feature allows the prevention of a leakage current that would otherwise flow from the signal line to the ground plane, and therefore can help prevent unnecessary power loss of the transmitted signal.

Abstract translation: 提出了一种地平面开槽型信号传输电路板，其设计用于与用于提供低损耗信号传输功能的高速数字信号处理系统一起使用。 所提出的电路板结构的特征在于在每个信号线的下方的接地平面中形成开槽结构（即，细长的切除部分）。 由于开槽结构是空隙部分，通过覆盖信号线传输的千兆赫信号的电场将不能在接地平面的空隙部分中感应出电流。 该特征允许防止否则将从信号线流向接地平面的漏电流，因此可以有助于防止发射信号的不必要的功率损失。

公开(公告)号：US08203395B2

公开(公告)日：2012-06-19

申请号：US12542447

申请日：2009-08-17

Applicant: Fei Guo ,  Xiao Ling Shi ,  Mark Frankovitch ,  Wasim Ullah

Inventor： Fei Guo ,  Xiao Ling Shi ,  Mark Frankovitch ,  Wasim Ullah

IPC: H01P3/08

CPC classification number: H05K1/0219 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/552 ,  H01L2223/6616 ,  H01L2223/6638 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0245 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/09236 ,  H05K2201/09536 ,  H05K2201/09618 ,  H05K2201/09709 ,  H05K2201/09727 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2924/00

Abstract: Various apparatus and methods of addressing crosstalk in a circuit board are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first layer of a circuit board with a first signal trace and forming a second layer of the circuit board with a second signal trace. A first guard trace is formed on the first layer and offset laterally from the first signal trace but at least partially overlapping the second signal trace and a second guard trace is formed on the second layer and offset laterally from the second signal trace but at least partially overlapping the first signal trace.

Abstract translation: 公开了解决电路板中的串扰的各种装置和方法。 一方面，提供了一种制造方法，其包括用第一信号迹线形成电路板的第一层，并用第二信号迹线形成电路板的第二层。 第一保护迹线形成在第一层上并且从第一信号迹线侧向偏移，但是至少部分地与第二信号迹线重叠，并且第二保护迹线形成在第二层上并且从第二信号迹线侧向偏移，但是至少部分地 重叠第一个信号迹线。

公开(公告)号：US08193880B2

公开(公告)日：2012-06-05

申请号：US12023184

申请日：2008-01-31

Applicant: Shu-Ying Cho ,  Tzu-Jin Yeh ,  Sally Liu

Inventor： Shu-Ying Cho ,  Tzu-Jin Yeh ,  Sally Liu

IPC: H03H7/38 ,  H01P3/08

CPC classification number: H01P3/003 ,  H01P3/06 ,  H05K1/0219 ,  H05K1/0242 ,  H05K1/025 ,  H05K2201/09236 ,  H05K2201/09727 ,  H05K2201/09781

Abstract: A semiconductor device for transmitting a radio frequency signal along a signal line includes a signal line that extends along a principal axis. On one side of the signal line is a first dielectric, and on the opposite side of the signal line is a second dielectric. First and second ground lines are proximate to the first and second dielectrics, respectively, and the ground lines are approximately parallel to the signal line. The device has a transverse cross-section that varies along the principal axis.

Abstract translation: 沿着信号线发送射频信号的半导体装置包括沿主轴延伸的信号线。 在信号线的一侧是第一电介质，信号线的相对侧是第二电介质。 第一和第二接地线分别靠近第一和第二电介质，并且接地线近似平行于信号线。 该装置具有沿主轴变化的横截面。

公开(公告)号：US08149543B2

公开(公告)日：2012-04-03

申请号：US12033177

申请日：2008-02-19

Applicant: Jong Yoon Kim

Inventor： Jong Yoon Kim

IPC: G11B5/55

CPC classification number: G11B5/40 ,  G11B5/4846 ,  H05K1/0262 ,  H05K1/0393 ,  H05K2201/09236

Abstract: A hard disk drive apparatus includes a magnetic head having a write head to record data on a disk and a read head to read the data recorded on the disk, at least one actuator arm on which the magnetic head is mounted, a voice coil motor to rotate the at least one actuator arm across the disk, a printed circuit board electrically connected to the write head, the read head, and the voice coil motor, and a flexible printed circuit having at least one write trace to electrically connect the write head and the printed circuit board, at least one read trace to electrically connect the read head and the printed circuit board, and a voice coil motor trace to electrically connect the voice coil motor and the printed circuit board. In the hard disk drive, the write trace is arranged between the read trace and the voice coil motor trace.

Abstract translation: 硬盘驱动装置包括磁头，其具有用于在盘上记录数据的写入头和用于读取记录在盘上的数据的读取头，安装有磁头的至少一个致动器臂，音圈马达 将至少一个致动器臂旋转跨越盘，印刷电路板电连接到写入头，读取头和音圈电机，以及柔性印刷电路，其具有至少一个写入迹线以电连接写入头和 印刷电路板，用于电连接读取头和印刷电路板的至少一个读取轨迹和用于电连接音圈电机和印刷电路板的音圈电机轨迹。 在硬盘驱动器中，写入轨迹布置在读取轨迹和音圈电机轨迹之间。

公开(公告)号：US08125289B2

公开(公告)日：2012-02-28

申请号：US12384943

申请日：2009-04-10

Applicant: Mohammad Tabatabai

Inventor： Mohammad Tabatabai

IPC: H01P3/08

CPC classification number: H01P3/026 ,  H05K1/024 ,  H05K1/0245 ,  H05K2201/0191 ,  H05K2201/0715 ,  H05K2201/09236 ,  H05K2201/09318

Abstract: According to one exemplary embodiment, a circuit board for reducing dielectric loss, conductor loss, and insertion loss includes a pair of transmission lines. The pair of transmission lines has sufficient thickness to cause substantial broadside electromagnetic coupling between the pair of transmission lines, where the pair of transmission lines is sufficiently separated from a ground plane of the circuit board so as to cause negligible electromagnetic coupling to the ground plane relative to the substantial broadside electromagnetic coupling. The pair of transmission lines thereby reduce dielectric loss, conductor loss, and insertion loss for signals traversing through the transmission line pair. The pair of transmission lines can be separated from the ground plane by, for example, at least 50.0 mils.

Abstract translation: 根据一个示例性实施例，用于降低介质损耗，导体损耗和插入损耗的电路板包括一对传输线。 这对传输线具有足够的厚度，以在一对传输线之间产生实质的宽边电磁耦合，其中一对传输线与电路板的接地平面充分分离，从而使接地平面的电磁耦合可以忽略不计 到实质的宽边电磁耦合。 这对传输线因此减少了穿过传输线对的信号的介质损耗，导体损耗和插入损耗。 这对传输线可以通过例如至少50.0密耳从地平面分离。

公开(公告)号：US08124884B2

公开(公告)日：2012-02-28

申请号：US12693418

申请日：2010-01-25

Applicant: Yung-Chieh Chen ,  Cheng-Hsien Lee ,  Shou-Kuo Hsu

Inventor： Yung-Chieh Chen ,  Cheng-Hsien Lee ,  Shou-Kuo Hsu

IPC: H05K1/11

CPC classification number: H05K1/0245 ,  H05K1/0231 ,  H05K2201/09236

Abstract: A printed circuit board (PCB) includes a positive differential signal line including first and second segments, a negative differential signal line including third and fourth segments, first and second connecting elements soldered on opposite surfaces of the PCB. The first segment and the fourth segment are located in a first straight line which has a first permittivity. The third segment and the second segment are located in a second straight line which has a second permittivity different from the first permittivity. The first connecting element is connected between the first segment and the second segment. The second connecting element is connected between the third segment and the fourth segment.

Abstract translation: 印刷电路板（PCB）包括包括第一和第二段的正差分信号线，包括第三和第四段的负差分信号线，焊接在PCB的相对表面上的第一和第二连接元件。 第一段和第四段位于具有第一介电常数的第一直线中。 第三段和第二段位于具有与第一介电常数不同的第二介电常数的第二直线上。 第一连接元件连接在第一段和第二段之间。 第二连接元件连接在第三段和第四段之间。

公开(公告)号：US08091061B2

公开(公告)日：2012-01-03

申请号：US11616966

申请日：2006-12-28

Applicant: Takafumi Betsui ,  Naoto Taoka ,  Motoo Suwa ,  Shigezumi Matsui ,  Norihiko Sugita ,  Yoshiharu Fukushima

Inventor： Takafumi Betsui ,  Naoto Taoka ,  Motoo Suwa ,  Shigezumi Matsui ,  Norihiko Sugita ,  Yoshiharu Fukushima

IPC: G06F17/50

CPC classification number: G11C5/04 ,  G11C5/02 ,  G11C5/06 ,  G11C5/063 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/17 ,  H01L25/18 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/49175 ,  H01L2924/1432 ,  H01L2924/14361 ,  H01L2924/15311 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0237 ,  H05K1/181 ,  H05K3/4602 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/10159 ,  H05K2201/10522 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00

Abstract: A microcomputer provided on a rectangular semiconductor board has memory interface circuits. The memory interface circuits are separately disposed in such positions as to extend along the peripheries of the semiconductor board on both sides from one corner as a reference position. In this case, limitations to size reduction imposed on the semiconductor board can be reduced compared with a semiconductor board having memory interface circuits only on one side. Respective partial circuits on each of the separated memory interface circuits have equal data units associated with data and data strobe signals. Thus, the microcomputer has simplified line design on a mother board and on a module board.

Abstract translation: 设置在矩形半导体板上的微型计算机具有存储器接口电路。 存储器接口电路分别设置在从作为基准位置的一个角部沿着半导体板的两侧的周边延伸的位置。 在这种情况下，与仅在一侧具有存储器接口电路的半导体板相比，可以减小对半导体板的尺寸减小的限制。 每个分离的存储器接口电路上的各个部分电路具有与数据和数据选通信号相关联的相等的数据单元。 因此，微型计算机在主板和模块板上简化了线路设计。

公开(公告)号：US20110318970A1

公开(公告)日：2011-12-29

申请号：US13222788

申请日：2011-08-31

Applicant: Bernard Harold Hammond, JR. ,  David Patrick Murray ,  Ian Robert George

Inventor： Bernard Harold Hammond, JR. ,  David Patrick Murray ,  Ian Robert George

IPC: H01R24/00

CPC classification number: H01R13/6466 ,  H01R4/2416 ,  H01R13/6658 ,  H01R13/719 ,  H01R24/64 ,  H01R2107/00 ,  H05K1/0228 ,  H05K1/162 ,  H05K3/4644 ,  H05K2201/09236 ,  H05K2201/09245 ,  H05K2201/09263 ,  H05K2201/10189 ,  Y10S439/941 ,  Y10T29/49117 ,  Y10T29/49204 ,  Y10T29/49222

Abstract: The present disclosure relates to a telecommunications jack including a housing having a port for receiving a plug. The jack also includes a plurality of contact springs adapted to make electrical contact with the plug when the plug is inserted into the port of the housing, and a plurality of wire termination contacts for terminating wires to the jack. The jack further includes a circuit board that electrically connects the contact springs to the wire termination contacts. The circuit board includes a multi-zone crosstalk compensation arrangement for reducing crosstalk at the jack.

公开(公告)号：US08076588B2

公开(公告)日：2011-12-13

申请号：US12000730

申请日：2007-12-17

Applicant: Eiichi Hirakawa

Inventor： Eiichi Hirakawa

IPC: H05K1/11

CPC classification number: H05K1/0219 ,  H05K1/112 ,  H05K2201/09227 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09609 ,  H05K2201/09672 ,  H05K2201/10674

Abstract: A multilayer wiring board having a structure in which wiring layers 12A to 12D and insulating layers 11A to 11C are alternately arranged, and in which one or plural kinds of wirings selected from a group of a signal wiring 25 having a signal electrode 15, a power supply wiring 26 having a power supply electrode 16, and a ground wiring 27 having a ground electrode 17 are formed on each of the wiring layers 12A to 12D. The signal wiring 25 and the power supply wiring 26 are alternately provided on the insulating layers. Alternatively, the signal wiring 25 and the ground wiring 27 are alternately provided on the insulating layers.

Abstract translation: 具有布线层12A〜12D和绝缘层11A〜11C交替配置的结构的多层布线基板，其中从具有信号电极15的信号布线25的一组中选择一种或多种布线，功率 具有电源电极16的电源布线26和具有接地电极17的接地布线27形成在每个布线层12A至12D上。 信号布线25和电源布线26交替地设置在绝缘层上。 或者，信号布线25和接地布线27交替地设置在绝缘层上。