公开(公告)号：US08283573B2

公开(公告)日：2012-10-09

申请号：US12694322

申请日：2010-01-27

Applicant: Motoo Asai ,  Dongdong Wang ,  Takahiro Mori

Inventor： Motoo Asai ,  Dongdong Wang ,  Takahiro Mori

IPC: H05K1/11

CPC classification number: H05K3/423 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K1/036 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/181 ,  H05K3/381 ,  H05K3/385 ,  H05K3/387 ,  H05K3/388 ,  H05K3/426 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2203/0315 ,  H05K2203/0733 ,  H05K2203/0773 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599

Abstract: A multi-layer printed circuit board including a core structure including resin layers and conductor circuits sandwiched by the resin layers, the core structure having a first surface and a second surface on an opposite side of the first surface, a first conductor layer including conductor circuits formed on the first surface of the core structure, and a second conductor layer including conductor circuits formed on the second surface of the core structure. The core structure includes a first via hole and a second via hole, the first via hole and the second via hole sandwich one or more conductor circuits in the core substrate and are positioned vertically to form a through hole electrically connecting respective ones of the conductor circuits of the first and the second conductor layers, and the first via hole and the second via hole are deviated from each other in a vertical direction.

Abstract translation: 一种多层印刷电路板，包括由树脂层和由树脂层夹在的导体电路的芯结构，芯结构具有在第一表面的相对侧的第一表面和第二表面，第一导体层包括导体电路 形成在芯结构的第一表面上，以及第二导体层，包括形成在芯结构的第二表面上的导体电路。 芯结构包括第一通孔和第二通孔，第一通孔和第二通孔夹着芯基板中的一个或多个导体电路并垂直定位，以形成电连接各个导体电路的通孔 的第一和第二导体层，并且第一通孔和第二通孔在垂直方向上彼此偏离。

公开(公告)号：US20120229342A1

公开(公告)日：2012-09-13

申请号：US13407070

申请日：2012-02-28

Applicant: Tadahiko MAEDA ,  Masataka Ito ,  Dongdong Wang ,  Yoshitsugu Wakazono ,  Yasuhiko Mano

Inventor： Tadahiko MAEDA ,  Masataka Ito ,  Dongdong Wang ,  Yoshitsugu Wakazono ,  Yasuhiko Mano

IPC: H01Q1/38

CPC classification number: H01Q1/36 ,  H01Q1/38 ,  H01Q9/28 ,  H01Q9/38 ,  H01Q11/08

Abstract: An antenna device has a substrate having a first surface and a second surface on the opposite side of the first surface, a first-surface-side conductive layer formed on the first surface of the substrate, a second-surface-side conductive layer formed on the second surface of the substrate, and through hole conductors connecting the first-surface-side conductive layer and the second-surface-side conductive layer. The first-surface-side conductive layer and the second-surface-side conductive layer are formed such that the first-surface-side conductive layer and the second-surface-side conductive layer are connected via the through hole conductors in a crank form from the first surface to second surface of the substrate.

Abstract translation: 天线装置具有基板，其具有在第一面的相反侧的第一表面和第二表面，形成在基板的第一表面上的第一表面侧导电层，形成在基板的第一表面上的第二表面侧导电层 基板的第二表面和连接第一表面侧导电层和第二表面侧导电层的通孔导体。 第一表面侧导电层和第二表面侧导电层形成为使得第一表面侧导电层和第二表面侧导电层经由通孔导体以曲柄形式从 衬底的第一表面到第二表面。

公开(公告)号：US20120186867A1

公开(公告)日：2012-07-26

申请号：US13432471

申请日：2012-03-28

Applicant: Motoo ASAI ,  Dongdong Wang ,  Takahiro Mori

Inventor： Motoo ASAI ,  Dongdong Wang ,  Takahiro Mori

IPC: H05K1/11

CPC classification number: H05K3/423 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K1/036 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/181 ,  H05K3/381 ,  H05K3/385 ,  H05K3/387 ,  H05K3/388 ,  H05K3/426 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2203/0315 ,  H05K2203/0733 ,  H05K2203/0773 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599

Abstract: A multi-layer printed circuit board including a first insulating layer, a first conductor layer having circuits on one surface of the first insulating layer, a second conductor layer having circuits on the opposite surface of the first insulating layer, a second insulating layer on the second conductor and first insulating layers, and a third conductor layer having circuits on the second insulating layer on the opposite side of the second conductor layer. The first and second insulating layers have first and second via holes formed in openings of the first and second insulating layers and made of conductive materials filling the openings such that circuits in the first and third conductor layers are connected to one or more circuits in the second conductor layer, and the first and second via holes have bottom ends facing the second conductor layer and top ends larger than the bottom ends.

Abstract translation: 一种多层印刷电路板，包括第一绝缘层，在第一绝缘层的一个表面上具有电路的第一导体层，在第一绝缘层的相对表面上具有电路的第二导体层，第二绝缘层， 第二导体和第一绝缘层，以及在第二导体层的相对侧的第二绝缘层上具有电路的第三导体层。 第一和第二绝缘层具有形成在第一和第二绝缘层的开口中的第一和第二通孔，并由填充开口的导电材料制成，使得第一和第三导体层中的电路连接到第二和第二绝缘层中的一个或多个电路 导体层，第一和第二通孔具有面向第二导体层的底端，并且顶端大于底端。

公开(公告)号：US08186045B2

公开(公告)日：2012-05-29

申请号：US12103414

申请日：2008-04-15

Applicant: Hajime Sakamoto ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

Inventor： Hajime Sakamoto ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

IPC: H05K3/30 ,  H05K3/36 ,  H05K3/20 ,  H05K1/16 ,  H05K1/11 ,  H05K7/10 ,  H05K7/12 ,  H05K1/14

CPC classification number: H01L24/29 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/83 ,  H01L25/03 ,  H01L25/18 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/5448 ,  H01L2223/54486 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/18162 ,  H01L2924/30107 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09918 ,  H05K2201/10674 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00

Abstract: A method of manufacturing a multilayer printed circuit board, including providing a substrate, embedding an electronic component having a die pad on a surface of the component into the substrate such that the component has the surface and pad exposed from a surface of the substrate, forming a metallic layer including metallic film layers such that the surface of the substrate and the pad and surface of the component are covered with the metallic layer, providing a resist on the metallic layer such that a portion of the metallic layer on the pad is exposed from the resist, forming a thickening metallic layer on the portion of the metallic layer exposed, removing the resist from the substrate and surface of the component, and etching to remove the metallic layer such that a mediate layer including the portion of the metallic layer is formed between the pad and the thickening layer.

Abstract translation: 一种制造多层印刷电路板的方法，包括提供基板，将具有管芯焊盘的电子部件嵌入到所述基板的表面上，使得所述部件具有从所述基板的表面暴露的所述表面和焊盘，形成 包括金属膜层的金属层，使得基板的表面和部件的表面和部件的表面被金属层覆盖，在金属层上提供抗蚀剂，使得焊盘上的金属层的一部分从 所述抗蚀剂在所述金属层的暴露部分上形成增厚金属层，从所述基板和所述部件的表面除去所述抗蚀剂，并蚀刻去除所述金属层，从而形成包含所述金属层的所述部分的介质层 在垫和增厚层之间。

公开(公告)号：US08093507B2

公开(公告)日：2012-01-10

申请号：US12420469

申请日：2009-04-08

Applicant: Honchin En ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

Inventor： Honchin En ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

IPC: H05K1/11

CPC classification number: C23G1/10 ,  H01L2924/0002 ,  H05K3/0094 ,  H05K3/062 ,  H05K3/067 ,  H05K3/108 ,  H05K3/384 ,  H05K3/385 ,  H05K3/388 ,  H05K3/4602 ,  H05K3/4644 ,  H05K3/4661 ,  H05K2201/0129 ,  H05K2201/0158 ,  H05K2201/0338 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0307 ,  H05K2203/0315 ,  H05K2203/072 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T428/24917 ,  H01L2924/00

Abstract: A multilayer printed circuit board including a substrate board having a lower conductor circuit, a resin insulating layer formed over the substrate board and lower conductor circuit, and a conductor circuit formed over the resin insulating layer. The resin insulating layer has a via hole filled up with plating and is formed of a linear polyolefin resin formed by hot-pressing a film shaped resin.

Abstract translation: 一种多层印刷电路板，包括具有下导体电路的基板，形成在基板和下导体电路上的树脂绝缘层，以及形成在树脂绝缘层上的导体电路。 树脂绝缘层具有填充有电镀的通孔，并且通过热压薄膜状树脂形成的线性聚烯烃树脂形成。

公开(公告)号：US20120000068A1

公开(公告)日：2012-01-05

申请号：US13234721

申请日：2011-09-16

Applicant: Hajime SAKAMOTO ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

Inventor： Hajime SAKAMOTO ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

IPC: H01K3/10

CPC classification number: H01L24/29 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/83 ,  H01L25/03 ,  H01L25/18 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/5448 ,  H01L2223/54486 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/18162 ,  H01L2924/30107 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09918 ,  H05K2201/10674 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00

Abstract: A method for manufacturing a printed circuit board, including providing a core substrate having an electronic component accommodated in the core substrate; forming a positioning mark on the core substrate; forming an interlayer insulating layer over the core substrate, the positioning mark and the electronic component; forming a via hole opening connecting to the electronic component through the interlayer insulating layer in accordance with the positioning mark on the core substrate; and forming a via hole structure in the via hole opening in the interlayer insulating layer such that the via hole structure is electrically connected to the electronic component.

Abstract translation: 一种印刷电路板的制造方法，其特征在于，提供具有容纳在所述芯基板中的电子部件的芯基板， 在芯基板上形成定位标记; 在芯基板，定位标记和电子部件之上形成层间绝缘层; 根据芯基板上的定位标记，通过层间绝缘层形成连接到电子部件的通孔开口; 以及在所述层间绝缘层的通孔开口中形成通孔结构，使得所述通孔结构电连接到所述电子部件。

公开(公告)号：US08067699B2

公开(公告)日：2011-11-29

申请号：US12034069

申请日：2008-02-20

Applicant: Hajime Sakamoto ,  Dongdong Wang

Inventor： Hajime Sakamoto ,  Dongdong Wang

IPC: H05K1/16

CPC classification number: H01L23/49838 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49866 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/27 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/1147 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/24137 ,  H01L2224/24227 ,  H01L2224/274 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/30107 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49139 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/03

Abstract: An intermediate layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and a sealing resin. Also, by providing the intermediate layer 38 made of copper on an aluminum pad 24, it is possible to prevent a resin residue on the pad 24 and to improve connection characteristics between the die pad 24 and a via hole 60 and reliability.

Abstract translation: 中间层38设置在IC芯片20的芯片焊盘22上并集成到多层印刷电路板10中。由此，可以将IC芯片20电连接到多层印刷电路板10而不使用引线 构件和密封树脂。 此外，通过在铝焊盘24上设置由铜制成的中间层38，可以防止焊盘24上的树脂残留，并且改善管芯焊盘24和通孔60之间的连接特性以及可靠性。

公开(公告)号：US08046914B2

公开(公告)日：2011-11-01

申请号：US12572000

申请日：2009-10-01

Applicant: Hajime Sakamoto ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

Inventor： Hajime Sakamoto ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

IPC: H01K3/10

CPC classification number: H01L24/29 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/83 ,  H01L25/03 ,  H01L25/18 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/5448 ,  H01L2223/54486 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/18162 ,  H01L2924/30107 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09918 ,  H05K2201/10674 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00

Abstract: A method of manufacturing a multilayer printed circuit board having interlayer insulating layers and conductor layers repeatedly formed on a substrate, via holes formed in the interlayer insulating layers, and establishing electrical connection through the via holes, including containing an electronic component in said substrate, removing a film on a surface of a die pad of said electronic component, forming a mediate layer to be connected to a via hole of a lowermost interlayer insulating layer, on said die pad, forming the interlayer insulating layers on said substrate, and forming the via holes connected to the conductor circuits and the mediate layers, in said interlayer resin insulating layers.

Abstract translation: 一种制造多层印刷电路板的方法，所述多层印刷电路板具有层间绝缘层和重复形成在基板上的导体层，所述多层印刷电路板通过形成在所述层间绝缘层中的孔，并且通过所述通孔建立电连接，所述电连接包括在所述基板中包含电子部件， 在所述电子部件的芯片焊盘的表面上形成薄膜，在所述芯片焊盘上形成与最下层绝缘层的通路孔连接的中间层，在所述基板上形成层间绝缘层， 在所述层间树脂绝缘层中连接到导体电路和中间层的孔。

公开(公告)号：US08030577B2

公开(公告)日：2011-10-04

申请号：US12146105

申请日：2008-06-25

Applicant: Honchin En ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

Inventor： Honchin En ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

IPC: H05K1/09

CPC classification number: C23G1/10 ,  H01L2924/0002 ,  H05K3/0094 ,  H05K3/062 ,  H05K3/067 ,  H05K3/108 ,  H05K3/384 ,  H05K3/385 ,  H05K3/388 ,  H05K3/4602 ,  H05K3/4644 ,  H05K3/4661 ,  H05K2201/0129 ,  H05K2201/0158 ,  H05K2201/0338 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0307 ,  H05K2203/0315 ,  H05K2203/072 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T428/24917 ,  H01L2924/00

Abstract: The present invention has for its object to provide a multilayer printed circuit board which is very satisfactory in facture toughness, dielectric constant, adhesion and processability, among other characteristics. The present invention is directed to a multilayer printed circuit board comprising a substrate board, a resin insulating layer formed on said board and a conductor circuit constructed on said resin insulating layer, wherein said resin insulating layer comprises a polyolefin resin.

Abstract translation: 本发明的目的在于提供一种多层印刷电路板，其特征在于其具有非常好的韧性，介电常数，粘合性和可加工性。 本发明涉及一种多层印刷电路板，其包括基板，形成在所述基板上的树脂绝缘层和在所述树脂绝缘层上构成的导体电路，其中所述树脂绝缘层包括聚烯烃树脂。

公开(公告)号：US08020291B2

公开(公告)日：2011-09-20

申请号：US12146165

申请日：2008-06-25

Applicant: Honchin En ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

Inventor： Honchin En ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

IPC: H05K3/02 ,  H05K3/10

CPC classification number: C23G1/10 ,  H01L2924/0002 ,  H05K3/0094 ,  H05K3/062 ,  H05K3/067 ,  H05K3/108 ,  H05K3/384 ,  H05K3/385 ,  H05K3/388 ,  H05K3/4602 ,  H05K3/4644 ,  H05K3/4661 ,  H05K2201/0129 ,  H05K2201/0158 ,  H05K2201/0338 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0307 ,  H05K2203/0315 ,  H05K2203/072 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T428/24917 ,  H01L2924/00

Abstract: The present invention has for its object to provide a multilayer printed circuit board which is very satisfactory in facture toughness, dielectric constant, adhesion and processability, among other characteristics. The present invention is directed to a multilayer printed circuit board comprising a substrate board, a resin insulating layer formed on said board and a conductor circuit constructed on said resin insulating layer, wherein said resin insulating layer comprises a polyolefin resin.

Abstract translation: 本发明的目的在于提供一种多层印刷电路板，其特征在于其具有非常好的韧性，介电常数，粘合性和可加工性。 本发明涉及一种多层印刷电路板，其包括基板，形成在所述基板上的树脂绝缘层和在所述树脂绝缘层上构成的导体电路，其中所述树脂绝缘层包括聚烯烃树脂。