Method for electromechanical fabrication
    77.
    发明授权
    Method for electromechanical fabrication 有权
    机电制造方法

    公开(公告)号:US08551315B2

    公开(公告)日:2013-10-08

    申请号:US13441573

    申请日:2012-04-06

    Applicant: Adam L. Cohen

    Inventor: Adam L. Cohen

    Abstract: An electroplating method that includes: a) contacting a first substrate with a first article, which includes a substrate and a conformable mask disposed in a pattern on the substrate; b) electroplating a first metal from a source of metal ions onto the first substrate in a first pattern, the first pattern corresponding to the complement of the conformable mask pattern; and c) removing the first article from the first substrate, is disclosed. Electroplating articles and electroplating apparatus are also disclosed.

    Abstract translation: 一种电镀方法,包括:a)使第一衬底与第一制品接触,所述第一制品包括衬底和以衬底形式设置的贴合掩模; b)以第一图案将来自金属离子源的第一金属电镀到所述第一基板上,所述第一图案对应于所述适形掩模图案的所述补体; 和c)从第一基板上去除第一制品。 还公开了电镀制品和电镀装置。

    Method for producing implant structures for contacting or electrostimulation of living tissue cells or nerves
    78.
    发明授权
    Method for producing implant structures for contacting or electrostimulation of living tissue cells or nerves 有权
    用于生产用于接触或电刺激活组织细胞或神经的植入物结构的方法

    公开(公告)号:US08423153B2

    公开(公告)日:2013-04-16

    申请号:US12296519

    申请日:2007-01-26

    Abstract: The object, to create a method for producing multilayers or multilayer systems wherein the structures generated on a substrate can easily be jointly detached from the substrate and are preserved in a composite, is achieved by the present invention by means of a method for producing implant structures comprising generating a first metal layer on a substrate, generating a second metal layer above the first metal layer, producing a number of multilayered implant structures above the second metal layer, removing the first metal layer between the substrate and the second metal layer, and releasing the implant structures from the substrate in a coherent composite. With the method according to the invention, between the implant structures and the substrate a release layer is generated consisting of two or three metal layers which serve as sacrificial layer in the course of releasing the fully processed multilayers by means of an under-etching process. As a result, a uniform and reliable separation of the finished multilayers from the substrate in a composite is achieved, facilitating the subsequent technology for assembly and interconnection of the implant structures.

    Abstract translation: 本发明的目的是为了产生多层或多层体系的制造方法,其中在衬底上产生的结构可以容易地与衬底共同分离并且被保存在复合材料中,这通过本发明通过生产植入结构的方法来实现 包括在衬底上产生第一金属层,在第一金属层上方产生第二金属层,在第二金属层之上产生多个多层植入结构,去除衬底和第二金属层之间的第一金属层,并释放 在相干复合材料中来自基底的植入物结构。 利用根据本发明的方法,在植入结构和衬底之间,产生剥离层,其由在蚀刻过程中释放完全处理的多层膜的过程中用作牺牲层的两个或三个金属层组成。 结果,实现了在复合材料中完成的多层与基底的均匀可靠的分离,有助于随后的用于植入结构的组装和互连的技术。

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    79.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 失效
    制造半导体器件的方法

    公开(公告)号:US20120329253A1

    公开(公告)日:2012-12-27

    申请号:US13582134

    申请日:2011-02-23

    Applicant: Makoto Koto

    Inventor: Makoto Koto

    Abstract: The present invention relates to a method of manufacturing a semiconductor device by which the length of nanowires perpendicularly formed can be fabricated with high reproducibility. The method of manufacturing a semiconductor device includes the steps of forming a first layer; forming a stop layer on the first layer, the stop layer having a higher Young's modulus than the first layer; forming a recess by partially removing the first layer and the stop layer; growing nanowires in the recess; forming a planarizing layer; removing the planarizing layer to the level of the stop layer to expose the nanowires from the surface of the planarizing layer; and forming an electrode so as to be in contact with the upper ends of the nanowires.

    Abstract translation: 本发明涉及一种制造半导体器件的方法,通过该方法可以以高再现性制造垂直形成的纳米线的长度。 制造半导体器件的方法包括形成第一层的步骤; 在所述第一层上形成停止层,所述停止层具有比所述第一层更高的杨氏模量; 通过部分去除第一层和止挡层形成凹部; 在凹槽中生长纳米线; 形成平坦化层; 将所述平坦化层去除到所述停止层的水平面以从所述平坦化层的表面露出所述纳米线; 并形成与纳米线的上端接触的电极。

    Selective UV-Ozone dry etching of anti-stiction coatings for MEMS device fabrication
    80.
    发明授权
    Selective UV-Ozone dry etching of anti-stiction coatings for MEMS device fabrication 有权
    用于MEMS器件制造的抗静电涂层的选择性UV-臭氧干法蚀刻

    公开(公告)号:US08237296B2

    公开(公告)日:2012-08-07

    申请号:US12796162

    申请日:2010-06-08

    Applicant: Mehmet Hancer

    Inventor: Mehmet Hancer

    Abstract: Organic anti-stiction coatings such as, for example, hydrocarbon and fluorocarbon based self-assembled organosilanes and siloxanes applied either in solvent or via chemical vapor deposition, are selectively etched using a UV-Ozone (UVO) dry etching technique in which the portions of the organic anti-stiction coating to be etched are exposed simultaneously to multiple wavelengths of ultraviolet light that excite and dissociate organic molecules from the anti-stiction coating and generate atomic oxygen from molecular oxygen and ozone so that the organic molecules react with atomic oxygen to form volatile products that are dissipated, resulting in removal of the exposed portions of the anti-stiction coating. A hybrid etching process using heat followed by UVO exposure may be used. A shadow mask (e.g., of glass or quartz), a protective material layer, or other mechanism may be used to selective expose the portions of the anti-stiction coating to be UVO etched. Such selective UVO etching may be used, for example, to expose wafer bond lines prior to wafer-to-wafer bonding in order to increase bond shear and adhesion strength, to expose bond pads in preparation for electrical or other connections, or for general removal of anti-stiction coating materials from metal or other material surfaces. One specific embodiment uses two wavelengths of ultraviolet light, one at around 184.9 nm and the other at around 253.7 nm.

    Abstract translation: 使用UV-臭氧(UVO)干蚀刻技术选择性地蚀刻有机抗静电涂层,例如在溶剂中或通过化学气相沉积施加的烃和氟碳基自组装有机硅烷和硅氧烷,其中部分 待蚀刻的有机抗静电涂层同时暴露于多个波长的紫外线,其激发和解离有机分子与抗静电涂层,并从分子氧和臭氧产生原子氧,使得有机分子与原子氧反应形成 挥发的产物被消散,导致去除抗静电涂层的暴露部分。 可以使用使用热量然后UVO曝光的混合蚀刻工艺。 可以使用荫罩(例如,玻璃或石英),保护材料层或其它机构来选择性地将抗静电涂层的部分暴露于UVO蚀刻。 可以使用这种选择性UVO蚀刻,例如在晶片到晶片接合之前暴露晶片接合线,以增加键合剪切和粘附强度,以暴露接合焊盘以准备电气或其它连接,或用于一般去除 的抗静电涂层材料从金属或其他材料表面。 一个具体实施方案使用两个波长的紫外光,一个在约184.9nm,另一个在约253.7nm。

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