公开(公告)号：US20150321901A1

公开(公告)日：2015-11-12

申请号：US14798112

申请日：2015-07-13

Applicant: Infineon Technologies AG

Inventor： Alfons Dehe ,  Carsten Ahrens ,  Stefan Barzen ,  Wolfgang Friza

IPC: B81B3/00

CPC classification number: B81B3/0072 ,  B81B3/001 ,  B81B3/0027 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C1/00182 ,  B81C1/00404 ,  B81C1/00984 ,  B81C2201/017 ,  B81C2201/115

Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a sacrificial layer over a first surface of a workpiece having the first surface and an opposite second surface. A membrane is formed over the sacrificial layer. A through hole is etched through the workpiece from the second surface to expose a surface of the sacrificial layer. At least a portion of the sacrificial layer is removed from the second surface to form a cavity under the membrane. The cavity is aligned with the membrane.

Abstract translation: 根据本发明的实施例，形成半导体器件的方法包括在具有第一表面和相对的第二表面的工件的第一表面上形成牺牲层。 在牺牲层上形成膜。 从第二表面通过工件蚀刻通孔以暴露牺牲层的表面。 牺牲层的至少一部分从第二表面移除以在膜下形成空腔。 空腔与膜对准。

公开(公告)号：US09136165B2

公开(公告)日：2015-09-15

申请号：US13909842

申请日：2013-06-04

Applicant: Invensense, Inc.

Inventor： Cerina Zhang ,  Nim Tea

IPC: H01L21/768 ,  H01L23/48

CPC classification number: B81C1/00984 ,  B81B3/0008 ,  B81B2207/015 ,  B81C1/00976 ,  B81C2201/115 ,  H01L21/76838 ,  H01L23/48 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of the invention includes reducing stiction of a MEMS device by providing a conductive path for electric charge collected on a bump stop formed on a substrate. The bump stop is formed by depositing and patterning a dielectric material on the substrate, and the conductive path is provided by a conductive layer deposited on the bump stop. The conductive layer can also be roughened to reduce stiction.

Abstract translation: 本发明的一种方法包括通过为形成在衬底上的凸点块上收集的电荷提供导电路径来减少MEMS器件的静电。 通过在衬底上沉积和图案化介电材料形成凹凸块，并且通过沉积在凸块上的导电层提供导电路径。 导电层也可以被粗糙化以减少粘性。

公开(公告)号：US20140264651A1

公开(公告)日：2014-09-18

申请号：US13804934

申请日：2013-03-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Alfons Dehe ,  Carsten Ahrens ,  Stefan Barzen ,  Wolfgang Friza

IPC: B81C1/00 ,  B81B3/00

CPC classification number: B81B3/0072 ,  B81B3/001 ,  B81B3/0027 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C1/00182 ,  B81C1/00404 ,  B81C1/00984 ,  B81C2201/017 ,  B81C2201/115

Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a sacrificial layer over a first surface of a workpiece having the first surface and an opposite second surface. A membrane is formed over the sacrificial layer. A through hole is etched through the workpiece from the second surface to expose a surface of the sacrificial layer. At least a portion of the sacrificial layer is removed from the second surface to form a cavity under the membrane. The cavity is aligned with the membrane.

Abstract translation: 根据本发明的实施例，形成半导体器件的方法包括在具有第一表面和相对的第二表面的工件的第一表面上形成牺牲层。 在牺牲层上形成膜。 从第二表面通过工件蚀刻通孔以暴露牺牲层的表面。 牺牲层的至少一部分从第二表面移除以在膜下形成空腔。 空腔与膜对准。

公开(公告)号：US08358458B2

公开(公告)日：2013-01-22

申请号：US12939909

申请日：2010-11-04

Applicant: James Randolph Webster ,  Thanh Nghia Tu ,  Xiaoming Yan ,  Wonsuk Chung

Inventor： James Randolph Webster ,  Thanh Nghia Tu ,  Xiaoming Yan ,  Wonsuk Chung

IPC: G02B26/00

CPC classification number: B81B3/0008 ,  B81B2201/042 ,  B81C2201/0107 ,  B81C2201/0109 ,  B81C2201/115 ,  G02B26/001 ,  Y10T428/24917

Abstract: Methods of fabricating an electromechanical systems device that mitigate permanent adhesion, or stiction, of the moveable components of the device are provided. The methods provide an amorphous silicon sacrificial layer with improved and reproducible surface roughness. The amorphous silicon sacrificial layers further exhibit excellent adhesion to common materials used in electromechanical systems devices.

Abstract translation: 提供了减轻设备的可移动部件的永久性粘附或静电的机电系统装置的制造方法。 该方法提供了具有改进和可再现的表面粗糙度的非晶硅牺牲层。 非晶硅牺牲层对于机电系统器件中常用的材料进一步表现出优异的附着性。

公开(公告)号：US08253243B2

公开(公告)日：2012-08-28

申请号：US13179175

申请日：2011-07-08

Applicant: Robin Wilson

Inventor： Robin Wilson

IPC: H01L23/34 ,  H01L21/00

CPC classification number: H01L29/34 ,  B81C1/00952 ,  B81C2201/115 ,  H01L21/76251

Abstract: A method of manufacturing a semiconductor device includes providing first and second semiconductor substrates, each having first and second main surfaces opposite to one another. A roughened surface is formed on at least one of the first main surface of the first semiconductor substrate and the second main surface of the second semiconductor substrate. A dielectric layer is formed on the first main surface of the semiconductor substrate and the second semiconductor substrate is disposed on the dielectric layer opposite to the first semiconductor substrate. The second main surface of the second semiconductor substrate contacts the dielectric layer.

Abstract translation: 一种制造半导体器件的方法包括提供第一和第二半导体衬底，每个具有彼此相对的第一和第二主表面。 粗糙表面形成在第一半导体衬底的第一主表面和第二半导体衬底的第二主表面中的至少一个上。 电介质层形成在半导体衬底的第一主表面上，第二半导体衬底设置在与第一半导体衬底相对的电介质层上。 第二半导体衬底的第二主表面接触电介质层。

公开(公告)号：US20110260265A1

公开(公告)日：2011-10-27

申请号：US13179175

申请日：2011-07-08

Applicant: Robin Wilson

Inventor： Robin Wilson

IPC: H01L29/66

CPC classification number: H01L29/34 ,  B81C1/00952 ,  B81C2201/115 ,  H01L21/76251

Abstract: A method of manufacturing a semiconductor device includes providing first and second semiconductor substrates, each having first and second main surfaces opposite to one another. A roughened surface is formed on at least one of the first main surface of the first semiconductor substrate and the second main surface of the second semiconductor substrate. A dielectric layer is formed on the first main surface of the semiconductor substrate and the second semiconductor substrate is disposed on the dielectric layer opposite to the first semiconductor substrate. The second main surface of the second semiconductor substrate contacts the dielectric layer.

Abstract translation: 一种制造半导体器件的方法包括提供第一和第二半导体衬底，每个具有彼此相对的第一和第二主表面。 粗糙表面形成在第一半导体衬底的第一主表面和第二半导体衬底的第二主表面中的至少一个上。 电介质层形成在半导体衬底的第一主表面上，第二半导体衬底设置在与第一半导体衬底相对的电介质层上。 第二半导体衬底的第二主表面接触电介质层。

公开(公告)号：US20110063712A1

公开(公告)日：2011-03-17

申请号：US12562093

申请日：2009-09-17

Applicant: Manish Kothari ,  Sauri Gudlavalleti ,  Stephen Zee

Inventor： Manish Kothari ,  Sauri Gudlavalleti ,  Stephen Zee

IPC: G02B26/00

CPC classification number: B81B3/0008 ,  B81B2201/042 ,  B81C2201/112 ,  B81C2201/115 ,  G02B26/001 ,  G02B26/0841

Abstract: In certain embodiments, a device is provided including a substrate and a plurality of supports over the substrate. The device may further include a mechanical layer having a movable portion and a stationary portion. The stationary portion may disposed over the supports. In certain embodiments, the device further includes a reflective surface positioned over the substrate and mechanically coupled to the movable portion. The device of certain embodiments further includes at least one movable stop element displaced from and mechanically coupled to the movable portion. In certain embodiments, the at least a portion of the stop element may be positioned over the stationary portion.

Abstract translation: 在某些实施例中，提供了一种包括衬底和在衬底上的多个支撑体的装置。 该装置还可以包括具有可移动部分和固定部分的机械层。 固定部分可以设置在支撑件上方。 在某些实施例中，所述装置还包括位于所述基板上并且机械地联接到所述可移动部分的反射表面。 某些实施例的装置还包括至少一个可动止动元件，该可移动止动元件从可移动部分移动并机械联接到可动部分。 在某些实施例中，止动元件的至少一部分可以定位在固定部分上方。

公开(公告)号：US07807548B2

公开(公告)日：2010-10-05

申请号：US11827715

申请日：2007-07-13

Applicant: Bernard Aspar ,  Chrystelle Lagahe Blanchard ,  Nicolas Sousbie

Inventor： Bernard Aspar ,  Chrystelle Lagahe Blanchard ,  Nicolas Sousbie

IPC: H01L21/30

CPC classification number: B81B3/001 ,  B81C1/00952 ,  B81C2201/115

Abstract: The invention provides a method for forming a semiconductor component with a rough buried interface. The method includes providing a first semiconductor substrate having a first surface of roughness R1. The method further includes thermally oxidizing the first surface of the first semiconductor substrate to form an oxide layer defining an external oxide surface on the first semiconductor substrate and a buried oxide-semiconductor interface below the oxide surface, so that the buried oxide surface has a roughness R2 that is less than R1. The method also includes assembling the oxide surface of the first semiconductor substrate with a second substrate. The invention also provides a component formed according to the method of the invention.

Abstract translation: 本发明提供一种用于形成具有粗糙掩埋界面的半导体部件的方法。 该方法包括提供具有粗糙度R1的第一表面的第一半导体衬底。 该方法还包括热氧化第一半导体衬底的第一表面以形成限定第一半导体衬底上的外部氧化物表面的氧化物层和氧化物表面下方的掩埋氧化物半导体界面，使得掩埋氧化物表面具有粗糙度 R2小于R1。 该方法还包括用第二衬底组装第一半导体衬底的氧化物表面。 本发明还提供了根据本发明的方法形成的部件。

公开(公告)号：US20100065946A1

公开(公告)日：2010-03-18

申请号：US12413972

申请日：2009-03-30

Applicant: Robin Wilson

Inventor： Robin Wilson

IPC: H01L29/30 ,  H01L21/30

CPC classification number: H01L29/34 ,  B81C1/00952 ,  B81C2201/115 ,  H01L21/76251

Abstract: A method of manufacturing a semiconductor device includes providing first and second semiconductor substrates, each having first and second main surfaces opposite to one another. A roughened surface is formed on at least one of the first main surface of the first semiconductor substrate and the second main surface of the second semiconductor substrate. A dielectric layer is formed on the first main surface of the semiconductor substrate and the second semiconductor substrate is disposed on the dielectric layer opposite to the first semiconductor substrate. The second main surface of the second semiconductor substrate contacts the dielectric layer.

Abstract translation: 一种制造半导体器件的方法包括提供第一和第二半导体衬底，每个具有彼此相对的第一和第二主表面。 粗糙表面形成在第一半导体衬底的第一主表面和第二半导体衬底的第二主表面中的至少一个上。 电介质层形成在半导体衬底的第一主表面上，第二半导体衬底设置在与第一半导体衬底相对的电介质层上。 第二半导体衬底的第二主表面接触电介质层。

公开(公告)号：US07440254B2

公开(公告)日：2008-10-21

申请号：US10518737

申请日：2003-06-09

Applicant: Andrew James Gallant

Inventor： Andrew James Gallant

IPC: H01G7/00

CPC classification number: B81B3/0008 ,  B81C2201/115 ,  H01G4/2325 ,  H01G5/18

Abstract: A micro-electromechanical variable capacitor with first and second capacitor plates spaced apart to define a gap therebetween. The first plate has two control electrodes and an active electrode. The second plate is movable relative to first plate when a voltage is applied to produce a potential difference across the control electrode and the second capacitor plate. This has the effect of varying the capacitance of the capacitor. The facing surface of at least one of the plates is formed in such a way that it has a roughened surface. The degree of roughness is sufficient to prevent the facing surfaces adhering together through stiction.

Abstract translation: 一个微机电可变电容器，其具有间隔开的第一和第二电容器板，以在它们之间形成间隙。 第一板具有两个控制电极和一个有源电极。 当施加电压以产生跨越控制电极和第二电容器板的电位差时，第二板可相对于第一板移动。 这具有改变电容器的电容的效果。 至少一个板的面对表面形成为具有粗糙表面。 粗糙度足以防止面对表面通过粘性粘附在一起。