公开(公告)号：US20140327006A1

公开(公告)日：2014-11-06

申请号：US14042869

申请日：2013-10-01

Applicant: AU Optronics Corporation

Inventor： Tsung-Ying KE

IPC: H01L21/78 ,  H01L33/02 ,  H01L29/12 ,  H01L29/04

CPC classification number: H01L51/0097 ,  H01L21/78 ,  H01L21/7813 ,  H01L27/1266 ,  H01L27/3246 ,  H01L29/04 ,  H01L29/12 ,  H01L33/02 ,  H01L51/003 ,  H01L51/5237 ,  H01L51/5253 ,  H01L2251/5338 ,  H05K1/028 ,  H05K1/0353 ,  H05K1/181 ,  H05K2201/032 ,  Y02E10/549 ,  Y02P70/521

Abstract: An active device substrate includes a flexible substrate, an inorganic de-bonding layer, and at least one active device. The flexible substrate has a first surface and a second surface opposite to the first surface, wherein the first surface is a flat surface. The inorganic de-bonding layer covers the first surface of the flexible substrate, and the material of the inorganic de-bonding layer is metal, metal oxide or combination thereof. The active device is disposed on or above the second surface of the flexible substrate.

Abstract translation: 有源器件衬底包括柔性衬底，无机去结合层和至少一个有源器件。 柔性基板具有与第一表面相对的第一表面和第二表面，其中第一表面是平坦表面。 无机去结合层覆盖柔性基板的第一表面，无机去结合层的材料是金属，金属氧化物或其组合。 有源器件设置在柔性衬底的第二表面上或上方。

公开(公告)号：US20140299365A1

公开(公告)日：2014-10-09

申请号：US14240815

申请日：2012-09-27

Applicant: 3M INNOVATIVE PROPERTIES COMPANY

Inventor： Muthu Sebastian ,  Dominic M. Travasso ,  Nancy S. Lennhoff ,  Steven T. Swartz

IPC: H05K1/02 ,  H05K3/06

CPC classification number: H05K1/0274 ,  G06F3/044 ,  H05K1/09 ,  H05K3/06 ,  H05K2201/0302 ,  H05K2201/032

Abstract: An article includes a multilayer structure, such as, e.g., a touch sensor, having two opposing sides and comprising a central polymeric UV transparent substrate, a transparent conductive layer on each of the two major opposing surfaces of the polymeric substrate, a metallic conductive layer on each transparent conductive layer, and a patterned photoimaging mask on each metallic conductive layer.

Abstract translation: 一种物品包括多层结构，例如触摸传感器，具有两个相对的侧面并且包括中心聚合物UV透明基板，在聚合物基板的两个主要相对表面的每一个上的透明导电层，金属导电层 在每个透明导电层上，以及每个金属导电层上的图案化成像掩模。

公开(公告)号：US20140224530A1

公开(公告)日：2014-08-14

申请号：US14257306

申请日：2014-04-21

Applicant: E I DU PONT DE NEMOURS AND COMPANY

Inventor： KUMARAN MANIKANTAN NAIR ,  Scott E. GORDON ,  Mark Frederick MCCOMBS

IPC: H05K1/09 ,  H05K1/11 ,  H05K3/00

CPC classification number: H05K3/0094 ,  H01B1/22 ,  H05K1/09 ,  H05K1/092 ,  H05K1/095 ,  H05K1/115 ,  H05K3/4061 ,  H05K2201/032 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2203/1126

Abstract: A composition for forming transition vias and transition line conductors is disclosed for minimizing interface effects at electrical connections between dissimilar metal compositions. The composition has (a) inorganic components selected from the group consisting of (i) 20-45 wt % gold and 80-55 wt % silver and (ii) 100 wt % silver-gold solid solution alloys, and (b) an organic medium. The composition may also contain (c) 1-5 wt %, based upon the weight of the composition, of oxides or mixed oxides of metals selected from the group consisting of Cu, Co, Mg and Al and/or high viscosity glasses mainly containing refractory oxides. The composition may be used as a multi-layer composition in a via fill. Multi-layer circuits such as LTCC circuits and devices may also be formed using the composition for forming transition vias and transition line conductors.

Abstract translation: 公开了一种用于形成过渡通孔和过渡管线导体的组合物，用于最小化异种金属组合物之间电连接处的界面效应。 该组合物具有（a）选自（i）20-45wt％金和80-55wt％银和（ii）100wt％银 - 金固溶体合金的无机成分，和（b）有机 中。 该组合物还可以含有（c）基于组合物重量的1-5重量％的选自Cu，Co，Mg和Al的金属的氧化物或混合氧化物和/或主要含有 难熔氧化物。 组合物可以用作通孔填充物中的多层组合物。 也可以使用用于形成过渡通孔和过渡管线导体的组合物来形成诸如LTCC电路和器件的多层电路。

公开(公告)号：US20240352287A1

公开(公告)日：2024-10-24

申请号：US18683425

申请日：2022-08-10

Applicant: Resonac Corporation

Inventor： Masashi OHKOSHI ,  Nozomu TAKANO ,  Kunihiko AKAI ,  Hiroyuki IZAWA ,  Yuka ITOH ,  Shunsuke TAKAGI

IPC: C09J9/02 ,  C09J179/08 ,  H05K1/11 ,  H05K3/46

CPC classification number: C09J9/02 ,  C09J179/08 ,  H05K1/113 ,  H05K3/46 ,  H05K2201/032 ,  H05K2201/0338 ,  H05K2203/0278 ,  H05K2203/1105

Abstract: A curable adhesive composition used for bonding a wiring member constituting a multilayered wiring board, in which the curable adhesive composition satisfies all the following conditions (A) and (B) when a thermal expansion coefficient and a glass transition temperature of a cured product are designated as CTE0 (ppm/° C.) and Tg0 (° C.), respectively:







(
A
)

⁢

5

≤

CTE
0

≤
270

⁢





(
B
)

⁢

140

≤

Tg
0

≤
280

公开(公告)号：US12089342B2

公开(公告)日：2024-09-10

申请号：US17793721

申请日：2021-03-16

Applicant: MITSUBISHI MATERIALS CORPORATION

Inventor： Akira Sakurai ,  Nobuyuki Terasaki

IPC: H05K1/02 ,  H05K3/00

CPC classification number: H05K3/0061 ,  H05K1/0204 ,  H05K2201/032 ,  H05K2203/1194

Abstract: In an insulating circuit substrate, aluminum sheets formed of aluminum or an aluminum alloy are laminated and bonded to a surface of a ceramic substrate and, in the aluminum sheets, Cu is solid-solubilized at a bonding interface with the ceramic substrate and a ratio B/A between a Cu concentration A mass % at the bonding interface and a Cu concentration B mass % at a position of 100 μm in a thickness direction from the bonding interface to the aluminum sheets side is 0.30 or more and 0.85 or less.

公开(公告)号：US20240260184A1

公开(公告)日：2024-08-01

申请号：US18560741

申请日：2022-06-24

Applicant: LG INNOTEK CO., LTD.

Inventor： Seung Hyeong LEE ,  Dong Joon KIM

IPC: H05K1/11 ,  H05K1/18 ,  H05K3/34

CPC classification number: H05K1/11 ,  H05K1/181 ,  H05K3/341 ,  H05K2201/032

Abstract: The printed circuit board module comprises: a printed circuit board including a first area and a second area; an electronic component disposed in the first area; and a partition line disposed between the first area and the second area, wherein the partition line is disposed to be stepped with respect to a surface of the printed circuit board.

公开(公告)号：US20230337353A1

公开(公告)日：2023-10-19

申请号：US17720685

申请日：2022-04-14

Applicant: Hamilton Sundstrand Corporation

Inventor： John Dickey ,  Kevin Kilroy

IPC: H05K1/02 ,  H05K1/09 ,  H05K1/18 ,  H05K3/10

CPC classification number: H05K1/0207 ,  H05K1/021 ,  H05K1/09 ,  H05K1/181 ,  H05K3/107 ,  H05K2201/0302 ,  H05K2201/032 ,  H05K2201/10166

Abstract: Circuit board assemblies include a circuit board portion having a recess formed therein, an electrically and thermally conductive insert, shaped to fit in the recess formed in the circuit board portion, an electrically and thermally conductive layer adapted and configured to interface with an external chassis, and a thermally conductive electrically insulative portion interposed between the electrically and thermally conductive insert and the electrically and thermally conductive layer, adapted and configured to conduct heat from the electrically and thermally conductive insert to the electrically and thermally conductive layer without conducting electricity.

公开(公告)号：US20230319991A1

公开(公告)日：2023-10-05

申请号：US17709461

申请日：2022-03-31

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hao-Cheng Hou ,  Tsung-Ding Wang ,  Jung-Wei Cheng ,  Chien-Hsun Chen ,  Chien-Hsun Lee

IPC: H05K1/11 ,  G01R1/073 ,  H05K1/02 ,  H05K1/14 ,  H05K1/09 ,  H05K1/18 ,  H05K3/24

CPC classification number: H05K1/113 ,  G01R1/07342 ,  H05K1/0271 ,  H05K1/144 ,  H05K1/09 ,  H05K1/181 ,  H05K3/244 ,  H05K2201/032 ,  H05K2201/10015 ,  H05K2201/099 ,  H05K2203/1333

Abstract: A laminated structure and the manufacturing methods thereof are provided. The structure includes an interconnect substrate having a first surface and a second surface opposite to the first surface, an insulating encapsulant laterally wrapping the interconnect substrate, and a redistribution structure disposed on the first surface of the interconnect substrate and electrically connected with the interconnect substrate. The redistribution structure has a third surface facing the first surface and a fourth surface opposite to the third surface. The redistribution structure includes first pads, second pads located beside the first pads, and protective patterns disposed on the first pads and covering the first pads. The first pads include pad portions protruded from the fourth surface and the protective patterns are in contact with sidewalls and top surfaces of the pad portions of the first pads.

公开(公告)号：US11778293B2

公开(公告)日：2023-10-03

申请号：US16999232

申请日：2020-08-21

Applicant: CANON KABUSHIKI KAISHA

Inventor： Dai Naito

IPC: H01L27/146 ,  H04N23/54 ,  H05K1/09 ,  H05K1/18 ,  H05K3/00 ,  H05K3/18 ,  H01L23/04

CPC classification number: H04N23/54 ,  H01L23/04 ,  H01L27/146 ,  H05K1/09 ,  H05K1/182 ,  H05K3/0017 ,  H05K3/181 ,  H05K2201/032 ,  H05K2201/10121 ,  H05K2201/10151

Abstract: A sensor package that is configured by molding a frame to a mounting substrate by insert molding and that prevents adhering to components and terminals and reduces damage to the mounting substrate. The sensor package includes an image sensor, a mounting substrate to which the image sensor is mounted, a frame provided in the mounting substrate so as to surround the image sensor, and a cover attached to the frame so as to cover the image sensor. The mounting substrate includes terminals electrically connected with the image sensor and a groove provided in a predetermined depth between an area in which the frame is provided and the terminals.

公开(公告)号：US09949373B2

公开(公告)日：2018-04-17

申请号：US15409221

申请日：2017-01-18

Applicant: Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd.

Inventor： Dror Hurwitz ,  Alex Huang

IPC: H05K3/00 ,  H05K1/11 ,  H05K1/03 ,  H05K3/06

CPC classification number: H05K3/007 ,  C25D5/022 ,  H01L21/568 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/18 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K1/0313 ,  H05K1/115 ,  H05K3/0064 ,  H05K3/064 ,  H05K2201/032 ,  H05K2201/09609 ,  H05K2201/10242 ,  H01L2924/00

Abstract: An array of chip sockets defined by an organic matrix framework surrounding sockets through the organic matrix framework and further comprising a grid of metal vias through the organic matrix framework. In an embodiment, a panel includes an array of chip sockets, each surrounded and defined by an organic matrix framework including a grid of copper vias through the organic matrix framework. The panel includes at least a first region with sockets having a set of dimensions for receiving one type of chip and a second region with sockets and another set of dimensions for receiving a second type of chip.