公开(公告)号：US20100052148A1

公开(公告)日：2010-03-04

申请号：US12541253

申请日：2009-08-14

Applicant: Shih-Ping Hsu

Inventor： Shih-Ping Hsu

IPC: H01L23/498

CPC classification number: H05K1/112 ,  H01L21/563 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05111 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/73203 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/3011 ,  H05K3/3436 ,  H05K2201/094 ,  H05K2201/09436 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00014

Abstract: Provided are a package structure and a package substrate, including: a substrate body having a plurality of matrix-arranged electrical contact pads formed on at least one surface thereof, wherein a solder mask layer is formed on said surface and has a plurality of openings for exposing the electrical contact pads, respectively; a first electroless-plated layer disposed on the electrical contact pads, on the walls of the openings and at the peripheries of the openings; and a second electroless-plated layer disposed on the first electroless-plated layer, the first and second electroless-plated layers constituting a recessed electrical connection structure. By forming the even electroless-plated layers on the electrical contact pads. The invention overcomes drawbacks of the prior art, namely breakage of interfaces between solder bumps and electrical contact pads and even damage of the package structure otherwise caused by excessive differences in stress between the solder bumps.

Abstract translation: 提供一种封装结构和封装基板，包括：基板主体，其具有形成在其至少一个表面上的多个矩阵布置的电接触焊盘，其中在所述表面上形成焊接掩模层，并且具有多个开口， 分别暴露电接触垫; 设置在电接触垫上，开口壁上和开口周边的第一化学镀层; 以及设置在所述第一化学镀层上的第二无电镀层，所述第一和第二无电镀层构成凹陷的电连接结构。 通过在电接触焊盘上形成均匀的无电镀层。 本发明克服了现有技术的缺点，即焊料凸块与电接触焊盘之间的界面的破坏，甚至损坏包装结构，否则由焊料凸块之间的应力过大的差异引起。

公开(公告)号：US20100032200A1

公开(公告)日：2010-02-11

申请号：US12581205

申请日：2009-10-19

Applicant: Naohiro HIROSE ,  Hitoshi Ito ,  Yoshiyuki Iwata ,  Masanori Kawade ,  Hajime Yazu

Inventor： Naohiro HIROSE ,  Hitoshi Ito ,  Yoshiyuki Iwata ,  Masanori Kawade ,  Hajime Yazu

IPC: H05K1/11

CPC classification number: H01L23/49811 ,  H01L2224/05001 ,  H01L2224/05572 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2924/00013 ,  H01L2924/01019 ,  H01L2924/01322 ,  H01L2924/15312 ,  H05K1/111 ,  H05K1/112 ,  H05K3/28 ,  H05K3/321 ,  H05K3/3421 ,  H05K3/384 ,  H05K3/4602 ,  H05K2201/09381 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2201/0979 ,  H05K2201/10318 ,  Y10T428/239

Abstract: A package substrate 310 incorporating a substrate provided with a conductor layer 5, a conductive connecting pin 100 arranged to establish the electrical connection with a motherboard and secured to the surface of the substrate, wherein a pad 16 for securing the conductive connecting pin is provided for the package substrate 310. The pad 16 is covered with an organic resin insulating layer 15 having an opening 18 through which the pad 16 is partially exposed to the outside. The conductive connecting pin 100 is secured to the pad exposed to the outside through the opening with a conductive adhesive agent 17 so that solution of the conductive connecting pin 100 from the substrate occurring, for example when mounting is performed is prevented.

Abstract translation: 一种包含衬底的封装衬底310，该衬底设置有导体层5，导电连接销100被布置成与主板建立电连接并固定到衬底的表面，其中提供用于固定导电连接销的焊盘16，用于 封装衬底310.衬垫16被具有开口18的有机树脂绝缘层15覆盖，衬垫16通过该开口局部暴露于外部。 导电连接销100通过导电粘合剂17通过开口固定到暴露于外部的焊盘，从而防止例如当执行安装时发生例如导电连接销100从基板的溶液。

公开(公告)号：US20090315855A1

公开(公告)日：2009-12-24

申请号：US12485615

申请日：2009-06-16

Applicant: Harutoshi OIKAWA ,  Kiyohiro KIMURA

Inventor： Harutoshi OIKAWA ,  Kiyohiro KIMURA

IPC: G06F3/045 ,  H05K1/02

CPC classification number: H05K3/361 ,  H05K3/281 ,  H05K3/323 ,  H05K3/421 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2201/097 ,  H05K2201/09781 ,  H05K2201/0979 ,  H05K2203/1572

Abstract: A flexible printed circuit includes: a flexible substrate extending from a first end section to a second end section, and having an opening or a notch in proximity to the first end section; a first wiring layer extending from the first end section to the second end section so as to avoid the opening or the notch; a second wiring layer extending from the first end section to the second end section so as to block the opening or the notch; a first conductive member being formed opposed to the flexible substrate in relation to the first wiring layer and at least in proximity to the first end section in a region opposed to the first wiring layer, and being electrically connected to the first wiring layer; and a second conductive member electrically connected to the second wiring layer via the opening or the notch.

Abstract translation: 柔性印刷电路包括：柔性基板，其从第一端部延伸到第二端部，并且具有靠近第一端部的开口或凹口; 第一布线层，从第一端部延伸到第二端部，以避免开口或凹口; 第二布线层，其从所述第一端部延伸到所述第二端部，以阻挡所述开口或所述凹口; 第一导电构件，其与所述柔性基板相对于所述第一布线层形成，并且在与所述第一布线层相对的区域中至少靠近所述第一端部，并且电连接到所述第一布线层; 以及通过所述开口或所述凹口与所述第二布线层电连接的第二导电构件。

公开(公告)号：US07607222B2

公开(公告)日：2009-10-27

申请号：US11708567

申请日：2007-02-21

Applicant: Myung-Sam Kang

Inventor： Myung-Sam Kang

IPC: H05K3/34 ,  H01L21/00

CPC classification number: H01L23/3114 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K3/007 ,  H05K3/20 ,  H05K3/284 ,  H05K3/4007 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2203/0361 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic component package and a manufacturing method thereof are disclosed. A method of manufacturing an electronic component package, which includes: forming a protrusion part on a first carrier board; stacking an insulation layer on the first carrier board and forming a circuit pattern, which includes a bonding pad and a solder ball pad, on the surface of the insulation layer; mounting an electronic component on the surface of the insulation layer and electrically connecting the electronic component and the bonding pad; and removing the first carrier board and the protrusion part, allows the mounting of the electronic component with just a single circuit pattern layer.

Abstract translation: 公开了一种电子部件封装及其制造方法。 一种制造电子部件封装的方法，包括：在第一载体板上形成突出部; 在第一载体板上堆叠绝缘层，并在绝缘层的表面上形成包括焊盘和焊球垫的电路图案; 将电子部件安装在所述绝缘层的表面上并电连接所述电子部件和所述焊盘; 并且移除第一载体板和突起部分允许仅使用单个电路图案层来安装电子部件。

公开(公告)号：US20090243076A1

公开(公告)日：2009-10-01

申请号：US12414502

申请日：2009-03-30

Applicant: Peter C. Salmon

Inventor： Peter C. Salmon

IPC: H01L23/50 ,  H01L23/488 ,  H01L23/522

CPC classification number: H01L24/16 ,  H01L23/49811 ,  H01L23/5386 ,  H01L23/5387 ,  H01L24/25 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16237 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  H05K1/0289 ,  H05K1/115 ,  H05K3/007 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/4682 ,  H05K2201/0379 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/10674 ,  H05K2203/016 ,  H05K2203/0568 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/29099 ,  H01L2924/20751 ,  H01L2924/00

Abstract: This specification describes techniques for manufacturing an electronic system module. The module includes flexible multi-layer interconnection circuits with trace widths of 5 microns or less. A glass panel manufacturing facility, similar to those employed for making liquid crystal display, LCD, panels is used to fabricate the interconnection circuits. A polymer base layer is formed on a glass carrier with an intermediate release layer. Alternate layers of metal and dielectric are formed on the base layer, and patterned to create an array of multi-layer interconnection circuits on the glass panel. A thick layer of polymer is deposited on the interconnection circuit, and openings formed at input/output (I/O) pad locations. Solder paste is deposited in the openings to form wells filled with solder. After dicing the glass carrier to form separated interconnection circuits, IC chips are stud bumped and assembled using flip chip bonding, wherein the stud bumps on the components are inserted into corresponding wells on the interconnection circuits. The IC chips are tested and reworked to form tested circuit assemblies. Methods for connecting to testers and to other modules and electronic systems are described. Module packaging layers are provided for hermetic sealing and for electromagnetic shielding. A blade server embodiment is also described.

Abstract translation: 本说明书描述了用于制造电子系统模块的技术。 该模块包括轨迹宽度为5微米或更小的柔性多层互连电路。 用于制造液晶显示器，LCD，面板的玻璃面板制造设备用于制造互连电路。 在具有中间剥离层的玻璃载体上形成聚合物基层。 金属和电介质的交替层形成在基底层上，并被图案化以在玻璃面板上产生多层互连电路阵列。 在互连电路上沉积一层聚合物，并在输入/输出（I / O）焊盘位置形成开口。 将焊膏沉积在开口中以形成填充有焊料的孔。 在切割玻璃载体以形成分离的互连电路之后，使用倒装芯片接合对IC芯片进行螺柱凸起并组装，其中部件上的螺柱凸起插入到互连电路上的对应的孔中。 对IC芯片进行测试和返工以形成测试电路组件。 描述了连接到测试仪和其他模块和电子系统的方法。 提供模块封装层用于密封和电磁屏蔽。 还描述了刀片服务器实施例。

公开(公告)号：US20090212423A1

公开(公告)日：2009-08-27

申请号：US12196210

申请日：2008-08-21

Applicant: Junji TANAKA ,  Masahiko HARAYAMA ,  Masanori ONODERA

Inventor： Junji TANAKA ,  Masahiko HARAYAMA ,  Masanori ONODERA

IPC: H01L23/498 ,  H01L21/768

CPC classification number: H05K3/38 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85201 ,  H01L2225/06568 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/20752 ,  H05K2201/094 ,  H05K2201/09472 ,  H05K2201/1025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device is provided that includes a semiconductor chip, a plurality of solder bumps that electrically couple the semiconductor chip to the outside, and a metal bump being provided on the surface of each first solder bump which is at least a part of the plurality of solder bumps and being made of a metal having a melting point higher than that of the first solder bump. The wettability of the first solder bump is improved as each metal bump serves as a core when the corresponding first solder bump melts. Thus, the connection reliability of the first solder bump can be improved.

Abstract translation: 提供了一种半导体器件，其包括半导体芯片，将半导体芯片电耦合到外部的多个焊料凸块以及设置在每个第一焊料凸块的表面上的金属凸块，该第一焊料凸块是至少部分多个 焊料凸起并且由熔点高于第一焊料凸点的金属制成。 当相应的第一焊料凸块熔化时，每个金属凸块用作芯时，第一焊料凸块的润湿性得到改善。 因此，可以提高第一焊料凸块的连接可靠性。

公开(公告)号：US20090079070A1

公开(公告)日：2009-03-26

申请号：US11858749

申请日：2007-09-20

Applicant: Yaojian Lin ,  Xu Sheng Bao

Inventor： Yaojian Lin ,  Xu Sheng Bao

IPC: H01L23/52 ,  H01L21/60

CPC classification number: H05K3/3452 ,  H01L23/525 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/02123 ,  H01L2224/02163 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05551 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/0558 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/13 ,  H01L2224/13011 ,  H01L2224/13016 ,  H01L2224/131 ,  H01L2224/1613 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/30105 ,  H05K1/112 ,  H05K3/3436 ,  H05K3/3457 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/099 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/014

Abstract: A flip chip style semiconductor package has a substrate with a plurality of active devices formed thereon. A contact pad is formed on the substrate. An under bump metallization (UBM) layer is in electrical contact with the contact pad. A passivation layer is formed over the substrate. In one case, the UBM layer is disposed above the passivation layer. Alternatively, the passivation layer is disposed above the UBM layer. A portion of the passivation layer is removed to create a passivation island. The passivation island is centered with respect to the contact pad with its top surface devoid of the UBM layer. A solder bump is formed over the passivation island in electrical contact with the UBM layer. The passivation island forms a void in the solder bump for stress relief. The UBM layer may include a redistribution layer such that the passivation island is offset from the contact pad.

Abstract translation: 倒装片式半导体封装具有在其上形成有多个有源器件的衬底。 在基板上形成接触垫。 凸块下金属化（UBM）层与接触焊盘电接触。 钝化层形成在衬底上。 在一种情况下，UBM层设置在钝化层上方。 或者，钝化层设置在UBM层上。 去除钝化层的一部分以产生钝化岛。 钝化岛相对于接触焊盘居中，其顶表面没有UBM层。 在与UBM层电接触的钝化岛上形成焊料凸点。 钝化岛在焊料凸块中形成空隙以消除应力。 UBM层可以包括再分布层，使得钝化岛从接触垫偏移。

公开(公告)号：US07505278B2

公开(公告)日：2009-03-17

申请号：US11649755

申请日：2007-01-05

Applicant: Byung Sung Choi ,  Hyoung Seok Kim ,  Sang Ki Hong

Inventor： Byung Sung Choi ,  Hyoung Seok Kim ,  Sang Ki Hong

IPC: H05K1/00

CPC classification number: H05K1/147 ,  G02F1/13452 ,  H05K1/0213 ,  H05K1/0215 ,  H05K3/0061 ,  H05K3/28 ,  H05K3/321 ,  H05K2201/09472 ,  H05K2201/10128 ,  H05K2201/1028

Abstract: A display assembly having a display module to receive a display signal containing prescribed information, a main circuitry supporting substrate including a ground, a flexible circuitry supporting substrate module connected to the circuitry supporting substrate to process or transfer data for prescribed information from the circuit board to the display module, the flexible circuitry supporting substrate module having recessed conductive portions, and a conductive member connected to the flexible circuitry supporting substrate module to ground the flexible circuitry supporting substrate and the display module, the conductive member including conductive tape applied to the flexible circuitry supporting substrate module and conductive paste to connect recessed conductive portions of the flexible circuitry supporting substrate module to the conductive tape. The display assembly may be formed in a mobile terminal.

Abstract translation: 一种显示器组件，具有用于接收包含规定信息的显示信号的显示模块，包括地面的主电路支撑衬底，连接到所述电路支撑衬底的柔性电路支撑衬底模块，以处理或将数据从所述电路板传送到规定信息， 所述显示模块，所述柔性电路支撑衬底模块具有凹入的导电部分，以及连接到所述柔性电路支撑衬底模块以将所述柔性电路支撑衬底和所述显示模块接地的导电构件，所述导电构件包括施加到所述柔性电路 支撑衬底模块和导电膏以将柔性电路支撑衬底模块的凹进的导电部分连接到导电带上。 显示组件可以形成在移动终端中。

公开(公告)号：US20080280463A1

公开(公告)日：2008-11-13

申请号：US11746463

申请日：2007-05-09

Applicant: Darryl J. McKenney ,  Michael W. Gust ,  David G. Persad

Inventor： Darryl J. McKenney ,  Michael W. Gust ,  David G. Persad

IPC: H01R12/00

CPC classification number: H05K3/3421 ,  H05K1/111 ,  H05K1/112 ,  H05K1/116 ,  H05K3/3447 ,  H05K3/429 ,  H05K2201/09036 ,  H05K2201/09063 ,  H05K2201/09472 ,  H05K2201/09845 ,  H05K2201/10704 ,  H05K2201/10901 ,  H05K2203/1178 ,  Y02P70/613

Abstract: Improved printed circuit boards (PCBs), printed circuit board assemblies (PCBAs) and methods thereof contemplate PCBs with recesses incorporated into planar surfaces thereof adapted to receive respective elongate leads of circuit components. The recesses are sized so as to prevent distal ends of the leads from emerging through the far sides of the boards and, indeed, allow for positioning of the component flush with, or offset above, the board to which they are mounted.

Abstract translation: 改进的印刷电路板（PCB），印刷电路板组件（PCBA）及其方法考虑了具有并入其适于接收电路部件的相应细长引线的平面中的凹部的PCB。 凹槽的尺寸设计成防止引线的远端通过板的远侧出现，并且实际上允许将元件与其安装的板齐平或偏置在其上。

公开(公告)号：US20080258313A1

公开(公告)日：2008-10-23

申请号：US11737187

申请日：2007-04-19

Applicant: M. Zaki Ali ,  A. Peter Stolt ,  Gilbert A. Hawkins ,  Thomas M. Stephany

Inventor： M. Zaki Ali ,  A. Peter Stolt ,  Gilbert A. Hawkins ,  Thomas M. Stephany

IPC: H01L23/48 ,  H01L21/58

CPC classification number: H01L23/48 ,  B81B2207/098 ,  B81C1/00301 ,  H01L21/4864 ,  H01L24/24 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/1131 ,  H01L2224/24226 ,  H01L2224/244 ,  H01L2224/24992 ,  H01L2224/27013 ,  H01L2224/73217 ,  H01L2224/82039 ,  H01L2224/82102 ,  H01L2224/83051 ,  H01L2224/838 ,  H01L2224/92144 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0781 ,  H01L2924/12041 ,  H01L2924/1306 ,  H05K3/0032 ,  H05K3/107 ,  H05K3/125 ,  H05K3/1258 ,  H05K3/321 ,  H05K2201/09472 ,  H05K2201/10674 ,  H05K2203/013 ,  H05K2203/0568 ,  H05K2203/1469 ,  Y10S438/94 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A method of providing connectivity to a microsized device, the method includes the steps of providing an ablative base material having at least a top surface; providing a die having a first and second surface and having bonding pads at least upon the first surface; placing the die with the at least first surface of the die contacting the at least first surface of the ablative base material; and ablating a channel in the ablative material proximate to the die.

Abstract translation: 提供与微型化装置的连通性的方法，该方法包括以下步骤：提供具有至少顶表面的烧蚀性基材; 提供具有第一和第二表面的模具，并且至少在所述第一表面上具有焊盘; 使所述模具与所述模具的所述至少第一表面接触所述可烧蚀基材的所述至少第一表面; 并且在靠近模具的烧蚀材料中烧蚀通道。