公开(公告)号：US06727579B1

公开(公告)日：2004-04-27

申请号：US09592487

申请日：2000-06-08

Applicant: Benjamin N. Eldridge ,  Gary W. Grube ,  Igor Y Khandros ,  Gaetan L. Mathieu

Inventor： Benjamin N. Eldridge ,  Gary W. Grube ,  Igor Y Khandros ,  Gaetan L. Mathieu

IPC: H01L2352

CPC classification number: H05K3/4015 ,  B23K1/0016 ,  B23K20/004 ,  B23K2101/40 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D21/02 ,  G01R1/06761 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L22/20 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01031 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/0106 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/01204 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/20751 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/141 ,  H05K3/20 ,  H05K3/24 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/368 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  H01L2924/01004 ,  H01L2924/0102 ,  H01L2924/20752 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Contact structures exhibiting resilience or compliance for a variety of electronic components are formed by bonding a free end of a wire to a substrate, configuring the wire into a wire stem having a springable shape, severing the wire stem, and overcoating the wire stem with at least one layer of a material chosen primarily for its structural (resiliency, compliance) characteristics. A variety of techniques for configuring, severing, and overcoating the wire stem are disclosed. In an exemplary embodiment, a free end of a wire stem is bonded to a contact area on a substrate, the wire stem is configured to have a springable shape, the wire stem is severed to be free-standing by an electrical discharge, and the free-standing wire stem is overcoated by plating. A variety of materials for the wire stem (which serves as a falsework) and for the overcoat (which serves as a superstructure over the falsework) are disclosed. Various techniques are described for mounting the contact structures to a variety of electronic components (e.g., semiconductor wafers and dies, semiconductor packages, interposers, interconnect substrates, etc.), and various process sequences are described. The resilient contact structures described herein are ideal for making a “temporary” (probe) connections to an electronic component such as a semiconductor die, for burn-in and functional testing. The self-same resilient contact structures can be used for subsequent permanent mounting of the electronic component, such as by soldering to a printed circuit board (PCB). An irregular topography can be created on or imparted to the tip of the contact structure to enhance its ability to interconnect resiliently with another electronic component. Among the numerous advantages of the present invention is the great facility with which the tips of a plurality of contact structures can be made to be coplanar with one another. Other techniques and embodiments, such as wherein the falsework wirestem protrudes beyond an end of the superstructure, or is melted down, and wherein multiple free-standing resilient contact structures can be fabricated from loops, are described.

公开(公告)号：US06648204B2

公开(公告)日：2003-11-18

申请号：US09754714

申请日：2001-01-04

Applicant: Cheryl M. Waldron-Floyde ,  Brad C. Irwin

Inventor： Cheryl M. Waldron-Floyde ,  Brad C. Irwin

IPC: B23K3704

CPC classification number: H05K13/0465 ,  H05K3/303 ,  H05K2201/10318 ,  H05K2201/10424 ,  H05K2201/10704 ,  H05K2203/0278 ,  H05K2203/167 ,  Y02P70/613 ,  Y10T29/49149 ,  Y10T29/53978

Abstract: An alignment weight is provided. The alignment weight includes a body of material having first and second opposing surfaces. A number of depressions are formed in the first surface. The depressions receive pins of a floating pin field when placed on a floating pin field during connection of the floating pin field to a printed circuit board.

Abstract translation: 提供了对准重量。 对准重量包括具有第一和第二相对表面的材料体。 在第一表面形成多个凹陷。 当将浮动引脚字段连接到印刷电路板时，凹陷接收浮置引脚的引脚。

公开(公告)号：US20030156400A1

公开(公告)日：2003-08-21

申请号：US10385387

申请日：2003-03-07

Inventor： Joseph Ted Dibene II ,  David H. Hartke

IPC: H05K001/11

CPC classification number: H05K7/1092 ,  G06F1/18 ,  G06F1/182 ,  G06F1/189 ,  H01L23/427 ,  H01L23/433 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/92125 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01R4/64 ,  H01R12/52 ,  H01R12/7082 ,  H01R12/7088 ,  H01R12/721 ,  H05K1/0206 ,  H05K1/0262 ,  H05K1/0263 ,  H05K1/141 ,  H05K1/144 ,  H05K3/301 ,  H05K3/368 ,  H05K2201/10318 ,  H05K2201/10325 ,  H05K2201/1053 ,  H05K2201/10598 ,  H05K2201/10704 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2201/2036 ,  H01L2924/00

Abstract: A microprocessor packaging architecture using a modular circuit board assembly that provides power to a microprocessor while also providing for integrated thermal and electromagnetic interference (EMI) is disclosed. The modular circuit board assembly comprises a substrate, having a component mounted thereon, a circuit board, including a circuit for supplying power to the component, and at least one conductive interconnect device disposed between the substrate and the circuit board, the conductive interconnect device configured to electrically couple the circuit to the component.

Abstract translation: 公开了一种使用向微处理器供电并同时提供集成热和电磁干扰（EMI）的模块化电路板组件的微处理器封装结构。 所述模块化电路板组件包括具有安装在其上的部件的基板，包括用于向所述部件供电的电路的电路板以及设置在所述基板和所述电路板之间的至少一个导电互连装置，所述导电互连装置配置 以将电路电耦合到组件。

公开(公告)号：US20030095391A1

公开(公告)日：2003-05-22

申请号：US10300855

申请日：2002-11-21

Inventor： Tsutomu Matsuo

IPC: H05K007/02 ,  H05K007/06 ,  H05K007/08 ,  H05K007/10

CPC classification number: H01R12/7076 ,  H01R12/716 ,  H05K1/141 ,  H05K2201/10318 ,  H05K2201/10325 ,  H05K2201/10424 ,  H05K2201/2018 ,  H05K2203/1572

Abstract: An electronic component assembly mounted on a circuit board (1) comprises an intermediate connector (2) mounted on the circuit board and having a first space (7) for accommodating first electronic components (8A, 8B, and 8C) provided on the circuit board and a unit body (11) provided on the intermediate connector and connected to the circuit board through the intermediate connector. The unit body comprises a connector member (12) having a second space (16) and a mounting member (13) having second electronic component (19A, 19B, and 19C) accommodated in the second space.

Abstract translation: 安装在电路板（1）上的电子部件组件包括安装在电路板上的中间连接器（2），并具有用于容纳设置在电路板上的第一电子部件（8A，8B和8C）的第一空间（7） 以及设置在中间连接器上并通过中间连接器连接到电路板的单元体（11）。 该单元主体包括具有第二空间（16）的连接器构件（12）和容纳在第二空间中的具有第二电子部件（19A，19B和19C）的安装构件（13）。

公开(公告)号：US20030002268A1

公开(公告)日：2003-01-02

申请号：US10036957

申请日：2001-12-20

Inventor： Joseph Ted Dibene II ,  David H. Hartke ,  Carl E. Hoge ,  Edward J. Derian

IPC: H05K001/11

CPC classification number: H05K7/1092 ,  G06F1/18 ,  G06F1/182 ,  G06F1/189 ,  H01L23/427 ,  H01L23/433 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15312 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01R4/64 ,  H01R12/52 ,  H01R12/7088 ,  H05K1/0206 ,  H05K1/0263 ,  H05K1/141 ,  H05K1/144 ,  H05K3/301 ,  H05K3/368 ,  H05K2201/10318 ,  H05K2201/10325 ,  H05K2201/10598 ,  H05K2201/10704 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2201/2036

Abstract: A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance. interconnect.

公开(公告)号：US20020179692A1

公开(公告)日：2002-12-05

申请号：US09873616

申请日：2001-06-04

Inventor： I-Chung Tung ,  Shih-Ping Hsu

IPC: B23K031/02 ,  B23K001/20

CPC classification number: H05K3/3421 ,  H01L21/4853 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/49109 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/181 ,  H05K3/3426 ,  H05K3/3452 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/0989 ,  H05K2201/10318 ,  H05K2201/10787 ,  Y02P70/613 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A pin attachment method for mounting the pins on a wiring substrate for fabricating a pin grid array package is disclosed. There is provided an organic wiring board including a surface bearing electrical circuitry which includes at least one contact pad for receiving a pin. A solder mask layer which is placed on the board surface and patterned to expose the pad. The solder mask layer which does not cover any portion of the pad and forms a well by the perimeter of the solder mask layer around the pad. Subsequently, a pin and a solder material which are placed over said pad in the well. The pin which is soldered to the pad by a temperature sufficient to melt the solder material.

Abstract translation: 公开了一种用于将引脚安装在用于制造引脚格栅阵列封装的布线基板上的引脚连接方法。 提供了一种有机布线板，其包括表面承载电路，其包括用于接收销的至少一个接触垫。 焊接掩模层，其被放置在板表面上并被图案化以暴露焊盘。 焊接掩模层，其不覆盖焊盘的任何部分，并且通过焊盘周围的焊料掩模层的周边形成阱。 随后，将一个销和一个焊接材料放置在井中的所述垫上。 该焊针被焊接到焊盘上，该温度足以熔化焊料。

公开(公告)号：US06490160B2

公开(公告)日：2002-12-03

申请号：US09921153

申请日：2001-08-02

Applicant: Joseph T. Dibene, II ,  Farhad Raiszadeh

Inventor： Joseph T. Dibene, II ,  Farhad Raiszadeh

IPC: H05K720

CPC classification number: H05K7/1092 ,  F28D15/0233 ,  F28D15/04 ,  G06F1/18 ,  G06F1/182 ,  G06F1/189 ,  H01L23/427 ,  H01L2924/0002 ,  H01L2924/15192 ,  H01R4/64 ,  H01R12/52 ,  H01R12/7088 ,  H05K1/0206 ,  H05K1/0263 ,  H05K1/141 ,  H05K1/144 ,  H05K3/301 ,  H05K3/368 ,  H05K2201/10318 ,  H05K2201/10325 ,  H05K2201/10598 ,  H05K2201/10704 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2201/2036 ,  H01L2924/00

Abstract: A heat transfer device wherein a vapor chamber is combined with a pin structure that allows the highly conductive cooling vapors to flow within the pins of a pin array maximizing the efficiency of both components of the heat sink into one unit is disclosed. In one embodiment the heat transfer device comprises a thermally conductive chamber having a first thermally conductive chamber portion having a base thermally coupleable to a heat dissipating device; a second thermally conductive chamber portion having a plurality of hollow protrusions extending away from and in fluid communication with the first thermally conductive chamber portion wherein the thermally conductive chamber comprises a fluid vaporizable when in thermal communication with the heat dissipating device and condensable when in thermal communication with the hollow protrusions.

公开(公告)号：US06483328B1

公开(公告)日：2002-11-19

申请号：US09204740

申请日：1998-12-02

Applicant: Benjamin N. Eldridge ,  Gary W. Grube ,  Gaetan L. Mathieu

Inventor： Benjamin N. Eldridge ,  Gary W. Grube ,  Gaetan L. Mathieu

IPC: G01R3126

CPC classification number: B23K20/004 ,  B23K2101/40 ,  G01R1/06711 ,  G01R1/06716 ,  G01R1/07307 ,  G01R1/07314 ,  G01R1/07342 ,  G01R1/07378 ,  G01R31/2884 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/563 ,  H01L22/20 ,  H01L23/49811 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/72 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/06136 ,  H01L2224/13099 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15787 ,  H05K1/141 ,  H05K3/20 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/368 ,  H05K3/4015 ,  H05K2201/10318 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  H01L2924/00

Abstract: A probe card is provided for contacting an electric componet with raised contact elements. In particular, the present invention is useful for contacting a semiconductor wafer with resilient contact elements, such as springs. A probe card is designed to have terminals to mate with the contact elements on the wafer. In a preferred embodiment, the terminals are posts. In a preferred embodiment the terminals include a contact material suitable for repeated contacts. In one particularly preferred embodiment, a space transformer is prepared with contact posts on one side and terminals on the opposing side. An interposer with spring contacts connects a contact on the opposing side of the space transformer to a corresponding terminal on a probe card, which terminal is in turn connected to a terminal which is connectable to a test device such as a conventional tester.

Abstract translation: 提供探针卡用于使电子部件与凸起的接触元件接触。 特别地，本发明对于使半导体晶片与诸如弹簧的弹性接触元件接触是有用的。 探针卡被设计成具有与晶片上的接触元件配合的端子。 在优选实施例中，终端是帖子。 在优选实施例中，端子包括适于重复接触的接触材料。 在一个特别优选的实施例中，空间变压器被制备成具有一侧的接触柱和相对侧上的端子。 具有弹簧触点的插入件将空间变压器的相对侧上的触点连接到探针卡上的对应端子，该端子又连接到可连接到诸如常规测试器的测试装置的端子。

公开(公告)号：US20020053734A1

公开(公告)日：2002-05-09

申请号：US10034528

申请日：2001-12-27

Applicant: FormFactor, Inc.

Inventor： Benjamin N. Eldridge ,  Gary W. Grube ,  Igor Y. Khandros ,  Gaetan L. Mathieu

IPC: H05K001/00 ,  H01R012/00 ,  H01L023/34 ,  H01R009/00

CPC classification number: B23K20/004 ,  B23K2101/40 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D21/02 ,  G01R1/07342 ,  G01R1/07378 ,  G01R31/2884 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L22/20 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/72 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/45144 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4015 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49155 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A probe card assembly includes a probe card, a space transformer having resilient contact structures (probe elements) mounted directly to (i.e., without the need for additional connecting wires or the like) and extending from terminals on a surface thereof, and an interposer disposed between the space transformer and the probe card. The space transformer and interposer are nullstacked upnull so that the orientation of the space transformer, hence the orientation of the tips of the probe elements, can be adjusted without changing the orientation of the probe card. Suitable mechanisms for adjusting the orientation of the space transformer, and for determining what adjustments to make, are disclosed. The interposer has resilient contact structures extending from both the top and bottom surfaces thereof, and ensures that electrical connections are maintained between the space transformer and the probe card throughout the space transformer's range of adjustment, by virtue of the interposer's inherent compliance. Multiple die sites on a semiconductor wafer are readily probed using the disclosed techniques, and the probe elements can be arranged to optimize probing of an entire wafer. Composite interconnection elements having a relatively soft core overcoated by a relatively hard shell, as the resilient contact structures are described.

公开(公告)号：US06375365B1

公开(公告)日：2002-04-23

申请号：US09514424

申请日：2000-02-28

Applicant: Kelvin Chau

Inventor： Kelvin Chau

IPC: G02B636

CPC classification number: G02B6/43 ,  G02B6/422 ,  G02B6/4231 ,  H05K3/303 ,  H05K3/305 ,  H05K3/3447 ,  H05K2201/10303 ,  H05K2201/10318 ,  H05K2201/10484 ,  Y02P70/613

Abstract: For any optically interconnected assembly, the packaging tasks include alignment of one or multiple optical devices, and attachment of aligned modules to a common substrate. The concept disclosed here is a packaging method to assemble pre-aligned optical modules on a common structure called motherboard. The apparatus consists of two components: device carrier or motherboard with openings on the sides and adjustable plugs in the form of pins or balls. The method and apparatus utilize plugs as connection bridges between device carriers and motherboard, allowing solid contacts and a rigid aligned structure among modules. The direct benefits include relaxation of dimensional tolerances on parts and elimination of the need for high-precision spacers.

Abstract translation: 对于任何光学互连组件，包装任务包括一个或多个光学装置的对准，以及将对准的模块附接到公共衬底。 这里公开的概念是将预对准的光学模块组装在称为母板的公共结构上的封装方法。 该设备由两部分组成：设备载体或主板，侧面有开口，可调节插头为销或球形。 该方法和装置利用插头作为装置载体和母板之间的连接桥，允许模块之间的固体触点和刚性对准结构。 直接的优点包括放宽零件的尺寸公差，消除对高精度垫片的需求。