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公开(公告)号：US20250070776A1
公开(公告)日：2025-02-27
申请号：US18455436
申请日：2023-08-24
Applicant: Renesas Electronics America Inc.
Inventor： Steven Ernest FINN , Preston Blaire SLUDER
IPC: H03K17/687 , H03K17/06 , H03K19/003
Abstract: Systems and methods for skew compensation in a push-pull driver are described. A device can include a first circuit configured to output a skew measurement of an output driver stage in a driver circuit. The device can further include a second circuit configured to determine a first skew parameter based on the skew measurement and apply a first bias that is dependent on the skew measurement to drive a high-side transistor in the output driver stage. The device can further include a third circuit configured to determine a second skew parameter based on the skew measurement and apply a second bias that is dependent on the skew measurement to drive a low-side transistor in the output driver stage. The first bias and the second bias can be complementary.
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公开(公告)号：US12206253B2
公开(公告)日：2025-01-21
申请号：US17896495
申请日：2022-08-26
Applicant: Renesas Electronics America Inc.
Inventor： Marco Sautto , Sercan Ipek , Turev Acar
Abstract: Systems and methods for wireless power transfer systems are described. A controller can be coupled to a power rectifier configured to rectify alternating current power into direct current power. The power rectifier can include a first high side transistor, a second high side transistor, a first low side transistor, and a second low side transistor. The controller can be configured to selectively switch on one or more of the first high side transistor, the second high side transistor, the first low side transistor, and the second low side transistor to operate a wireless power receiver under one of a full bridge rectifier mode and a voltage doubler mode.
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公开(公告)号：US12191815B2
公开(公告)日：2025-01-07
申请号：US17406388
申请日：2021-08-19
Applicant: Renesas Electronics America Inc.
Inventor： Morteza Abbasi , Tumay Kanar , Naveen Krishna Yanduru
Abstract: An apparatus includes an amplifier circuit including a first transistor and a second transistor. The first transistor may include a gate having a gate oxide with a first thickness and a first gate length. The second transistor may include a gate having a gate oxide with a second thickness and a second gate length. The first transistor and the second transistor may be connected in a cascode configuration and the second thickness and the second gate length are greater than the first thickness and the first gate length, respectively.
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公开(公告)号：US20240388139A1
公开(公告)日：2024-11-21
申请号：US18423496
申请日：2024-01-26
Applicant: Renesas Electronics America Inc.
Inventor： Adnan DZEBIC , Gustavo James MEHAS , Pooja AGRAWAL
Abstract: In an embodiment, an apparatus is disclosed. The apparatus includes a battery and a wireless power receiver. The wireless power receiver includes a controller and a memory subsystem. The controller is configured to perform a handshake with a wireless power transmitter. The handshake corresponds to a temporary suspension of a power transfer between the wireless power transmitter and the wireless power receiver. The controller is configured to transition the wireless power receiver from a power transfer mode, in which power is transferred wirelessly from the wireless transmitter to the wireless receiver, to a cloak mode, in which the power transfer is suspended, based on the handshake and obtain a supply of power from the battery based on the transition to the cloak mode, the power being configured for use by the controller to maintain power transfer state information about the temporarily suspended power transfer in the memory subsystem.
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公开(公告)号：US12149389B2
公开(公告)日：2024-11-19
申请号：US18155999
申请日：2023-01-18
Applicant: Renesas Electronics America Inc.
Inventor： Tetsuo Sato , Jiang Chen , Qiu Sha
Abstract: Systems, devices, and methods for isolating digital signals are described. A carrier signal can be modulated using a first signal to generate a first modulated signal. The carrier signal and the first modulated signal can be transmitted through a forward path in an isolation barrier, where transmitting the carrier signal through the isolation barrier can transform the carrier signal into a delayed carrier signal. The first modulated signal can be demodulated to recover the first signal. The delayed carrier signal can be modulated using a second signal to generate a second modulated signal. The delayed carrier signal and the second modulated signal can be transmitted through a return path in the isolation barrier, where the return path and the forward path has opposite directions.
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Patent Agency Ranking
公开(公告)号：US20240297571A1
公开(公告)日：2024-09-05
申请号：US18591469
申请日：2024-02-29
Applicant: Renesas Electronics America Inc.
CPC classification number: H02M1/0845 , H02M1/0025 , H02M3/1586
Abstract: System and methods for a power converter are described. A controller can generate first clock signals and generate pulse width modulation (PWM) signals using the first clock signals to operate a first number of active phases in a power converter to supply power to a load. The controller can determine the load demands a second number, greater than the first number, of active phases to supply the power. The controller can generate pulse signals and combine the pulse signals with the first clock signals to generate second clock signals having a higher frequency than the first clock signals. The controller can generate the PWM signals using the second clock signals to operate the second number of active phases in the power converter to supply power to the load.
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公开(公告)号：US20240297564A1
公开(公告)日：2024-09-05
申请号：US18591723
申请日：2024-02-29
Applicant: Renesas Electronics America Inc.
Inventor： Michael Jason HOUSTON , Warren Richard SCHROEDER
CPC classification number: H02M1/0003 , H02M1/088 , H02M3/157
Abstract: Systems and methods for a voltage converter are described. A controller can include determining a pulse width modulation (PWM) on time duration being used for operating a voltage regulator. The controller can determine a switching frequency being used for operating the voltage regulator. The controller can determine whether the PWM on time duration is greater than or less than an on time reference. The controller can, in response to determining that the PWM on time duration is less than the on time reference, increase a voltage window for a PWM signal being used to operate the voltage regulator. The controller can, in response to determining that the PWM on time duration is greater than the on time reference, perform a frequency locked loop (FLL) to regulate the switching frequency.
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公开(公告)号：US20240295892A1
公开(公告)日：2024-09-05
申请号：US18592209
申请日：2024-02-29
Applicant: Renesas Electronics America Inc.
Inventor： John Stuart KLEINE
Abstract: A voltage regulator feedback circuit includes a first comparator, a second comparator and a logic circuit. The first comparator is configured to generate an overshoot signal based on a comparison of a voltage regulation target signal to a feedback voltage signal. The second comparator is configured to generate a forward current signal based on a comparison of the current sense amplifier voltage to a reference voltage. The logic circuit is configured to generate a breaking signal based on the overshoot signal and the forward current signal. A gate signal of a transistor connected between a second end of the inductor and a reference ground is generated based at least in part on the breaking signal and is configured to cause the transistor to open based at least in part on the breaking signal having a true value.
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公开(公告)号：US12057765B2
公开(公告)日：2024-08-06
申请号：US17707329
申请日：2022-03-29
Applicant: Renesas Electronics America Inc.
Inventor： Mengmeng Du , Matthew Alan Grant , Daniel Dahua Zheng
Abstract: Apparatuses and methods for operating a power converter are described. An integrated circuit can be integrated in a high-side driver of a high-side fiend-effect transistor (FET) of the power converter. The integrated circuit can detect a phase node voltage of a power integrated circuit. The integrated circuit can, in response to the phase node voltage being less than a threshold voltage, operate a high-side FET of the power integrated circuit in a constant-current mode. The integrated circuit can, in response to the phase node voltage being greater than the threshold voltage, operate the high-side FET of the power integrated circuit in a constant-voltage mode.
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公开(公告)号：US20240258919A1
公开(公告)日：2024-08-01
申请号：US18162932
申请日：2023-02-01
Applicant: Renesas Electronics America Inc.
Inventor： Zheyuan Tan
IPC: H02M3/158
CPC classification number: H02M3/158
Abstract: A switched-mode power supply, such as a constant on time regulator, is presented. The switched-mode power supply includes a high side power switch coupled to a low side power switch at a switching node. A ramp injection circuit is coupled to the switching node and a ramp switch is coupled to the ramp injection circuit are also provided. A driver is used to drive the high side power switch and the low side power switch and to control the ramp switch. The driver turns off the ramp switch when the switch-mode power supply enters a tri-state, and turns the ramp switch back on when the switch-mode power supply exists the tri-state. The tri-state occurs when the switched-mode power supply operates in a discontinuous current mode, when both the high side power switch and the low side power switch are turned off.
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