Abstract:
Films comprising Aluminum, carbon and a metal, wherein the aluminum is present in an amount greater than about 16% by elemental content and the film has less than about 50% carbon. Methods of forming the films comprise exposing a substrate to a metal halide precursor, purging the metal halide precursor from the processing chamber and then exposing the substrate to an alkyl aluminum precursor and an alane precursor, either sequentially or simultaneously. The alane precrursor comprises an amine-alane and a stabilizing amine selected from one or more of diemthylcyclohexylamine or dicyclomethylhexylamine.
Abstract:
Methods for filling the gap of a semiconductor feature comprising exposure of a substrate surface to a precursor and reactant and an anneal environment to decrease the wet etch rate ratio of the deposited film and fill the gap.
Abstract:
Provided are atomic layer deposition methods to deposit a film using a circular batch processing chamber with a plurality of sections separated by gas curtains so that each section independently has a process condition.
Abstract:
Methods of depositing pure metal and aluminum alloy metal films. Certain methods comprises contacting a substrate surface with first and second precursors, the first precursor comprising an aluminum precursor selected from dimethylaluminum hydride, alane coordinated to an amine, and a compound having a structure represented by: wherein R is a C1-C6 alkyl group, and the second precursor comprising a metal halide. Other methods relate to sequentially exposing a substrate to a first and second precursor, the first precursor comprising an aluminum precursor as described above, and the second precursor comprising Ti(NR′2)4 or Ta(NR′2)5, wherein R′ is an alkyl, alkenyl, alkynyl, keto or aldehyde group.
Abstract:
Methods of scaling the thickness of the interfacial layer in electronic devices, such as NMOS transistors and PMOS transistors are described. Some embodiments provide a metal film or a metal nitride film that reduces the thickness of the interfacial layer by scavenging unbound oxygen from the interfacial layer (e.g., silicon oxide (SiOx)) and the high-κ dielectric layer (e.g., hafnium oxide (HfOx)). Some embodiments advantageously include annealing the semiconductor substrate to promote or accelerate the scavenging.
Abstract:
Methods for depositing metal films using a metal halide and metal organic precursors are described. The substrate is exposed to a first metal precursor and a second metal precursor to form the metal film. The exposures can be sequential or simultaneous. The metal films are relatively pure with a low carbon content.
Abstract:
Methods of forming memory devices are described. A molybdenum silicide nucleation layer is formed, and the substrate is soaked in a titanium precursor prior to a bulk molybdenum gap fill process. In other embodiments, a molybdenum silicide film is formed in a first process cycle and a second process cycle is performed where the substrate is exposed to a titanium precursor. In further embodiments, a substrate having at least one feature thereon is exposed to a first titanium precursor and a nitrogen-containing reactant. The substrate is then soaked in a second titanium precursor, and then is exposed to a first molybdenum precursor followed by exposure to a silane to form a molybdenum silicide layer on a surface of the substrate.
Abstract:
Methods for DRAM device with a buried word line are described. The method includes forming a metal cap layer and a molybdenum conductor layer in a feature on a substrate. The method includes depositing the metal cap layer on the substrate by physical vapor deposition (PVD) and depositing the molybdenum conductor layer by atomic layer deposition (ALD) on the metal cap layer.
Abstract:
Embodiments of the disclosure are directed to PEALD batch processing chambers. Some embodiments are directed to processing chambers having one or more inductively coupled plasma (ICP) coils electrically connected to at least one RF power source. Some embodiments are directed to processing chambers having a wafer cassette comprising a plurality of platforms, each platform configured to support at least one wafer for processing, and one or more RF power sources electrically connected to the plurality of platforms in the wafer cassette. In some embodiments, the plurality of platforms have a first set of electrodes having a first polarity and a second set of electrodes having a second polarity, and one or more RF power sources electrically connected to the plurality of platforms in the wafer cassette.
Abstract:
Embodiments of the disclosure are directed to methods of depositing a molybdenum film directly on a substrate surface (e.g., a low-K dielectric material) by exposing the substrate surface to a molybdenum-containing precursor and a plasma at a temperature of less than or equal to 400° C. The molybdenum-containing precursor comprises one or more of molybdenum pentachloride (MoCl5), molybdenum dioxide dichloride (MoO2Cl2), molybdenum oxytetrachloride (MoOCl4), molybdenum hexacarbonyl, bis(tert-butylimido)-bis(dimethylamido)molybdenum, or bis(ethylbenzene) molybdenum. The plasma comprises one or more of hydrogen (H2), nitrogen (N2), or a silane (SixHy). In some embodiments, when the molybdenum-containing precursor comprises molybdenum hexafluoride (MoF6), the plasma does not include hydrogen (H2).