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81.发明申请WIRING BOARD, MOUNTING STRUCTURE EQUIPPED WITH THE WIRING BOARD, AND METHOD FOR MANUFACTURING WIRING BOARD 有权接线板，安装布线的安装结构以及制造接线板的方法公开(公告)号：US20150305154A1
公开(公告)日：2015-10-22
申请号：US14417592
申请日：2013-07-25
Applicant: KYOCERA Corporation
Inventor： Katsura HAYASHI , Keisaku MATSUMOTO
CPC classification number: H05K1/112 , H01L23/145 , H01L23/49822 , H01L23/49827 , H01L23/49894 , H01L2224/16 , H01L2224/16225 , H01L2924/15174 , H05K1/0298 , H05K1/181 , H05K3/4602 , H05K3/4655 , H05K2201/0175 , H05K2201/0195 , H05K2201/0209 , H05K2201/0269 , H05K2201/029
Abstract: A wiring board includes a first electrically-conductive layer; and a first resin layer covering the first electrically-conductive layer, the first resin layer including a resin portion and inorganic insulating particles dispersed in the resin portion. The first resin layer has a first layer region which is in contact with one main surface and side surfaces of the first electrically-conductive layer, and a second layer region which is located on a side of the first layer region which side is opposite to the first electrically-conductive layer. The inorganic insulating particles include a plurality of first inorganic insulating particles contained in the first layer region, and a plurality of second inorganic insulating particles contained in the second layer region. A content rate of the first inorganic insulating particles in the first layer region is lower than a content rate of the second inorganic insulating particles in the second layer region.
Abstract translation: 布线基板包括第一导电层; 以及覆盖第一导电层的第一树脂层，第一树脂层包括树脂部分和分散在树脂部分中的无机绝缘颗粒。 所述第一树脂层具有与所述第一导电层的一个主面和侧面接触的第一层区域和位于所述第一层区域的与所述第一导电层相反的一侧的第二层区域 第一导电层。 无机绝缘粒子包括在第一层区域中包含的多个第一无机绝缘粒子和包含在第二层区域中的多个第二无机绝缘粒子。 第一层区域中的第一无机绝缘粒子的含有率低于第二层区域中的第二无机绝缘粒子的含有率。
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公开(公告)号：US09091921B2
公开(公告)日：2015-07-28
申请号：US13569375
申请日：2012-08-08
Applicant: Takahiro Yoshida , Shouji Minegishi , Masao Arima
Inventor： Takahiro Yoshida , Shouji Minegishi , Masao Arima
CPC classification number: G03F7/095 , G03F7/004 , G03F7/0047 , H05K3/285 , H05K2201/0209 , H05K2201/0269 , H05K2201/068
Abstract: In a layered structure having at least a substrate and a photosensitive resin layer or cured film layer formed on the substrate and containing an inorganic filler, the content of the inorganic filler in the photosensitive resin layer or cured film layer is low on the side contacting the substrate and high on the surface side away from the substrate, so that a linear thermal expansion coefficient of the photosensitive resin layer or cured film layer as a whole is maintained as low as possible. Preferably, the inorganic filler content in the layer gradually increases continuously obliquely or stepwise from the side contacting the substrate to the surface side away from the substrate. A photosensitive dry film containing the above-mentioned photosensitive resin layer is suitable for use as a solder resist or an interlayer resin insulation layer of a printed wiring board.
Abstract translation: 在至少具有基板和形成在基板上并含有无机填料的感光性树脂层或固化膜层的分层结构中，感光性树脂层或固化膜层中的无机填料的含量在与 基板，并且远离基板的表面侧高，使得整个感光性树脂层或固化膜层的线性热膨胀系数保持尽可能低。 优选地，层中的无机填料含量从接触基板的表面侧离开基板的角度或逐步地逐渐增加。 含有上述感光性树脂层的感光性干膜适合用作印刷电路板的阻焊剂或层间树脂绝缘层。
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公开(公告)号：US20150185603A1
公开(公告)日：2015-07-02
申请号：US14658684
申请日：2015-03-16
Applicant: TAIYO HOLDINGS CO., LTD.
Inventor： Takahiro YOSHIDA , Shouji MINEGISHI , Masao ARIMA
IPC: G03F7/004
CPC classification number: G03F7/095 , G03F7/004 , G03F7/0047 , H05K3/285 , H05K2201/0209 , H05K2201/0269 , H05K2201/068
Abstract: In a layered structure having at least a substrate and a photosensitive resin layer or cured film layer formed on the substrate and containing an inorganic filler, the content of the inorganic filler in the photosensitive resin layer or cured film layer is low on the side contacting the substrate and high on the surface side away from the substrate, so that a linear thermal expansion coefficient of the photosensitive resin layer or cured film layer as a whole is maintained as low as possible. Preferably, the inorganic filler content in the layer gradually increases continuously obliquely or stepwise from the side contacting the substrate to the surface side away from the substrate. A photosensitive dry film containing the above-mentioned photosensitive resin layer is suitable for use as a solder resist or an interlayer resin insulation layer of a printed wiring board.
Abstract translation: 在至少具有基板和形成在基板上并含有无机填料的感光性树脂层或固化膜层的分层结构中，感光性树脂层或固化膜层中的无机填料的含量在与 基板，并且远离基板的表面侧高，使得整个感光性树脂层或固化膜层的线性热膨胀系数保持尽可能低。 优选地，层中的无机填料含量从接触基板的表面侧离开基板的角度或逐步地逐渐增加。 含有上述感光性树脂层的感光性干膜适合用作印刷电路板的阻焊剂或层间树脂绝缘层。
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公开(公告)号：US08895866B2
公开(公告)日：2014-11-25
申请号：US13741913
申请日：2013-01-15
Inventor： Steven Wang , Jin-Chang Wu , Mide Yang
CPC classification number: H05K1/0298 , H05K3/4688 , H05K2201/0209 , H05K2201/0269 , H05K2201/029 , H05K2201/068
Abstract: A printed circuit board structure includes a plurality of circuit layer plates stacked together in which each of the stacked circuit layer plates includes an epoxy resin plate body and a fabric structure completely encapsulated in the epoxy resin plate body, and each circuit layer plate stacked between two circuit layer plates is further provided with filler particles distributed in its epoxy resin plate body, and the two opposite and outermost circuit layer plates thereof have metal soldering pads on the outer surfaces of the epoxy resin plate body thereof, and the two opposite and outermost circuit layer plates do not have the filler particles in its epoxy resin plate body thereof.
Abstract translation: 印刷电路板结构包括堆叠在一起的多个电路层板，其中每个堆叠的电路层板包括环氧树脂板体和完全封装在环氧树脂板体中的织物结构，并且每个电路层板堆叠在两个 电路层板还设置有分布在其环氧树脂板体中的填料颗粒，并且其两个相对和最外面的电路层板在其环氧树脂板体的外表面上具有金属焊盘，并且两个相对和最外面的电路 层板在其环氧树脂板体中不具有填料颗粒。
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85.发明申请BUILD-UP FILM STRUCTURE, CIRCUIT BOARD MANUFACTURED USING THE SAME, AND METHOD FOR MANUFACTURING CIRCUIT BOARD USING THE SAME 审中-公开建立电影结构，使用其制造的电路板以及使用其制造电路板的方法公开(公告)号：US20140174797A1
公开(公告)日：2014-06-26
申请号：US13827310
申请日：2013-03-14
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Ji Hye SHIM , Hwa Young Lee
CPC classification number: H05K1/0373 , H05K1/036 , H05K3/4673 , H05K2201/0209 , H05K2201/0269 , Y10T428/24975 , Y10T428/2848 , Y10T428/31515
Abstract: Disclosed herein is a build-up film structure including: a core layer containing a resin and an inorganic filler; a first adhesive layer covering one surface of the core layer and having a smaller content of the inorganic filler than that of the core layer; and a second adhesive layer covering the other surface of the core layer and having a smaller content of the inorganic filler than that of the core layer.
Abstract translation: 本文公开了一种积层膜结构，包括：含有树脂和无机填料的芯层; 覆盖芯层的一个表面并且具有比芯层更小的无机填料含量的第一粘合剂层; 以及覆盖芯层的另一表面并且具有比芯层的无机填料的含量更小的第二粘合剂层。
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Patent Agency Ranking
公开(公告)号：US20140124250A1
公开(公告)日：2014-05-08
申请号：US13988499
申请日：2012-12-25
Applicant: Akito Iwasaki , Tadashi Nakamura , Tsuyoshi Himori , Kazuhiko Himori
Inventor： Akito Iwasaki , Tadashi Nakamura , Tsuyoshi Himori , Kazuhiko Himori
CPC classification number: H05K1/115 , H05K1/036 , H05K1/0366 , H05K1/092 , H05K3/00 , H05K3/0047 , H05K3/4069 , H05K3/4614 , H05K2201/0141 , H05K2201/0154 , H05K2201/0269 , H05K2201/0272 , H05K2201/0305 , H05K2203/0214 , H05K2203/0278 , H05K2203/1461 , Y10T29/49162
Abstract: A wiring board includes an electric insulating base material including an incompressible member and a thermosetting member; a first wiring and a second wiring formed with the electric insulating base material interposed therebetween; and a via-hole conductor penetrating the electric insulating base material, and electrically connecting the first wiring and the second wiring to each other. The via-hole conductor includes a resin portion and a metal portion. The metal portion includes a first metal region mainly composed of Cu; a second metal region mainly composed of a Sn—Cu alloy; and a third metal region mainly composed of Bi. The second metal region is larger than the first metal region, and larger than the third metal region.
Abstract translation: 布线板包括：电绝缘基材，包括不可压缩构件和热固性构件; 形成有绝缘基材的第一布线和第二布线; 以及穿过电绝缘基材的通孔导体，并且将第一布线和第二布线彼此电连接。 通孔导体包括树脂部分和金属部分。 金属部分包括主要由Cu组成的第一金属区域; 主要由Sn-Cu合金构成的第二金属区域; 和主要由Bi组成的第三金属区域。 第二金属区域大于第一金属区域，大于第三金属区域。
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公开(公告)号：US20140116769A1
公开(公告)日：2014-05-01
申请号：US14148323
申请日：2014-01-06
Applicant: IBIDEN CO., LTD.
Inventor： Yoshinori TAKENAKA , TAKESHI NAKAMURA , TAKAMITSU HATTORI
IPC: H05K1/11
CPC classification number: H05K1/115 , H05K3/0032 , H05K3/107 , H05K3/205 , H05K3/465 , H05K3/4661 , H05K3/4682 , H05K2201/0195 , H05K2201/0209 , H05K2201/0266 , H05K2201/0269 , H05K2201/0376 , H05K2203/025 , Y10T29/49155 , Y10T29/49204
Abstract: A printed wiring board including an insulative material, a first conductive circuit formed on the insulative material, a resin insulation layer including a first insulation layer formed on the insulative material and on the first conductive circuit and which insulates between lines of the first conductive circuit, the first insulation layer including inorganic particles having a first average diameter, and a second insulation layer formed on the first insulation layer and including a recessed portion and an opening portion, the second insulation layer including inorganic particles having a second average diameter smaller than the first average diameter, a second conductive circuit formed in the recessed portion, and a via conductor formed in the opening portion and which connects the first conductive circuit to the second conductive circuit.
Abstract translation: 1.一种印刷线路板，包括绝缘材料，形成在所述绝缘材料上的第一导电电路，树脂绝缘层，所述树脂绝缘层包括形成在所述绝缘材料上的第一绝缘层和所述第一导电电路，并且在所述第一导电电路的线之间绝缘， 所述第一绝缘层包括具有第一平均直径的无机颗粒和形成在所述第一绝缘层上并包括凹部和开口部的第二绝缘层，所述第二绝缘层包括具有小于所述第一绝缘层的第二平均直径的第二平均直径的无机颗粒 平均直径，形成在凹部中的第二导电电路，以及形成在开口部分中并将第一导电电路连接到第二导电电路的通孔导体。
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公开(公告)号：US20140110160A1
公开(公告)日：2014-04-24
申请号：US14136004
申请日：2013-12-20
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Shinichiro BANBA , Yutaka FUKUDA
CPC classification number: H05K1/115 , G01R1/203 , G01R3/00 , H05K1/0306 , H05K1/167 , H05K3/429 , H05K3/4614 , H05K3/4629 , H05K2201/0269
Abstract: A multilayer ceramic substrate includes a ceramic element body including a plurality of stacked ceramic layers, a resistor including a resistance film disposed between the ceramic layers, and a lead via conductor penetrating the ceramic layers in a thickness direction and connected at a first end portion to the resistance film. The resistance film and the lead via conductor both contain, for example, Ni and Cu that constitute an alloy resistive material. A concentration of the Ni component in the lead via conductor has a gradient structure that is comparatively high in the first end portion connected to the resistance film and gradually decreases from the first end portion toward a second end portion opposite therefrom.
Abstract translation: 多层陶瓷基板包括陶瓷元件体，该陶瓷元件体包括多个堆叠的陶瓷层，包括设置在陶瓷层之间的电阻膜的电阻器和在厚度方向上贯穿陶瓷层的引线通孔导体，并在第一端部连接到 电阻膜。 电阻膜和引线通孔导体都包含例如构成合金电阻材料的Ni和Cu。 导线通孔导体中的Ni成分的浓度在与电阻膜连接的第一端部具有比较高的梯度结构，并且从第一端部向与其相反的第二端部逐渐减小。
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公开(公告)号：US20140041903A1
公开(公告)日：2014-02-13
申请号：US13741913
申请日：2013-01-15
Inventor： Steven Wang , Jin-Chang Wu , Mide Yang
IPC: H05K1/02
CPC classification number: H05K1/0298 , H05K3/4688 , H05K2201/0209 , H05K2201/0269 , H05K2201/029 , H05K2201/068
Abstract: A printed circuit board structure includes a plurality of circuit layer plates stacked together in which each of the stacked circuit layer plates includes an epoxy resin plate body and a fabric structure completely encapsulated in the epoxy resin plate body, and each circuit layer plate stacked between two circuit layer plates is further provided with filler particles distributed in its epoxy resin plate body, and the two opposite and outermost circuit layer plates thereof have metal soldering pads on the outer surfaces of the epoxy resin plate body thereof, and the two opposite and outermost circuit layer plates do not have the filler particles in its epoxy resin plate body thereof.
Abstract translation: 印刷电路板结构包括堆叠在一起的多个电路层板，其中每个堆叠的电路层板包括环氧树脂板体和完全封装在环氧树脂板体中的织物结构，并且每个电路层板堆叠在两个 电路层板还设置有分布在其环氧树脂板体中的填料颗粒，并且其两个相对和最外面的电路层板在其环氧树脂板体的外表面上具有金属焊盘，并且两个相对和最外面的电路 层板在其环氧树脂板体中不具有填料颗粒。
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公开(公告)号：US08484839B2
公开(公告)日：2013-07-16
申请号：US13427184
申请日：2012-03-22
Applicant: Pui-Yan Lin , Govindasamy Paramasivam Rajendran , George Elias Zahr
Inventor： Pui-Yan Lin , Govindasamy Paramasivam Rajendran , George Elias Zahr
CPC classification number: H01L23/49894 , H01L2924/0002 , H01L2924/3011 , H05K1/0271 , H05K3/108 , H05K3/4661 , H05K2201/0209 , H05K2201/0269 , H05K2201/068 , Y10T29/49126 , Y10T29/49156 , Y10T29/49165 , Y10T428/24917 , Y10T428/25 , Y10T428/2998 , Y10T428/31515 , Y10T428/31518 , Y10T428/31529 , H01L2924/00
Abstract: Provided are processes for making multi-layer chip carriers comprising an asymmetric cross-linked polymeric dielectric film.
Abstract translation: 提供了制造包含不对称交联聚合物电介质膜的多层芯片载体的方法。
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