公开(公告)号：US08592994B2

公开(公告)日：2013-11-26

申请号：US12517551

申请日：2007-12-05

Applicant: Kenya Tachibana ,  Masahiro Wada ,  Hitoshi Kawaguchi ,  Kensuke Nakamura

Inventor： Kenya Tachibana ,  Masahiro Wada ,  Hitoshi Kawaguchi ,  Kensuke Nakamura

IPC: H01L23/48

CPC classification number: H01L21/563 ,  C08L63/00 ,  H01L23/293 ,  H01L23/3735 ,  H01L23/3737 ,  H01L23/49822 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H05K1/0271 ,  H05K3/305 ,  H05K3/4602 ,  H05K2201/068 ,  H05K2201/10674 ,  H05K2201/10977 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A flip-chip semiconductor package includes a circuit board having a core layer and at least one buildup layer, a semiconductor device connected to the circuit board through a metal bump, and a cured member that is made of a sealing resin composition and enclosed between the semiconductor device and the circuit board. The coefficient of linear expansion at 25 to 75° C. of the cured member is 15 to 35 ppm/° C., the glass transition temperature of at least one buildup layer is 170° C. or more, and the coefficient of linear expansion of at 25 to 75° C. of the at least one buildup layer in the planar direction is 25 ppm or less. A highly reliable flip-chip semiconductor package, buildup layer material, core layer material, and sealing resin composition can be provided by preventing cracks and inhibiting delamination.

Abstract translation: 倒装芯片半导体封装包括具有芯层和至少一个堆积层的电路板，通过金属凸块连接到电路板的半导体器件，以及由密封树脂组合物制成的封装在其间的固化构件 半导体器件和电路板。 固化部件的25〜75℃的线膨胀系数为15〜35ppm /℃，至少一层积层的玻璃化转变温度为170℃以上，线膨胀系数 在平面方向上的至少一个堆积层的25〜75℃为25ppm以下。 可以通过防止裂纹和抑制分层而提供高度可靠的倒装芯片半导体封装，堆积层材料，芯层材料和密封树脂组合物。

公开(公告)号：US20130256022A1

公开(公告)日：2013-10-03

申请号：US13748182

申请日：2013-01-23

Applicant: FUJITSU LIMITED

Inventor： Hiroshi KOBAYASHI ,  Naoki ISHIKAWA ,  Satoshi EMOTO ,  Toru OKADA ,  Takumi MASUYAMA

IPC: H05K1/02

CPC classification number: H05K1/0271 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/3436 ,  H05K2201/068 ,  H05K2201/10734 ,  H05K2201/2009 ,  H01L2924/00012

Abstract: A wiring board assembly includes: a plurality of insulating substrates of which each includes an insulating layer and a wiring layer; a wiring board that includes pads formed on the insulating substrate; and a semiconductor component that is joined on the pads by using solder bumps. The wiring board embeds a stiffening member whose thickness is thinner than that of the insulating layer and whose thermal expansion coefficient is smaller and Young's modulus is higher than those of the wiring layer and the insulating layer.

Abstract translation: 布线基板组件包括：多个绝缘基板，每个绝缘基板包括绝缘层和布线层; 布线板，其包括形成在所述绝缘基板上的焊盘; 以及通过使用焊料凸块接合在焊盘上的半导体部件。 布线板嵌入厚度比绝缘层薄的加强构件，其热膨胀系数较小，杨氏模量高于布线层和绝缘层。

公开(公告)号：US20130149515A1

公开(公告)日：2013-06-13

申请号：US13706479

申请日：2012-12-06

Applicant: SK INNOVATION CO., LTD.

Inventor： Byoung Wook JO ,  Young Do KIM ,  Seung Jeong KOOK

IPC: H05K1/03

CPC classification number: H05K1/0393 ,  B32B2307/734 ,  B32B2311/00 ,  B32B2379/08 ,  B32B2457/08 ,  C08G73/1042 ,  C08G73/105 ,  C08G73/1067 ,  C08G73/1071 ,  C09D179/08 ,  H05K1/0346 ,  H05K1/036 ,  H05K3/022 ,  H05K2201/0154 ,  H05K2201/0195 ,  H05K2201/068 ,  Y10T428/24942 ,  Y10T428/24975

Abstract: Provided is a multilayer polyimide flexible metal-clad laminate where multiple layers of polyimide are structured on one surface or two surfaces of a metal foil, the multilayer polyimide flexible metal-clad laminate including: multiple layers of polyimide having different coefficients of linear thermal expansion; and gradient layers each formed between polyimide layers of the multiple layers of polyimide, the gradient layer having a gradual change in coefficient of linear thermal expansion between the polyimide layers, and a manufacturing method thereof, so that there can be provided a flexible metal-clad laminate for a printed circuit board capable of solving a delamination problem between the polyimide layers and having excellent dimensional stability.

Abstract translation: 提供一种多层聚酰亚胺柔性金属包覆层压板，其中多层聚酰亚胺构成在金属箔的一个或多个表面上，多层聚酰亚胺柔性金属覆层层压板包括：具有不同线性热膨胀系数的多层聚酰亚胺; 以及在多层聚酰亚胺的聚酰亚胺层之间形成的梯度层，该梯度层具有聚酰亚胺层之间的线性热膨胀系数的逐渐变化及其制造方法，从而可以提供柔性金属包层 用于能够解决聚酰亚胺层之间的分层问题并且具有优异的尺寸稳定性的印刷电路板的层压体。

公开(公告)号：US20130146344A1

公开(公告)日：2013-06-13

申请号：US13664901

申请日：2012-10-31

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jeong Kyu LEE ,  Jin Seok Moon ,  Keun Yong Lee

IPC: C08L67/00 ,  C08L65/00 ,  H05K1/02 ,  C08L63/00

CPC classification number: C08L67/00 ,  C08G59/08 ,  C08G59/3227 ,  C08G59/621 ,  C08G63/6856 ,  C08G63/6926 ,  C08G69/42 ,  C08G2261/3424 ,  C08J5/24 ,  C08J2363/00 ,  C08L63/00 ,  C08L65/00 ,  C08L77/10 ,  C08L77/12 ,  H05K1/0213 ,  H05K1/0346 ,  H05K1/0353 ,  H05K2201/0141 ,  H05K2201/068 ,  Y10T428/31522 ,  C08L79/04

Abstract: Disclosed herein is an insulating resin composition for a printed circuit board, including 40 to 70 wt % of a liquid crystal oligomer shown in formula 1, 10 to 30 wt % of an epoxy resin, 10 to 30 wt % of a cyanate-based resin, and 0.1 to 0.5 wt % of a curing catalyst, and a printed circuit board including the same.According to an exemplary embodiment of the present invention, the printed circuit board has electric, thermal, and mechanical stabilities even though the printed circuit board is reduced in weight, thickness, and size. Further, a stable driving property is ensured, dielectricity is low, and attachment strength, chemical resistance, and warpage property are excellent during a board process in the related art.

Abstract translation: 本发明公开了一种用于印刷电路板的绝缘树脂组合物，其包含40至70重量％的式1所示的液晶低聚物，10至30重量％的环氧树脂，10至30重量％的氰酸酯基树脂 ，和0.1〜0.5重量％的固化催化剂，以及包含该固化催化剂的印刷电路板。 根据本发明的示例性实施例，即使印刷电路板的重量，厚度和尺寸减小，印刷电路板也具有电，热和机械稳定性。 此外，相关技术中的板工艺中，确保了稳定的驱动性能，电介质性低，附着强度，耐化学性和翘曲性优异。

公开(公告)号：US20130098669A1

公开(公告)日：2013-04-25

申请号：US13629660

申请日：2012-09-28

Applicant: Fujitsu Limited

Inventor： Hideaki YOSHIMURA

IPC: H05K1/03 ,  H05K3/42

CPC classification number: H05K1/0353 ,  H05K1/0271 ,  H05K3/427 ,  H05K3/445 ,  H05K2201/0323 ,  H05K2201/068 ,  H05K2201/0959 ,  Y10T29/49165

Abstract: A wiring substrate includes: a plate-like base material containing carbon fibers; a wiring layer formed on a surface of the base material; a first via including a first through hole penetrating through the base material, a first resin layer formed on an inner wall of the first through hole and including a second through hole, and a first conductive layer formed on an inner wall of the second through hole; and a second via including a third through hole penetrating through the base material and a second conductive layer formed on an inner wall of the third through hole, wherein an inside diameter of the third through hole is greater than an inside diameter of the second through hole.

Abstract translation: 布线基板包括：含有碳纤维的板状基材; 形成在所述基材的表面上的布线层; 包括穿过所述基材的第一通孔的第一通孔，形成在所述第一通孔的内壁上并包括第二通孔的第一树脂层，以及形成在所述第二通孔的内壁上的第一导电层 ; 以及第二通孔，其包括穿过所述基材的第三通孔和形成在所述第三通孔的内壁上的第二导电层，其中所述第三通孔的内径大于所述第二通孔的内径 。

公开(公告)号：US20130075147A1

公开(公告)日：2013-03-28

申请号：US13535532

申请日：2012-06-28

Applicant: Tetsuo Amano ,  Toshio Nishiwaki

Inventor： Tetsuo Amano ,  Toshio Nishiwaki

IPC: H05K1/11

CPC classification number: H05K1/0306 ,  H05K1/0219 ,  H05K1/024 ,  H05K1/0271 ,  H05K1/0373 ,  H05K1/09 ,  H05K1/115 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4655 ,  H05K2201/0145 ,  H05K2201/0209 ,  H05K2201/068 ,  H05K2201/096

Abstract: A printed wiring board includes a core insulation layer including a resin and having a via conductor through the core insulation layer, a first conductive layer formed on the core layer and including a copper foil and a plated film, an interlayer insulation layer formed on the first layer and including a resin, the interlayer layer having a via conductor through the interlayer layer, and a second conductive layer formed on the interlayer layer and including a copper foil and a plated film. The first layer includes a conductive circuit, the core and interlayer layers have dielectric constants of 4.0 or lower for signal transmission at frequency of 1 GHz and thermal expansion coefficient of 85 ppm/° C. or lower at or below Tg, and the foil of the first layer has thickness greater than thickness of the foil of the second layer.

公开(公告)号：US08373428B2

公开(公告)日：2013-02-12

申请号：US12535070

申请日：2009-08-04

Applicant: Benjamin N. Eldridge ,  Gary W. Grube ,  Igor Y. Khandros ,  Gaetan L. Mathieu

Inventor： Benjamin N. Eldridge ,  Gary W. Grube ,  Igor Y. Khandros ,  Gaetan L. Mathieu

IPC: G01R31/00

CPC classification number: B23K20/004 ,  B23K2101/40 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D21/02 ,  G01R1/07342 ,  G01R1/07378 ,  G01R31/2884 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L22/20 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/72 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/45144 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4015 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49155 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A probe card assembly includes a probe card, a space transformer having resilient contact structures (probe elements) mounted directly to (i.e., without the need for additional connecting wires or the like) and extending from terminals on a surface thereof, and an interposer disposed between the space transformer and the probe card. The space transformer and interposer are “stacked up” so that the orientation of the space transformer, hence the orientation of the tips of the probe elements, can be adjusted without changing the orientation of the probe card. Suitable mechanisms for adjusting the orientation of the space transformer, and for determining what adjustments to make, are disclosed. The interposer has resilient contact structures extending from both the top and bottom surfaces thereof, and ensures that electrical connections are maintained between the space transformer and the probe card throughout the space transformer's range of adjustment, by virtue of the interposer's inherent compliance. Multiple die sites on a semiconductor wafer are readily probed using the disclosed techniques, and the probe elements can be arranged to optimize probing of an entire wafer. Composite interconnection elements having a relatively soft core overcoated by a relatively hard shell, as the resilient contact structures are described.

Abstract translation: 探针卡组件包括探针卡，具有弹性接触结构（探针元件）的空间变换器，其直接安装到（即，不需要额外的连接线等）并且从其表面上的端子延伸，并且设置有插入器 空间变压器和探针卡之间。 空间变换器和插入器被堆叠，使得可以调节空间变换器的取向，从而可以调节探针元件的尖端的取向而不改变探针卡的取向。 公开了用于调整空间变换器的取向以及用于确定进行什么调整的适当机构。 插入器具有从其顶表面和底表面延伸的弹性接触结构，并且确保通过插入件的固有顺应性，在整个空间变压器的调节范围内在空间变压器和探针卡之间保持电连接。 使用所公开的技术容易地探测半导体晶片上的多个裸片位置，并且可以布置探针元件以优化整个晶片的探测。 作为弹性接触结构的描述，具有由相对硬的外壳覆盖的相对软的芯的复合互连元件。

公开(公告)号：US20130015582A1

公开(公告)日：2013-01-17

申请号：US13637296

申请日：2011-02-24

Applicant: Masayoshi Kondo ,  Natsuki Makino ,  Daisuke Fujiwara ,  Yuka Ito

Inventor： Masayoshi Kondo ,  Natsuki Makino ,  Daisuke Fujiwara ,  Yuka Ito

IPC: H01L23/48 ,  H01L21/78

CPC classification number: H01L23/49816 ,  H01L23/49811 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K3/285 ,  H05K2201/068 ,  H05K2201/09136 ,  H01L2924/00

Abstract: A circuit board (1) exhibits an average coefficient of thermal expansion (A) of the first insulating layer (21) in the direction along the substrate surface in a temperature range from 25 degrees C. to its glass transition point of equal to or higher than 3 ppm/degrees C. and equal to or lower than 30 ppm/degrees C. Further, an average coefficient of thermal expansion (B) of the second insulating layer (23) in the direction along the substrate surface in a temperature range from 25 degrees C. to its glass transition point is equivalent to an average coefficient of thermal expansion (C) of the third insulating layer (25) in the direction along the substrate surface in a temperature range from 25 degrees C. to its glass transition point. (B) and (C) are larger than (A), and a difference between (A) and (B) and a difference between (A) and (C) are equal to or higher than 5 ppm/degrees C. and equal to or lower than 35 ppm/degrees C.

Abstract translation: 电路板（1）在25℃至其玻璃化转变点的温度范围内，沿着基板表面的方向显示第一绝缘层（21）的平均热膨胀系数（A） 在3ppm /℃以上且30ppm /℃以下的温度范围内。另外，第二绝缘层（23）的沿着基板表面的方向的平均热膨胀系数（B）在 25℃至其玻璃化转变点相当于在25℃至其玻璃化转变点的温度范围内沿着衬底表面的方向上的第三绝缘层（25）的平均热膨胀系数（C） 。 （B）和（C）大于（A），（A）和（B）之间的差异以及（A）和（C）之间的差异等于或高于5ppm /℃。 至35ppm /℃以下

公开(公告)号：US08324740B2

公开(公告)日：2012-12-04

申请号：US12707927

申请日：2010-02-18

Applicant: Kiyomi Hagihara

Inventor： Kiyomi Hagihara

IPC: H01L23/48

CPC classification number: H05K1/113 ,  H01L21/563 ,  H01L23/498 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/16237 ,  H01L2224/17 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81011 ,  H01L2224/81054 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/8191 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/0106 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K1/0271 ,  H05K3/3436 ,  H05K3/4602 ,  H05K3/4688 ,  H05K2201/0129 ,  H05K2201/068 ,  H05K2201/09036 ,  H05K2201/094 ,  H05K2201/09436 ,  H05K2201/09709 ,  H05K2201/10674 ,  H05K2203/063 ,  Y10T29/49155 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor device includes a multilayer wiring board and a semiconductor chip mounted on the multilayer wiring board. Electrode pads of the semiconductor chip include: first electrode pads including electrode pads respectively disposed in the vicinity of corners of the back surface of the semiconductor chip; and second electrode pads other than the first electrode pads. Connection pads of the multilayer wiring board include: first connection pads connected to the first electrode pads via bumps; and second connection pads connected to the second electrode pads via bumps. The first connection pads are supported by a first insulating region made of a thermoplastic resin, and the second connection pads are supported by a second insulating region made of a thermosetting resin.

Abstract translation: 半导体器件包括多层布线板和安装在多层布线板上的半导体芯片。 半导体芯片的电极焊盘包括：第一电极焊盘，包括分别设置在半导体芯片的背面的角部附近的电极焊盘; 以及除了第一电极焊盘之外的第二电极焊盘。 多层布线板的连接焊盘包括：通过凸块连接到第一电极焊盘的第一连接焊盘; 以及通过凸块连接到第二电极焊盘的第二连接焊盘。 第一连接焊盘由热塑性树脂制成的第一绝缘区域支撑，第二连接焊盘由由热固性树脂制成的第二绝缘区域支撑。

公开(公告)号：US08318315B2

公开(公告)日：2012-11-27

申请号：US12745712

申请日：2008-12-08

Applicant: Hong Yoo ,  Daenyoun Kim ,  Cheolho Kim ,  Byoungwook Jo

Inventor： Hong Yoo ,  Daenyoun Kim ,  Cheolho Kim ,  Byoungwook Jo

IPC: B32B15/08 ,  B32B27/00 ,  B32B7/02

CPC classification number: H05K1/0346 ,  H05K1/036 ,  H05K2201/0154 ,  H05K2201/0355 ,  H05K2201/068 ,  Y10T428/24942 ,  Y10T428/2495 ,  Y10T428/31681 ,  Y10T428/31721

Abstract: The present invention relates to a flexible metal-clad laminate for a printed circuit board and a method of manufacturing the same. The flexible metal-clad laminate includes: a first polyimide layer that is disposed on one surface of the metal-clad and has thermal expansion coefficient of 20 ppm/K or less; and a second polyimide layer that is disposed on one surface of the first polyimide layer and has thermal expansion coefficient of 20 ppm/K or more, wherein a difference between the thermal expansion coefficients of the first and second polyimide layers is within 5 ppm/K and a glass transition temperature Tg of resin of the first polyimide layer is 300° C.

Abstract translation: 本发明涉及一种用于印刷电路板的柔性覆金属层压板及其制造方法。 柔性覆金属层压板包括：第一聚酰亚胺层，其设置在金属包层的一个表面上，并且具有20ppm / K以下的热膨胀系数; 以及第二聚酰亚胺层，其设置在所述第一聚酰亚胺层的一个表面上，并且具有20ppm / K以上的热膨胀系数，其中所述第一和第二聚酰亚胺层的热膨胀系数之间的差在5ppm / K以内 并且第一聚酰亚胺层的树脂的玻璃化转变温度Tg为300℃