公开(公告)号：US20070278661A1

公开(公告)日：2007-12-06

申请号：US11464666

申请日：2006-08-15

Applicant: Chi-Hsing Hsu

Inventor： Chi-Hsing Hsu

IPC: H01L23/12

CPC classification number: H05K1/0221 ,  H05K3/005 ,  H05K3/4644 ,  H05K3/465 ,  H05K2201/09809 ,  H05K2203/0108 ,  H05K2203/0733

Abstract: A circuit board and a manufacturing method thereof are provided. First, the circuit board has a coaxial signal trace that comprises a conductive line and conductive wall. The conductive wall surrounds part or all of the conductive line. Additionally, the circuit board has a plurality of circuit layers where the coaxial signal trace is located. Secondly, the method for manufacturing the circuit board has several steps including using a module to form a pattern that is made for the circuit layers where part of the conductive wall is encompassed. In the end, through the present invention, the problems from the high frequency signal transmission in electronic apparatus can be solved or reduced.

Abstract translation: 提供一种电路板及其制造方法。 首先，电路板具有包括导电线和导电壁的同轴信号迹线。 导电壁围绕导电线的一部分或全部。 此外，电路板具有同轴信号迹线所在的多个电路层。 其次，制造电路板的方法有几个步骤，包括使用模块来形成为导电壁的一部分包围的电路层制成的图案。 最后，通过本发明，可以解决或减少电子设备中的高频信号传输的问题。

公开(公告)号：US20070246253A1

公开(公告)日：2007-10-25

申请号：US11631638

申请日：2005-07-05

Applicant: Masami Yakabe ,  Kenichi Kagawa ,  Tomohisa Hoshino

Inventor： Masami Yakabe ,  Kenichi Kagawa ,  Tomohisa Hoshino

IPC: H05K1/11 ,  H05K3/10

CPC classification number: H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/552 ,  H01L2223/6622 ,  H01L2924/0002 ,  H05K1/0222 ,  H05K1/0306 ,  H05K3/423 ,  H05K2201/09809 ,  H05K2203/0733 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A through substrate which comprises a silicon substrate (10) having a through hole (19) penetrating a front surface (11) and a back surface (12), a oxidized silicon film (13) being provided along the inner wall surface of the through hole (19), layers (14, 15) comprising Zn and Cu, respectively, being formed on the inner wall surface of the oxidized silicon film (13), and a Cu plating layer (18) which has been grown from a Cu seed layer (17) along the inner wall surface of layers (14, 15) comprising Zn and Cu, respectively, via an insulating layer (16) between them. The above through substrate can provide a through electrode capable of avoiding the noise due to the cross talk.

Abstract translation: 一种贯穿基板，包括具有贯通前表面（11）和后表面（12）的通孔（19）的硅基板（10），沿着贯通孔的内壁表面设置的氧化硅膜（13） 分别形成在氧化硅膜（13）的内壁面上的包含Zn和Cu的层（14,15），以及从Cu种子生长的Cu镀层（18） 层（17）分别经由它们之间的绝缘层（16）沿着包括Zn和Cu的层（14,15）的内壁表面。 上述通过基板可以提供能够避免由于串扰引起的噪声的通孔电极。

公开(公告)号：US20070222021A1

公开(公告)日：2007-09-27

申请号：US11373223

申请日：2006-03-10

Applicant: Jun Yao

Inventor： Jun Yao

IPC: H01L29/00

CPC classification number: H01L23/48 ,  H01L23/481 ,  H01L23/552 ,  H01L2223/6622 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0222 ,  H05K1/0239 ,  H05K1/115 ,  H05K3/4602 ,  H05K2201/0959 ,  H05K2201/09645 ,  H05K2201/09809 ,  H01L2924/00

Abstract: A shielded through-via that reduces the effect of parasitic capacitance between the through-via and surrounding wafer while providing high isolation from neighboring signals. A shield electrode is formed in the insulating region and spaced apart from the through-via. A coupling element couples at least the time-varying portion of the signal carried on the through-via to the shield electrode. This reduces the effect of any parasitic capacitance between the through-via and the shield electrode, hence the surrounding wafer.

Abstract translation: 一种屏蔽通孔，可减少通孔和周围晶片之间的寄生电容的影响，同时提供与相邻信号的高隔离度。 屏蔽电极形成在绝缘区域中并且与通孔间隔开。 耦合元件至少将通孔上承载的信号的时变部分耦合到屏蔽电极。 这减少了通孔和屏蔽电极之间的任何寄生电容的影响，从而降低了周围的晶片。

公开(公告)号：US20070221403A1

公开(公告)日：2007-09-27

申请号：US11620430

申请日：2007-01-05

Applicant: Chia-Hsing Chou ,  Chih-Yi Huang

Inventor： Chia-Hsing Chou ,  Chih-Yi Huang

IPC: H05K1/11 ,  H01R12/04

CPC classification number: H01R13/22 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01R12/52 ,  H05K1/0219 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/09809 ,  H05K2201/10234

Abstract: A signal transmission structure including a first signal pad, a first reference plane surrounding the first signal pad, a second signal pad, a second reference plane surrounding the second signal pad, an electric conductive element, and a conductive wall is provided. The second reference plane is parallel to the first reference plane, and the electrical conductive element is connected between the first signal pad and the second signal pad to transmit a signal. The conductive wall is connected between the first reference plane and the second reference plane and surrounding the electrical conductive element. Furthermore, a package structure applying to the signal transmission structure and a bonding method thereof are provided.

Abstract translation: 提供包括第一信号焊盘，围绕第一信号焊盘的第一参考平面，第二信号焊盘，围绕第二信号焊盘的第二参考平面，导电元件和导电壁的信号传输结构。 第二参考平面平行于第一参考平面，并且导电元件连接在第一信号焊盘和第二信号焊盘之间以传输信号。 导电壁连接在第一参考平面和第二参考平面之间并且围绕导电元件。 此外，提供了应用于信号传输结构的封装结构及其接合方法。

公开(公告)号：US07274271B2

公开(公告)日：2007-09-25

申请号：US11162041

申请日：2005-08-26

Applicant: Sheng-Yuan Lee

Inventor： Sheng-Yuan Lee

IPC: H01P5/02 ,  H01P1/04

CPC classification number: H05K1/0243 ,  H01P5/085 ,  H05K1/0219 ,  H05K3/429 ,  H05K2201/09809 ,  H05K2201/10189

Abstract: A signal transmission structure is provided. The signal transmission structure includes a circuit board, a coaxial cable connector, and a conductive layer; the aforementioned circuit board includes at least one alignment through hole, a signal pad, and a signal trace connected to the signal pad. Additionally, the signal pad and the signal trace are disposed on a surface of the circuit board. In addition, the alignment through hole passes through the circuit board. The coaxial cable connector is located on a surface of the circuit board. The coaxial cable connector has a signal pin and at least an alignment pin, and the alignment pin is inserted into the alignment through hole. The conductive layer is located between one end of the signal pin and the signal pad, and the signal pin is electrically connected to the signal pad via the conductive layer.

Abstract translation: 提供了一种信号传输结构。 信号传输结构包括电路板，同轴电缆连接器和导电层; 上述电路板包括至少一个对准通孔，信号焊盘和连接到信号焊盘的信号迹线。 此外，信号焊盘和信号迹线设置在电路板的表面上。 此外，对准通孔穿过电路板。 同轴电缆连接器位于电路板的表面上。 同轴电缆连接器具有信号针和至少一个对准销，并且对准销插入到对准通孔中。 导电层位于信号引脚的一端和信号焊盘之间，信号引脚通过导电层电连接到信号焊盘。

公开(公告)号：US20070207636A1

公开(公告)日：2007-09-06

申请号：US11670559

申请日：2007-02-02

Applicant: Hiroki Funato ,  Takashi Suga ,  Tsutomu Hara

Inventor： Hiroki Funato ,  Takashi Suga ,  Tsutomu Hara

IPC: H01R12/00

CPC classification number: G01R31/001 ,  H05K1/0268 ,  H05K1/165 ,  H05K3/429 ,  H05K2201/09809 ,  H05K2201/10969

Abstract: A circuit board having: a through hole to mount the circuit board to a casing or an electronic apparatus; and a coil-shaped conductive pattern provided on a plane perpendicular to the through hole so as to intersect a circumference around the through hole as a center.

Abstract translation: 一种电路板，具有：用于将电路板安装到壳体或电子设备的通孔; 以及设置在垂直于通孔的平面上的线圈状导电图案，以与通孔周围相交的圆周为中心。

公开(公告)号：US20070205847A1

公开(公告)日：2007-09-06

申请号：US10598134

申请日：2005-03-09

Applicant: Taras Kushta ,  Kaoru Narita ,  Hirokazu Tohya ,  Takanori Saeki ,  Tomoyuki Kaneko

Inventor： Taras Kushta ,  Kaoru Narita ,  Hirokazu Tohya ,  Takanori Saeki ,  Tomoyuki Kaneko

IPC: H01P5/02

CPC classification number: H05K1/0222 ,  H05K1/0269 ,  H05K3/429 ,  H05K2201/09536 ,  H05K2201/09618 ,  H05K2201/09718 ,  H05K2201/09809

Abstract: A via transmission line for a multilayer printed circuit board (PCB) in which a wave guiding channel is formed by a signal via or a number of signal vias, an assembly of ground vias surrounding the signal via or corresponding number of coupled signal vias, a set of ground plates from conductor layers of the multilayer PCB, and a clearance hole. In this via transmission line, the signal via, or the number of signal vias forms an inner conductive boundary, ground vias and ground plates from conductor layers of the multilayer PCB form an outer conductive boundary, and the clearance hole provides both isolation of the inner conductive boundary from the outer conductive boundary and high-performance broadband operation of the via transmission line by means of the predetermined clearance hole cross-sectional shape and dimensions where the cross-sectional shape of the clearance hole is defined by the arrangement of ground vias in the outer conductive boundary and dimensions of the clearance hole are determined according to a method to minimize frequency-dependent return losses caused by specific corrugations of the outer conductive boundary formed by ground plates in the wave guiding channel of the via transmission line.

Abstract translation: 一种用于多层印刷电路板（PCB）的通孔传输线，其中通过信号通道或多个信号通路形成波导通道，围绕信号通孔或相应数量的耦合信号通孔的接地通孔的组件， 多层PCB的导体层的接地板组以及间隙孔。 在这个通过传输线路中，信号通孔或信号通道的数量形成内部导电边界，从多层PCB的导体层形成的接地孔和接地板形成外部导电边界，并且间隙孔提供内部 通过外部导电边界的导电边界和通孔传输线的高性能宽带操作，借助于预定的间隙孔横截面形状和尺寸，其中间隙孔的横截面形状由接地通孔的布置 根据通过在通孔传输线的波导通道中由接地板形成的外导电边界的特定波纹引起的频率相关的返回损耗的方法来确定间隙孔的外导电边界和尺寸。

公开(公告)号：US20070194431A1

公开(公告)日：2007-08-23

申请号：US11359863

申请日：2006-02-22

Applicant: David Corisis ,  Lee Kuan ,  Chin Chong

Inventor： David Corisis ,  Lee Kuan ,  Chin Chong

IPC: H01L23/04 ,  H05K1/00

CPC classification number: H05K1/115 ,  G01R31/026 ,  G06F1/16 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2223/6638 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0221 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/0296 ,  H05K1/18 ,  H05K3/42 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/09672 ,  H05K2201/09809 ,  Y10T29/49165 ,  H01L2924/00

Abstract: Electronic devices include a substrate with first and second pairs of conductive traces extending in or on the substrate. A first conductive interconnecting member extends through a hole in the substrate and communicates electrically with a first trace of each of the first and second pairs, while a second conductive interconnecting member extends through the hole and communicates electrically with the second trace of each of the first and second pairs. The first and second interconnecting members are separated from one another by a distance substantially equal to a distance separating the conductive traces in each pair. Electronic device assemblies include a transmitting device configured to transmit a differential signal through a conductive structure to a receiving device. The conductive structure includes first and second pair of conductive traces with first and second interconnecting members providing electrical communication therebetween.

Abstract translation: 电子器件包括具有在衬底中或衬底上延伸的第一和第二对导电迹线的衬底。 第一导电互连构件延伸穿过衬底中的孔并且与第一和第二对中的每一个的第一迹线电连通，而第二导电互连构件延伸穿过孔并与第一导电互连构件中的每一个的第二迹线电连通 和第二对。 第一和第二互连构件彼此间隔开距离，该距离基本上等于分隔每对导电迹线的距离。 电子设备组件包括被配置为通过导电结构将差分信号传输到接收设备的发送设备。 导电结构包括第一和第二对导电迹线，其中第一和第二互连构件之间提供电连通。

公开(公告)号：US20070187141A1

公开(公告)日：2007-08-16

申请号：US11354515

申请日：2006-02-15

Applicant: Victor Bartholomew

Inventor： Victor Bartholomew

IPC: H05K1/11 ,  H01R12/04

CPC classification number: H05K1/117 ,  H05K1/029 ,  H05K1/0293 ,  H05K1/116 ,  H05K3/3405 ,  H05K2201/0305 ,  H05K2201/049 ,  H05K2201/0949 ,  H05K2201/09809 ,  H05K2201/10189 ,  H05K2201/10356 ,  H05K2203/173

Abstract: A circuit board for transitioning a cable to a connector comprises a circuit board having an outer surface. A circuit trace provided on the outer surface has a cable pad and a contact pad provided at different ends of the outer surface. A ground plane is held by the circuit board. A ground link on the outer surface is connected to the ground plane. The circuit trace and the ground link are located immediately adjacent one another. A resistive coating is provided over the circuit trace and the outer surface of the circuit board. The resistive coating has a mask aperture there-through exposing an uncoated portion of the circuit trace and exposing the ground link to the ground plane. A conductive jumper material is provided on the uncoated portion of the circuit trace and the ground link to render the circuit trace electrically common with the ground plane.

Abstract translation: 用于将电缆转换到连接器的电路板包括具有外表面的电路板。 设置在外表面上的电路迹线具有电缆焊盘和设置在外表面的不同端部处的接触焊盘。 接地层由电路板固定。 外表面上的接地连接到接地层。 电路迹线和接地链路彼此紧邻。 在电路迹线和电路板的外表面上提供电阻涂层。 电阻涂层在其上具有掩模孔，通过暴露电路迹线的未涂覆部分并将接地链路暴露于接地平面。 在电路迹线的未涂覆部分和接地链路上提供导电跳线材料，以使电路迹线与地平面电共同。

公开(公告)号：US20070152782A1

公开(公告)日：2007-07-05

申请号：US11637629

申请日：2006-12-12

Applicant: David Sherrer ,  John Fisher

Inventor： David Sherrer ,  John Fisher

IPC: H01P3/06

CPC classification number: H01P3/06 ,  H01P1/08 ,  H01P3/00 ,  H01P5/103 ,  H01P5/183 ,  H01P11/002 ,  H01P11/003 ,  H01P11/005 ,  H05K1/0221 ,  H05K1/0272 ,  H05K3/4644 ,  H05K3/4685 ,  H05K2201/09809 ,  Y10T29/49117 ,  Y10T29/49123

Abstract: Provided are coaxial waveguide microstructures. The microstructures include a substrate and a coaxial waveguide disposed above the substrate. The coaxial waveguide includes: a center conductor; an outer conductor including one or more walls, spaced apart from and disposed around the center conductor; one or more dielectric support members for supporting the center conductor in contact with the center conductor and enclosed within the outer conductor; and a core volume between the center conductor and the outer conductor, wherein the core volume is under vacuum or in a gas state. Also provided are methods of forming coaxial waveguide microstructures by a sequential build process and hermetic packages which include a coaxial waveguide microstructure.

Abstract translation: 提供同轴波导微结构。 微结构包括设置在衬底上方的衬底和同轴波导。 同轴波导包括：中心导体; 包括一个或多个壁的外导体，与中心导体间隔开并设置在中心导体周围; 一个或多个电介质支撑构件，用于支撑与中心导体接触并封闭在外部导体内的中心导体; 以及中心导体和外部导体之间的芯体积，其中芯体积处​​于真空状态或气体状态。 还提供了通过顺序构建工艺形成同轴波导微结构的方法和包括同轴波导微结构的密封封装。