公开(公告)号：US09171716B2

公开(公告)日：2015-10-27

申请号：US14505290

申请日：2014-10-02

Applicant: ASM Japan K.K.

Inventor： Hideaki Fukuda

IPC: H01L21/228 ,  H01L21/02 ,  H01L21/033 ,  G03F1/00

CPC classification number: H01L21/02153 ,  G03F1/00 ,  H01L21/0215 ,  H01L21/02186 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/0337

Abstract: A method of forming a metal oxide hardmask on a template includes: providing a template constituted by a photoresist or amorphous carbon formed on a substrate; and depositing by atomic layer deposition (ALD) a metal oxide hardmask on the template constituted by a material having a formula SixM(1-x)Oy wherein M represents at least one metal element, x is less than one including zero, and y is approximately two or a stoichiometrically-determined number.

Abstract translation: 在模板上形成金属氧化物硬掩模的方法包括：提供由形成在基板上的光致抗蚀剂或无定形碳构成的模板; 并通过原子层沉积（ALD）在由具有式SixM（1-x）Oy的材料构成的模板上沉积金属氧化物硬掩模，其中M表示至少一种金属元素，x小于包括0的一个，y是 约两个或化学计量确定的数目。

公开(公告)号：US20040071874A1

公开(公告)日：2004-04-15

申请号：US10403179

申请日：2003-03-28

Applicant: ASM JAPAN K.K.

Inventor： Akira Shimizu ,  Hideaki Fukuda ,  Baiei Kawano ,  Kazuo Sato

IPC: C23C016/00

CPC classification number: C23C16/45521 ,  C23C16/4409 ,  C23C16/4412 ,  C23C16/4557 ,  C23C16/45572 ,  C23C16/4585 ,  C23C16/54

Abstract: A single-wafer-processing type CVD apparatus includes: (a) a reaction chamber including: (i) a susceptor having at least one gas discharge hole to flow a gas into the reaction chamber via a back side and a periphery of the wafer into the reaction chamber; (ii) a showerhead; (iii) an exhaust duct positioned in the vicinity of the showerhead and provided circularly along an inner wall of the reaction chamber; and (iv) a circular separation plate provided coaxially with the exhaust duct to form a clearance with the bottom of the exhaust duct; and (b) a temperature-controlling apparatus for regulating the temperature of the showerhead. The separation plate has a sealing portion to seal a periphery of the susceptor and to separate the reaction chamber from a wafer-handling chamber when the susceptor rises.

Abstract translation: 单晶加工型CVD装置包括：（a）反应室，包括：（i）基座，具有至少一个气体排出孔，用于将气体经由晶片的背面和周边流入反应室，进入 反应室; （ii）喷头; （iii）位于喷头附近并沿着反应室的内壁圆周设置的排气管道; 和（iv）与排气管道同轴设置的与排气管道的底部形成间隙的圆形分离板; 和（b）用于调节喷头温度的温度控制装置。 分离板具有密封部分，以密封基座的周边，并且当基座上升时将反应室与晶片处理室分开。

公开(公告)号：US20040048490A1

公开(公告)日：2004-03-11

申请号：US10657416

申请日：2003-09-08

Applicant: ASM JAPAN K.K.

Inventor： Naoto Tsuji ,  Fumitoshi Ozaki ,  Satoshi Takahashi

IPC: H01L021/31 ,  H01L021/469

CPC classification number: H01L21/02126 ,  C23C16/30 ,  C23C16/56 ,  H01L21/022 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/31633 ,  H01L21/3212 ,  H01L21/76832 ,  H01L21/76835 ,  H01L21/7684

Abstract: An interlayer insulation film for multilayer interconnect of a semiconductor integrated circuit is formed by forming a first insulation film on a substrate by plasma CVD using a silicon-containing hydrocarbon gas; and continuously forming a second insulation film on the first insulation film at a thickness less than the first insulation film in situ by plasma CVD using a silicon-containing hydrocarbon gas and an oxidizing gas. The second insulation film has a hardness of 6 GPa or higher and is used as a polishing stop layer.

Abstract translation: 通过使用含硅烃气体通过等离子体CVD法在基板上形成第一绝缘膜来形成半导体集成电路的多层互连用层间绝缘膜， 并且通过使用含硅烃气体和氧化气体的等离子体CVD在第一绝缘膜上以小于第一绝缘膜的厚度连续地形成第二绝缘膜。 第二绝缘膜的硬度为6GPa以上，用作抛光停止层。

公开(公告)号：US20040038514A1

公开(公告)日：2004-02-26

申请号：US10412363

申请日：2003-04-11

Applicant: ASM JAPAN K.K.

Inventor： Yasuyoshi Hyodo ,  Atsuki Fukazawa ,  Yoshinori Morisada ,  Masashi Yamaguchi ,  Nobuo Matsuki

IPC: H01L021/4763

CPC classification number: B05D1/62 ,  C09D4/00 ,  C23C16/30 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/3121 ,  H01L21/3122 ,  H01L23/296 ,  H01L2924/0002 ,  H01L2924/12044 ,  C08G77/00 ,  H01L2924/00

Abstract: A hard film is formed on an insulation film formed on a semiconductor substrate by vaporizing a silicon-containing hydrocarbon compound to provide a source gas, introducing a reaction gas composed of the source gas and optionally an additive gas such as alcohol to a reaction space of a plasma CVD apparatus, and applying low-frequency RF power and high-frequency RF power. The silicon-containing hydrocarbon compound includes a cyclic Si-containing hydrocarbon compound and/or a linear Si-containing hydrocarbon compound, as a basal structure, with reactive groups for form oligomers using the basal structure. The residence time of the reaction gas in the reaction space is lengthened by reducing the total flow of the reaction gas in such a way as to form a siloxan polymer film with a low dielectric constant.

Abstract translation: 通过使含硅烃化合物汽化，形成源极气体，将由源气体构成的反应气体和任选的醇等添加气体引入到半导体基板上的绝缘膜上，形成硬膜至反应空间 等离子体CVD装置，并且施加低频RF功率和高频RF功率。 含硅烃化合物包括使用基础结构的形成低聚物的反应性基团作为基础结构的环状含Si烃化合物和/或线性含Si烃化合物。 反应气体在反应空间中的停留时间通过降低反应气体的总流量而延长，从而形成低介电常数的硅氧烷聚合物膜。

公开(公告)号：US20030224622A1

公开(公告)日：2003-12-04

申请号：US10402109

申请日：2003-03-27

Applicant: ASM JAPAN K.K.

Inventor： Nobuo Matsuki ,  Yoshinori Morisada ,  Yasuyoshi Hyodo ,  Seijiro Umemoto

IPC: H01L021/31

CPC classification number: B05D1/62 ,  C09D4/00 ,  C23C16/30 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/3121 ,  H01L21/3122 ,  H01L23/296 ,  H01L2924/0002 ,  H01L2924/12044 ,  C08G77/00 ,  H01L2924/00

Abstract: An insulation film is formed on a semiconductor substrate by vaporizing a silicon-containing hydrocarbon compound to provide a source gas, introducing a reaction gas composed of the source gas and an additive gas such as an inert gas and oxidizing gas to a reaction space of a plasma CVD apparatus, and depositing a siloxan polymer film by plasma polymerization at a temperature of -50null C.-100null C. The residence time of the reaction gas in the reaction space is lengthened by reducing the total flow of the reaction gas in such a way as to form a siloxan polymer film with a low dielectric constant such as 2.5.

Abstract translation: 通过汽化含硅烃化合物以形成源气体，将源气体和惰性气体等添加气体和氧化性气体构成的反应气体导入到半导体基板的反应空间，形成绝缘膜， 等离子体CVD装置，并且在-50℃-100℃的温度下通过等离子体聚合沉积硅​​氧烷聚合物膜。反应气体在反应空间中的停留时间通过减少反应气体的总流量而延长 以形成低介电常数例如2.5的硅氧烷聚合物膜的方式。

公开(公告)号：US20030021657A1

公开(公告)日：2003-01-30

申请号：US10187670

申请日：2002-07-01

Applicant: ASM JAPAN K.K.

Inventor： Takayuki Yamagishi

IPC: C23C016/00 ,  C23F001/00 ,  H01L021/306 ,  B65G001/133

CPC classification number: H01L21/67745 ,  H01L21/68742 ,  Y10S414/141

Abstract: A semiconductor-manufacturing device is equipped with a load-lock chamber and a reactor, which are directly connected, wherein a semiconductor wafer is transferred by a transferring arm provided inside the load-lock chamber from the load-lock chamber onto a susceptor provided inside the reactor. The device includes a buffer mechanism for keeping a semiconductor wafer standing by inside the reactor. The buffer mechanism includes at least two supporting means, which are provided around the susceptor to support the semiconductor wafer and which rotate in a horizontal direction, a shaft means for supporting the supporting means in a vertical direction, a rotating mechanism for rotating the supporting means coupled to the shaft means, and an elevating means for moving the shaft means up and down.

Abstract translation: 半导体制造装置配备有直接连接的负载锁定室和电抗器，其中半导体晶片由设置在负载锁定室内的传送臂从负载锁定室传送到设置在内部的基座上 反应堆。 该装置包括用于将半导体晶片保持在反应器内部的缓冲机构。 缓冲机构包括至少两个支撑装置，其设置在基座周围以支撑半导体晶片并且在水平方向上旋转，用于在垂直方向上支撑支撑装置的轴装置，用于使支撑装置旋转的旋转机构 联接到轴装置，以及用于上下移动轴装置的升降装置。

公开(公告)号：US20040194709A1

公开(公告)日：2004-10-07

申请号：US10807528

申请日：2004-03-23

Applicant: ASM JAPAN K.K.

Inventor： Takayuki Yamagishi ,  Hiroki Arai ,  Kiyoshi Satoh

IPC: C23C016/00

CPC classification number: C23C16/5096 ,  C23C16/36 ,  C23C16/401 ,  C23C16/45565 ,  H01J37/32082 ,  H01J37/32183

Abstract: A plasma treatment apparatus for thin-film deposition includes a reactor chamber; a pair of parallel-plate electrodes disposed inside the chamber; and a radio-frequency power supply system used for transmitting radio-frequency power to one of the parallel-plate electrodes via multiple supply points provided on the one of the parallel-electrodes. The radio-frequency power supply system includes a radio-frequency transmission unit which includes an inlet transmission path and multiple branches branched off from the inlet transmission path multiple times. Each branch is connected to the supply point and has a substantially equal characteristic impedance value.

Abstract translation: 一种用于薄膜沉积的等离子体处理装置包括反应室; 设置在所述室内的一对平行板电极; 以及用于经由设置在所述平行电极中的一个上的多个供给点将射频功率发送到平行板电极中的一个的射频电源系统。 射频电源系统包括射频传输单元，其包括入口传输路径和从入口传输路径多次分支的多个分支。 每个分支连接到供电点并且具有基本相等的特征阻抗值。

公开(公告)号：US20040087133A1

公开(公告)日：2004-05-06

申请号：US10693200

申请日：2003-10-24

Applicant: ASM JAPAN K.K.

Inventor： Devendra Kumar

IPC: H01L021/4763

CPC classification number: H01L21/76835 ,  H01L21/76807 ,  H01L21/7682

Abstract: A method for manufacturing a semiconductor device includes: (i) depositing a sacrificial layer made of an organic polymer such as benzocyclobutene on a substrate having a circuit formed thereon; (ii) etching the sacrificial layer except for a portion where air gaps are to be formed; (iii) depositing a low-dielectric layer over the substrate until the portion for air gaps is entirely enclosed in the low-dielectric layer; (iv) etching the low-dielectric layer to form via holes and trenches there through; (v) prior or subsequent to step (iv), removing the portion for air gaps; and (vi) depositing copper in the vias and trenches which are filled with the copper contacting a surface of the substrate.

Abstract translation: 半导体器件的制造方法包括：（i）在其上形成有电路的基板上沉积由诸如苯并环丁烯的有机聚合物制成的牺牲层; （ii）蚀刻除了要形成气隙的部分之外的牺牲层; （iii）在所述衬底上沉积低介电层，直到所述空隙部分完全封闭在所述低电介质层中; （iv）蚀刻低电介质层以在其上形成通孔和沟槽; （v）在步骤（iv）之前或之后，除去气隙部分; 和（vi）在通孔和沟槽中沉积铜，所述通孔和沟槽填充有与基底表面接触的铜。

公开(公告)号：US20030162408A1

公开(公告)日：2003-08-28

申请号：US10317239

申请日：2002-12-11

Applicant: ASM JAPAN K.K.

Inventor： Nobuo Matsuki ,  Yasuyoshi Hyodo ,  Masashi Yamaguchi ,  Yoshinori Morisada ,  Atsuki Fukazawa ,  Manabu Kato ,  Shinya Kaneko ,  Devendra Kumar ,  Seijiro Umemoto

IPC: H01L021/31

CPC classification number: B05D1/62 ,  C09D4/00 ,  C23C16/30 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/3121 ,  H01L21/3122 ,  H01L23/296 ,  H01L2924/0002 ,  H01L2924/12044 ,  C08G77/00 ,  H01L2924/00

Abstract: An insulation film is formed on a semiconductor substrate by vaporizing a silicon-containing hydrocarbon compound to provide a source gas, introducing a reaction gas composed of the source gas and an additive gas such as an inert gas and oxidizing gas to a reaction space of a plasma CVD apparatus. The silicon-containing hydrocarbon compound includes a cyclosiloxan compound or a linear siloxan compound, as a basal structure, with reactive groups for form oligomers using the basal structure. The residence time of the reaction gas in the reaction space is lengthened by reducing the total flow of the reaction gas in such a way as to form a siloxan polymer film with a. low dielectric constant.

Abstract translation: 通过汽化含硅烃化合物以形成源气体，将源气体和惰性气体等添加气体和氧化性气体构成的反应气体导入到半导体基板的反应空间，形成绝缘膜， 等离子体CVD装置。 含硅烃化合物包括作为基础结构的环硅氧烷化合物或线性硅氧烷化合物，其具有使用基础结构的形成低聚物的反应性基团。 反应气体在反应空间中的停留时间通过减少反应气体的总流量而以a形成硅氧烷聚合物膜的方式延长。 低介电常数。

公开(公告)号：US20030143867A1

公开(公告)日：2003-07-31

申请号：US10309401

申请日：2002-12-03

Applicant: ASM JAPAN K.K.

Inventor： Nobuo Matsuki ,  Yoshinori Morisada ,  Atsuki Fukazawa ,  Manabu Kato

IPC: H01L021/31 ,  H01L021/469

CPC classification number: C23C16/45523 ,  C23C16/401

Abstract: An insulation film is formed on a semiconductor substrate by a method including the steps of: (i) introducing a source gas comprising a compound composed of at least Si, C, and H into a chamber; (ii) introducing in pulses an oxidizing gas into the chamber, wherein the source gas and the oxidizing gas form a reaction gas; and (iii) forming an insulation film on a semiconductor substrate by plasma treatment of the reaction gas. The plasma treatment may be plasma CVD processing.

Abstract translation: 通过包括以下步骤的方法在半导体衬底上形成绝缘膜：（i）将包含至少Si，C和H的化合物的源气体引入室中; （ii）将脉冲中的氧化气体引入所述室中，其中所述源气体和所述氧化气体形成反应气体; 和（iii）通过等离子体处理反应气体在半导体衬底上形成绝缘膜。 等离子体处理可以是等离子体CVD处理。