公开(公告)号：US12131890B2

公开(公告)日：2024-10-29

申请号：US17435340

申请日：2020-03-04

Applicant: Lam Research Corporation

Inventor： Ann Erickson ,  Darrell Ehrlich

IPC: H01J37/32 ,  H01L21/683

CPC classification number: H01J37/32724 ,  H01J37/32642 ,  H01L21/6833 ,  H01J37/32082 ,  H01J2237/2007 ,  H01J2237/334

Abstract: An electrostatic chuck system for a plasma processing chamber is provided. A base plate comprising Al—SiC is provided. A ceramic plate is disposed over the base plate. A bonding layer bonds the ceramic plate to the base plate.

公开(公告)号：US12125672B2

公开(公告)日：2024-10-22

申请号：US18350207

申请日：2023-07-11

Applicant: Tokyo Electron Limited

Inventor： Chishio Koshimizu

IPC: H01L21/00 ,  H01J37/248 ,  H01J37/32

CPC classification number: H01J37/32082 ,  H01J37/248 ,  H01J37/32568

Abstract: A plasma processing method according to an exemplary embodiment includes preparing a substrate in a chamber of a plasma processing apparatus. The substrate is disposed on a substrate support in the chamber. The substrate support includes a lower electrode and an electrostatic chuck. The electrostatic chuck is provided on the lower electrode. The plasma processing method further includes applying a positive voltage to a conductive member when plasma is being generated in the chamber for plasma processing on the substrate. The conductive member extends closer to a grounded side wall of the chamber than the substrate.

公开(公告)号：US12119212B2

公开(公告)日：2024-10-15

申请号：US17999833

申请日：2021-05-27

Applicant: SUMITOMO OSAKA CEMENT CO., LTD.

Inventor： Masaki Hirayama ,  Tetsuro Itagaki

IPC: H01J37/32 ,  H01L21/683

CPC classification number: H01J37/32724 ,  H01J37/32082 ,  H01J37/32568 ,  H01J37/32577 ,  H01L21/6833 ,  H01J37/32541 ,  H01J2237/2007

Abstract: A wafer support device includes a dielectric substrate and an RF electrode provided in the dielectric substrate. The RF electrode is divided into a plurality of zone electrodes arranged in a planar direction of the dielectric substrate. The wafer support device has: a short-circuit member interconnecting the plurality of zone electrodes; and a main power supply rod connected to the short-circuit member from a back side of the dielectric substrate.

公开(公告)号：US12119211B2

公开(公告)日：2024-10-15

申请号：US18367200

申请日：2023-09-12

Applicant: ASM IP Holding B.V.

Inventor： ChangMin Lee

IPC: H01J37/32

CPC classification number: H01J37/32541 ,  H01J37/32082 ,  H01J37/32577 ,  H01J37/32724 ,  H01J37/32935

Abstract: A substrate processing apparatus capable of locally controlling a plasma intensity and improving thin film properties and thickness uniformity includes: a power supply unit, a processing unit electrically connected to the power supply unit, and a substrate support unit below the processing unit, wherein the substrate support unit includes a first ground electrode and a second ground electrode.

公开(公告)号：US12112925B2

公开(公告)日：2024-10-08

申请号：US17574081

申请日：2022-01-12

Applicant: Hitachi High-Tech Corporation

Inventor： Masaki Ishiguro ,  Masahiro Sumiya ,  Shigeru Shirayone ,  Kazuyuki Ikenaga ,  Tomoyuki Tamura

IPC: H01J37/32

CPC classification number: H01J37/32532 ,  H01J37/32082 ,  H01J37/32146 ,  H01J37/32706 ,  H01J37/32935 ,  H01J37/3299

Abstract: A plasma processing apparatus includes: a plasma processing chamber; a radio frequency power source; a sample stage on which a sample is mounted; an electrode which is arranged inside the sample stage and electrostatically chucks the sample; a DC power source which applies a DC voltage to the electrode; and a control device which controls an output voltage of the DC power source so that an electric potential difference between an electric potential of the sample and an electric potential of an inner wall of the plasma processing chamber is reduced to an electric potential difference within a predetermined range during interruption of plasma discharge.

公开(公告)号：US20240321557A1

公开(公告)日：2024-09-26

申请号：US18679784

申请日：2024-05-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jiye KIM ,  In Cheol Cheol SONG ,  Woongpil JEON ,  Daihong KIM ,  Jaebeom PARK ,  Byungho CHUN

IPC: H01J37/32 ,  C23C16/505 ,  H05K9/00

CPC classification number: H01J37/32449 ,  C23C16/505 ,  H01J37/32082 ,  H05K9/0081 ,  H01J2237/3321

Abstract: An apparatus for manufacturing a semiconductor device includes a chamber including a lower housing and an upper housing, heater chucks in the lower housing, shower heads on the heater chucks, the shower heads being between the lower housing and the upper housing, power supplies connected to the shower heads to provide radio-frequency powers to the shower heads, power straps in the upper housing to connect the shower heads to the power supplies, and shielding members in the upper housing, the shielding members enclosing the power straps and the shower heads, respectively, the shielding members to prevent electromagnetic interference of the radio-frequency powers between the power straps and between the shower heads.

公开(公告)号：US12094781B2

公开(公告)日：2024-09-17

申请号：US16971449

申请日：2019-09-13

Applicant: Hitachi High-Tech Corporation

Inventor： Makoto Miura ,  Kiyohiko Sato ,  Yasushi Sonoda ,  Satoshi Sakai

IPC: H01L21/8234 ,  H01J37/32 ,  H01L29/40 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L21/82345 ,  H01J37/32082 ,  H01J37/3244 ,  H01J37/32715 ,  H01L21/823412 ,  H01L21/823431 ,  H01L29/401 ,  H01L29/42392 ,  H01L29/78696 ,  H01J2237/332 ,  H01J2237/334

Abstract: A manufacturing process for a three-dimensional structure device having stacked channels in which channels having a shape of a thin line or a sheet are stacked in a direction vertical to a substrate, a work function control metal is separately formed without expanding a space between FETS having different threshold voltages, and including a first step of performing anisotropic etching to open the mask material until the work function control metal film is exposed; a second step of depositing a protective film; a third step of performing anisotropic etching to remove the protective film while remaining the protective film deposited on sidewalls of the mask material opened in the first step; and a fourth step of performing isotropic etching to selectively remove the mask material between the channels relative to the protective film and the work function control metal film are executed.

公开(公告)号：US12091752B2

公开(公告)日：2024-09-17

申请号：US17249909

申请日：2021-03-18

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Yu-Ting Tsai ,  Chung-Liang Cheng ,  Wen-Cheng Cheng ,  Che-Hung Liu ,  Yu-Cheng Shen ,  Chyi-Tsong Ni

IPC: C23C16/455 ,  C23C16/505 ,  H01J37/32 ,  H01L21/67 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: C23C16/45536 ,  C23C16/505 ,  H01J37/32082 ,  H01J37/3266 ,  H01L21/67023 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53219

Abstract: An apparatus for manufacturing a semiconductor device may include a chamber, a chuck provided in the chamber, and a biased power supply physically connected with the chuck. The apparatus may include a target component provided over the chuck and the biased power supply, and a magnetron assembly provided over the target component. The magnetron assembly may include a plurality of outer magnetrons and a plurality of inner magnetrons, and a spacing between each adjacent magnetrons of the plurality of outer magnetrons may be different from a spacing between each adjacent magnetrons of the plurality of inner magnetrons.

公开(公告)号：US20240304495A1

公开(公告)日：2024-09-12

申请号：US18118017

申请日：2023-03-06

Applicant: Applied Materials, Inc.

Inventor： Tsung-Han Yang ,  Zhen Liu ,  Yongqian Gao ,  Michael S. Jackson ,  Rongjun Wang

IPC: H01L21/768 ,  C23C16/14 ,  C23C16/455 ,  C23C16/56 ,  H01J37/32

CPC classification number: H01L21/76862 ,  C23C16/14 ,  C23C16/45527 ,  C23C16/56 ,  H01J37/32082 ,  H01L21/76843 ,  H01L21/76876 ,  H01L21/76877 ,  H01J2237/332

Abstract: A method of forming a semiconductor device structure by utilizing a hydrogen plasma treatment to promote selective deposition is disclosed. In some embodiments, the method includes forming a metal layer within at least one feature on the semiconductor device structure. The method includes exposing the metal layer to a hydrogen plasma treatment. The hydrogen plasma treatment preferentially treats the top field and sidewalls while leaving the bottom surface substantially untreated to encourage bottom up metal film growth. In some embodiments, the hydrogen plasma treatment comprises substantially only hydrogen ions.

公开(公告)号：US12087591B2

公开(公告)日：2024-09-10

申请号：US17707537

申请日：2022-03-29

Applicant: Tokyo Electron Limited

Inventor： Gen Tamamushi ,  Kazuya Nagaseki

IPC: H01L21/3065 ,  H01J37/30 ,  H01J37/32 ,  H01L21/306 ,  H01L21/3213 ,  H01J37/305 ,  H01L21/67

CPC classification number: H01L21/3065 ,  H01J37/3007 ,  H01J37/32082 ,  H01J37/321 ,  H01J37/32174 ,  H01J37/32449 ,  H01J37/32568 ,  H01J37/32935 ,  H01L21/30621 ,  H01L21/32136 ,  H01J37/3053 ,  H01J2237/3341 ,  H01L21/67069 ,  H01L21/67253

Abstract: A plasma processing apparatus includes a chamber; a substrate support disposed in the chamber and including a lower electrode; an upper electrode disposed above the substrate support; an RF source that supplies an RF power to the lower electrode or the upper electrode, the RF power having a plurality of power levels during a first sequence in a repeating time period, the plurality of power levels including a first power level during a first state and a second state, and a second power level during a third state and a fourth state; and a DC source that applies a DC voltage to the lower electrode, the DC voltage having a plurality of voltage levels during the first sequence in the repeating time period.