公开(公告)号：US09839132B2

公开(公告)日：2017-12-05

申请号：US13585920

申请日：2012-08-15

Applicant: Masanori Fujidai ,  Isamu Fujimoto

Inventor： Masanori Fujidai ,  Isamu Fujimoto

IPC: H05K1/18 ,  H01L23/00 ,  H05K3/40

CPC classification number: H05K1/185 ,  H01L24/18 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/04105 ,  H01L2224/2518 ,  H01L2224/73267 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K1/186 ,  H05K3/4046 ,  H05K2201/09509 ,  H05K2201/10242 ,  H05K2201/10416 ,  H05K2201/10636 ,  H05K2203/1469 ,  Y02P70/611 ,  H01L2924/00

Abstract: In a component-embedded substrate, a component and wiring block units are embedded in a component-embedded layer; conductive layers are located on all surfaces of the wiring block units; the component and the wiring block units are arranged such that lower surface side conductive layers of the wiring block units and electrodes of the component contact lower surface side wiring layers; via-hole conductors are located in respective upper positions relative to upper surface side conductive layers of the wiring block units and the electrodes of the component; and upper surface side wiring layers of the component-embedded layer are thus electrically connected to upper surface side conductive layers of the wiring block units, and the electrodes of the component by the via-hole conductors.

公开(公告)号：US08027170B2

公开(公告)日：2011-09-27

申请号：US12340965

申请日：2008-12-22

Applicant: Kazuo Hattori ,  Isamu Fujimoto

Inventor： Kazuo Hattori ,  Isamu Fujimoto

IPC: H05K7/00

CPC classification number: H05K1/0231 ,  H01G4/35 ,  H05K1/113 ,  H05K2201/09627

Abstract: An electronic device which includes a feedthrough capacitor mounted on a front surface of a substrate. A feedthrough electrode penetrates a laminate (body of the capacitor). External electrodes are electrically connected to opposite ends of the feedthrough electrode. A capacitor electrode is disposed to form capacity in cooperation with the feedthrough electrode. A wiring conductor is formed on a rear surface of the substrate or inside the substrate, and via-hole conductors are connected to the wiring conductor. The feedthrough electrode and the external electrodes constitute a first current path. The wiring conductor and the via-hole conductors constitute a second current path electrically connected in parallel to the first current path.

Abstract translation: 一种电子装置，其包括安装在基板的前表面上的穿通电容器。 穿通电极穿透层压体（电容器体）。 外部电极电连接到馈通电极的相对端。 配置电容器电极以与馈通电极协作形成容量。 布线导体形成在基板的背面或基板的内部，通孔导体与布线导体连接。 馈通电极和外部电极构成第一电流路径。 布线导体和通孔导体构成与第一电流路并联电连接的第二电流路径。

公开(公告)号：US6037705A

公开(公告)日：2000-03-14

申请号：US31499

申请日：1998-02-26

Applicant: Kenji Kawabata ,  Tetsuo Tatsumi ,  Hiroyuki Ishizaki ,  Etsuo Nishikawa ,  Isamu Fujimoto

Inventor： Kenji Kawabata ,  Tetsuo Tatsumi ,  Hiroyuki Ishizaki ,  Etsuo Nishikawa ,  Isamu Fujimoto

IPC: H01L41/107 ,  H01L41/08

CPC classification number: H01L41/107

Abstract: A piezoelectric transformer includes a piezoelectric transforming element supported at its vibrational node region N on a base plate through a resilient adhesive member. Input electrodes of the piezoelectric transforming element are electrically connected to input electrode connecting lands of the base plate through a conductive adhesive which is adapted to be freely deformed according to the vibration of the piezoelectric transforming element. An output electrode of the piezoelectric transforming element is electrically connected to an output electrode connecting land of the base plate through a lead wire or a conductive adhesive.

Abstract translation: 压电变压器包括通过弹性粘合构件在基板上的振动节点区域N处支撑的压电变换元件。 压电变换元件的输入电极通过导电粘合剂电连接到基板的输入电极连接台，该导电粘合剂适于根据压电变换元件的振动自由变形。 压电变换元件的输出电极通过引线或导电粘合剂电连接到基板的输出电极连接区域。

公开(公告)号：US20130033836A1

公开(公告)日：2013-02-07

申请号：US13565876

申请日：2012-08-03

Applicant: Kazuo HATTORI ,  Isamu FUJIMOTO

Inventor： Kazuo HATTORI ,  Isamu FUJIMOTO

IPC: H05K7/02

CPC classification number: H01G4/30 ,  H01G2/065 ,  H01G4/232

Abstract: A chip-component structure includes an interposer and a multilayer capacitor mounted thereon. The interposer includes a substrate, a component connecting electrode, an external connection electrode, and a side electrode. The component connecting electrode and the external connection electrode are electrically connected by the side electrode. The component connecting electrode is joined to an external electrode of the multilayer capacitor. The substrate includes a communication hole that communicates between opposite spaces opening in both principal surfaces of the substrate.

Abstract translation: 芯片组件结构包括安装在其上的中介层和层叠电容器。 内插件包括基板，部件连接电极，外部连接电极和侧面电极。 部件连接电极和外部连接电极通过侧面电极电连接。 部件连接电极与多层电容器的外部电极接合。 基板包括连通孔，该连通孔在基板的两个主表面中开口的相对空间之间连通。

公开(公告)号：US20120307466A1

公开(公告)日：2012-12-06

申请号：US13585920

申请日：2012-08-15

Applicant: Masanori FUJIDAI ,  Isamu FUJIMOTO

Inventor： Masanori FUJIDAI ,  Isamu FUJIMOTO

IPC: H05K1/18

CPC classification number: H05K1/185 ,  H01L24/18 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/04105 ,  H01L2224/2518 ,  H01L2224/73267 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K1/186 ,  H05K3/4046 ,  H05K2201/09509 ,  H05K2201/10242 ,  H05K2201/10416 ,  H05K2201/10636 ,  H05K2203/1469 ,  Y02P70/611 ,  H01L2924/00

Abstract: In a component-embedded substrate, a component and wiring block units are embedded in a component-embedded layer; conductive layers are located on all surfaces of the wiring block units; the component and the wiring block units are arranged such that lower surface side conductive layers of the wiring block units and electrodes of the component contact lower surface side wiring layers; via-hole conductors are located in respective upper positions relative to upper surface side conductive layers of the wiring block units and the electrodes of the component; and upper surface side wiring layers of the component-embedded layer are thus electrically connected to upper surface side conductive layers of the wiring block units, and the electrodes of the component by the via-hole conductors.

Abstract translation: 在部件嵌入式基板中，将部件和接线块单元嵌入在部件嵌入层中; 导电层位于布线块单元的所有表面上; 所述部件和所述布线块单元布置成使得所述布线块单元的下表面侧导电层和所述元件的电极接触下表面侧布线层; 通孔导体相对于布线块单元的上表面侧导电层和部件的电极位于相应的上部位置; 因此，元件嵌入层的上表面侧配线层与布线块单元的上表面侧导电层电连接，通过通孔导体电连接。

公开(公告)号：US5051574A

公开(公告)日：1991-09-24

申请号：US545559

申请日：1990-06-29

Applicant: Shigeo Yoshida ,  Isamu Fujimoto

Inventor： Shigeo Yoshida ,  Isamu Fujimoto

IPC: G01B11/00 ,  G01S17/02 ,  G01V8/12 ,  G01V8/20 ,  G06F3/033 ,  G06F3/042 ,  H03K17/94

CPC classification number: H03K17/943 ,  G01V8/20 ,  G06F3/0421

Abstract: The present optical detection apparatus is adapted to measure an individual light reception value received by respective photodetectors when the light is interrupted by an object and the driving amount for light emission of the respective light emitting devices is controlled to be equal, compute and store the individual driving amount for light emission of the respective light emitting devices so that the individual light reception value may be kept constant and drive the respective light emitting devices in accordance with the individual driving amount for light emission. Accordingly, variation of the light reception value of the respective photodetectors may be eliminated thus preventing erroneous detection of an object.

Abstract translation: 本光检测装置适于在光被物体中断时测量由各光电检测器接收的单个光接收值，并且将各发光器件的发光驱动量控制为相等，计算并存储个体 驱动各个发光装置的发光量，使得各个光接收值可以保持恒定，并且根据用于发光的个别驱动量来驱动各个发光装置。 因此，可以消除各个光电检测器的光接收值的变化，从而防止物体的错误检测。

公开(公告)号：US08971054B2

公开(公告)日：2015-03-03

申请号：US13616879

申请日：2012-09-14

Applicant: Masanori Fujidai ,  Kazuo Hattori ,  Isamu Fujimoto

Inventor： Masanori Fujidai ,  Kazuo Hattori ,  Isamu Fujimoto

IPC: H05K1/18 ,  H05K1/02 ,  H01L23/498 ,  H01L23/50 ,  H05K3/46

CPC classification number: H05K1/0271 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L2224/16225 ,  H05K1/182 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/068 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611

Abstract: A component assembly that can be easily built in a main substrate with high accuracy is formed such that a glass transition temperature of a built-in-component layer of an assembly substrate in which multiple capacitors are embedded is higher than a glass transition temperature of a built-in-component layer of a built-in-component substrate. Thus, thermal deformation of the component assembly is prevented when the built-in-component substrate in which the component assembly is built is heated during reflow, for example. The component assembly can thus be highly accurately built in the built-in-component substrate. Moreover, when the component assembly in which the multiple capacitors are embedded is built in the built-in-component substrate, electrode pads of the component assembly in which the multiple capacitors are embedded can be electrically connected to wiring layers of the built-in-component substrate by soldering despite the variation in height among the capacitors.

Abstract translation: 可以以高精度容易地构建在主基板中的部件组件被形成为使得嵌入多个电容器的组装基板的内置部件层的玻璃化转变温度高于玻璃化转变温度 内置组件衬底的内置组件层。 因此，例如在回流时，构成部件组件的内置部件基板被加热时，能够防止部件组件的热变形。 因此，组件组件可以高度精确地内置在内置组件衬底中。 此外，在嵌入有多个电容器的部件组装体内置于内置部件基板中时，嵌入多个电容器的部件组装体的电极焊盘能够电连接到内置的多个电容器的配线层， 尽管电容器之间的高度发生变化，仍然通过焊接进行组件衬底。

公开(公告)号：US5036187A

公开(公告)日：1991-07-30

申请号：US517769

申请日：1990-05-02

Applicant: Shigeo Yoshida ,  Isamu Fujimoto

Inventor： Shigeo Yoshida ,  Isamu Fujimoto

IPC: G01B11/00 ,  G01V8/20 ,  G06F3/042

CPC classification number: G01V8/20 ,  G06F3/0421

Abstract: The optical input detection apparatus is adapted to integrate the value of the light received corresponding to the sum of the value of the light received by the light receiving device during driving of the light emitting device and the external flood light, deduct from the integration value the value of the light received equivalent to the external flood light received by the photodetector during the non-driving period following the driving of the light emitting device, compensate the integration value to the signal corresponding to the light emitting output and output the compensated signal to the comparator for comparison. Consequently, the presence or absence of an interruption in the light beam may be detected without being affected by the external flood light.

Abstract translation: 光输入检测装置适于将在发光装置的驱动期间与由光接收装置接收的光的值的和相对应的光的接收值与外部泛光灯进行积分，从积分值 在发光装置的驱动之后的非驱动期间，由光检测器接收到的外部泛光灯的光接收值补偿与发光输出对应的信号的积分值，并将补偿信号输出到 比较器进行比较。 因此，可以在不受外部泛光灯影响的情况下检测光束中的存在或不存在。

公开(公告)号：US09620288B2

公开(公告)日：2017-04-11

申请号：US13565876

申请日：2012-08-03

Applicant: Kazuo Hattori ,  Isamu Fujimoto

Inventor： Kazuo Hattori ,  Isamu Fujimoto

IPC: H01G4/30 ,  H01G2/06 ,  H01G4/232

CPC classification number: H01G4/30 ,  H01G2/065 ,  H01G4/232

Abstract: A chip-component structure includes an interposer and a multilayer capacitor mounted thereon. The interposer includes a substrate, a component connecting electrode, an external connection electrode, and a side electrode. The component connecting electrode and the external connection electrode are electrically connected by the side electrode. The component connecting electrode is joined to an external electrode of the multilayer capacitor. The substrate includes a communication hole that communicates between opposite spaces opening in both principal surfaces of the substrate.

公开(公告)号：US07672112B2

公开(公告)日：2010-03-02

申请号：US12369759

申请日：2009-02-12

Applicant: Kazuo Hattori ,  Isamu Fujimoto ,  Shinichiro Kuroiwa ,  Satoru Noda

Inventor： Kazuo Hattori ,  Isamu Fujimoto ,  Shinichiro Kuroiwa ,  Satoru Noda

IPC: H01G4/228

CPC classification number: H05K1/0231 ,  H01G4/224 ,  H01G4/228 ,  H01G4/232 ,  H05K1/185 ,  H05K2201/10636 ,  Y02P70/611

Abstract: A component-embedded substrate includes a chip capacitor. The chip capacitor includes a ceramic laminate body and a plurality of terminal electrodes. The component-embedded substrate has a first principal surface and a second principal surface. At least two of the plurality of terminal electrodes are connected to the first principal surface and define a first terminal electrode group, and at least two of the plurality of terminal electrodes are connected to the second principal surface and define a second terminal electrode group. One terminal electrode in the first terminal electrode group is electrically connected to one terminal electrode in the second terminal electrode group via the internal electrodes, and capacitance is provided by a pair of the terminal electrodes in the first terminal electrode group via the dielectric layer, and capacitance is provided by a pair of the terminal electrodes in the second terminal electrode group via the dielectric layer. A direction in which the internal electrodes are stacked is parallel or substantially parallel to the two principal surfaces.

Abstract translation: 部件嵌入式基板包括片状电容器。 片状电容器包括陶瓷层叠体和多个端子电极。 部件嵌入式基板具有第一主表面和第二主表面。 多个端子电极中的至少两个连接到第一主表面并限定第一端子电极组，并且多个端子电极中的至少两个连接到第二主表面并限定第二端子电极组。 第一端子电极组中的一个端子电极经由内部电极与第二端子组中的一个端子电极电连接，并且电容由第一端子电极组中的一对端子电极经由电介质层提供，以及 电容由第二端子电极组中的一对端子电极经由电介质层提供。 内部电极层叠的方向平行或基本平行于两个主表面。