公开(公告)号：US09373724B2

公开(公告)日：2016-06-21

申请号：US13005890

申请日：2011-01-13

Applicant: Hisae Shimizu ,  Katsumi Abe ,  Ryo Hayashi

Inventor： Hisae Shimizu ,  Katsumi Abe ,  Ryo Hayashi

IPC: H01L29/04 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78633

Abstract: Disclosed is a method of driving a transistor including a semiconductor layer, a first insulating layer, a second insulating layer, a first conductive layer, and a second conductive layer such that the semiconductor layer is disposed between the first and second insulating layers, one surface of the first insulating layer opposite the other surface in contact with the semiconductor layer is in contact with the first conductive layer, one surface of the second insulating layer opposite the other surface in contact with the semiconductor layer is in contact with the second conductive layer. The method includes applying a voltage VBG that satisfies the relation of VBG≦VON1×C1/(C1+C2) to the second conductive layer.

Abstract translation: 公开了一种驱动包括半导体层，第一绝缘层，第二绝缘层，第一导电层和第二导电层的晶体管的方法，使得半导体层设置在第一和第二绝缘层之间，一个表面 与第一导电层接触的与第一导电层接触的与第一绝缘层相反的第一绝缘层的第一绝缘层与第二导电层接触的第二绝缘层与与半导体层接触的另一表面相对的一个表面。 该方法包括将第二导电层施加满足VBG＆lt; N1E，VON1×C1 /（C1 + C2）的关系的电压VBG。

公开(公告)号：US08797807B2

公开(公告)日：2014-08-05

申请号：US13432708

申请日：2012-03-28

Applicant: Masahiro Yoshihara ,  Katsumi Abe

Inventor： Masahiro Yoshihara ,  Katsumi Abe

IPC: G11C7/10 ,  G11C16/10 ,  G11C16/26

CPC classification number: G11C7/1078 ,  G11C7/08 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/1087 ,  G11C7/12 ,  G11C7/22 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/26 ,  G11C16/3418 ,  G11C2207/2227 ,  G11C2207/2245

Abstract: According to one embodiment, the semiconductor memory includes a memory cell array which includes memory cells to store data, a buffer circuit which includes latches, each of the latches including transistors as control elements and a flip-flop, and a control circuit which turns off the transistors to deactivate one or more of the latches.

Abstract translation: 根据一个实施例，半导体存储器包括存储单元阵列，其包括用于存储数据的存储单元，包括锁存器的缓冲电路，每个锁存器包括作为控制元件的晶体管和触发器，以及控制电路， 晶体管去激活一个或多个锁存器。

公开(公告)号：US20140003015A1

公开(公告)日：2014-01-02

申请号：US14016707

申请日：2013-09-03

Applicant: Shinji WATANABE ,  Nobuhiro MIKAMI ,  Junya SATO ,  Kenichiro FUJII ,  Katsumi ABE ,  Atsumasa SAWADA

Inventor： Shinji WATANABE ,  Nobuhiro MIKAMI ,  Junya SATO ,  Kenichiro FUJII ,  Katsumi ABE ,  Atsumasa SAWADA

IPC: H05K1/18

CPC classification number: H05K1/18 ,  H01L24/18 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/18 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24998 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82102 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/1515 ,  H01L2924/15151 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/023 ,  H05K1/0271 ,  H05K1/0284 ,  H05K1/185 ,  H05K1/189 ,  H05K3/0014 ,  H05K3/32 ,  H05K3/4644 ,  H05K2201/0187 ,  H05K2201/0191 ,  H05K2201/0195 ,  H05K2201/09018 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09118 ,  H05K2201/09436 ,  H05K2201/10477 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10636 ,  H05K2201/10734 ,  H05K2203/1469 ,  H05K2203/302 ,  Y02P70/611 ,  H01L2924/00

Abstract: An object of the present invention is to allow stress that may be applied to a semiconductor package to be suppressed, when the semiconductor package is mounted on a curved board. In a mount board 1, a semiconductor package 20 is mounted on a curved board 10 including a curved surface on at least a portion thereof. The curved board 10 includes a pedestal portion 13a disposed on a region of the curved surface portion where the semiconductor package 20 is mounted and having an upper surface thereof formed flat, and a plurality of pad portions 15a disposed on the flat surface of the pedestal portion 13a. The pedestal portion 13a is formed of an insulating material. The semiconductor package 20 is mounted on the pad portions 15a.

Abstract translation: 本发明的目的在于，当将半导体封装安装在弯曲的基板上时，可以抑制对半导体封装件施加的应力。 在安装基板1中，将半导体封装20安装在其至少一部分上包括弯曲表面的弯曲板10上。 弯曲板10包括设置在半导体封装20安装的弯曲表面部分的区域上并具有平坦的上表面的基座部分13a和设置在基座部分的平坦表面上的多个焊盘部分15a 13a。 基座部分13a由绝缘材料形成。 半导体封装20安装在焊盘部分15a上。

公开(公告)号：US08559226B2

公开(公告)日：2013-10-15

申请号：US13052148

申请日：2011-03-21

Applicant: Katsumi Abe ,  Masahiro Yoshihara ,  Toshiaki Edahiro

Inventor： Katsumi Abe ,  Masahiro Yoshihara ,  Toshiaki Edahiro

IPC: G11C16/04

CPC classification number: G11C16/26 ,  G11C11/5642 ,  G11C16/12 ,  G11C16/32 ,  G11C16/3468

Abstract: According to one embodiment, a threshold detecting method for detecting threshold values of nonvolatile semiconductor memory cells comprises applying a preset voltage to a word line connected to the memory cells, and performing bit-line sense at two different timings during discharging of one of a bit line connected to the memory cells and a node corresponding to the bit line, while a potential of the word line is kept constant.

Abstract translation: 根据一个实施例，用于检测非易失性半导体存储单元的阈值的阈值检测方法包括：将预设电压施加到连接到存储单元的字线，以及在放电期间的两个不同定时执行位线检测 线连接到存储器单元和对应于位线的节点，而字线的电位保持恒定。

公开(公告)号：US08507910B2

公开(公告)日：2013-08-13

申请号：US12520944

申请日：2008-01-17

Applicant: Masato Ofuji ,  Katsumi Abe ,  Masafumi Sano ,  Hideya Kumomi ,  Ryo Hayashi

Inventor： Masato Ofuji ,  Katsumi Abe ,  Masafumi Sano ,  Hideya Kumomi ,  Ryo Hayashi

IPC: H01L29/00

CPC classification number: H01L27/3265 ,  H01L27/3248 ,  H01L2227/323 ,  H01L2251/5323

Abstract: An active matrix display apparatus includes a transistor, a storage capacitor, and a light-emitting element formed on a substrate. The transistor includes a source electrode, a drain electrode, and a gate electrode. The storage capacitor has a multilayered structure of a first electrode, a dielectric layer, and a second electrode stacked in this order on the substrate, and the light-emitting element has a multilayered structure of a third electrode, a light-emitting layer, and a fourth electrode stacked in this order on the substrate. The first electrode is electrically connected to the gate electrode of the transistor, and at least a part of the storage capacitor is disposed between the substrate and the light-emitting element. All of the substrate, the first electrode, the second electrode, and the third electrode are formed from a material transmitting a visible light emitted by the light-emitting element. Viewing from a top of the substrate, a region for storing charges in the storage capacitor includes or is equal to a light-emitting region of the light-emitting element.

Abstract translation: 有源矩阵显示装置包括晶体管，存储电容器和形成在基板上的发光元件。 晶体管包括源电极，漏电极和栅电极。 存储电容器具有在基板上依次层叠的第一电极，电介质层和第二电极的多层结构，并且发光元件具有第三电极，发光层和多层结构的多层结构 在基板上依次层叠的第四电极。 第一电极电连接到晶体管的栅电极，并且至少一部分存储电容器设置在基板和发光元件之间。 所有的基板，第一电极，第二电极和第三电极由透射由发光元件发出的可见光的材料形成。 从基板的顶部观察，用于在存储电容器中存储电荷的区域包括或等于发光元件的发光区域。

公开(公告)号：US08398087B2

公开(公告)日：2013-03-19

申请号：US12310383

申请日：2007-08-08

Applicant: Tomoaki Nishimura ,  Yoshiyuki Kanzaki ,  Kiyofumi Fukasawa ,  Katsumi Abe

Inventor： Tomoaki Nishimura ,  Yoshiyuki Kanzaki ,  Kiyofumi Fukasawa ,  Katsumi Abe

IPC: F16J9/20

CPC classification number: F16J15/3284 ,  C08K3/22 ,  C08L11/00 ,  C08L15/02 ,  F16D25/12 ,  F16D48/02 ,  F16D2048/0212 ,  F16J15/3252 ,  Y10T428/28 ,  Y10T428/31678

Abstract: A bonded piston seal, which comprises a metal ring, and a rubbery elastomer seal as vulcanization-bonded thereto expect the sliding site along which a mating seal member slides, where the rubbery elastomer seal is partially bonded to the metal ring through an adhesive layer, wherein the adhesive layers comprises (a) an underlayer adhesive layer comprising a phenol resin and an epoxy resin, and (b) an overlayer adhesive layer comprising a phenol resin, a halogenated polymer, and a metal oxide. Not only the distinguished initial adhesiveness, but also the distinguished water-resistance can be obtained by providing (a) the underlayer adhesive layer of the afore-mentioned components and (b) the overlayer adhesive layer of the afore-mentioned components.

Abstract translation: 包括金属环的粘合活塞密封件和硫化粘合的橡胶弹性体密封件期望配合密封件滑动的滑动位置，其中橡胶弹性体密封件通过粘合剂层部分地结合到金属环上， 其中所述粘合剂层包括（a）包含酚醛树脂和环氧树脂的底层粘合剂层，和（b）包含酚醛树脂，卤化聚合物和金属氧化物的覆层粘合剂层。 通过提供（a）前述组分的下层粘合剂层和（b）前述组分的覆盖层粘合剂层，不仅可以获得突出的初始粘合性，而且可以获得显着的耐水性。

公开(公告)号：US20120250425A1

公开(公告)日：2012-10-04

申请号：US13432708

申请日：2012-03-28

Applicant: Masahiro YOSHIHARA ,  Katsumi ABE

Inventor： Masahiro YOSHIHARA ,  Katsumi ABE

IPC: G11C7/10

CPC classification number: G11C7/1078 ,  G11C7/08 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/1087 ,  G11C7/12 ,  G11C7/22 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/26 ,  G11C16/3418 ,  G11C2207/2227 ,  G11C2207/2245

Abstract: According to one embodiment, the semiconductor memory includes a memory cell array which includes memory cells to store data, a buffer circuit which includes latches, each of the latches including transistors as control elements and a flip-flop, and a control circuit which turns off the transistors to deactivate one or more of the latches.

Abstract translation: 根据一个实施例，半导体存储器包括存储单元阵列，其包括用于存储数据的存储单元，包括锁存器的缓冲电路，每个锁存器包括作为控制元件的晶体管和触发器，以及控制电路， 晶体管去激活一个或多个锁存器。

公开(公告)号：US20120052427A1

公开(公告)日：2012-03-01

申请号：US13266987

申请日：2010-07-21

Applicant: Shigetaka Numazawa ,  Katsumi Abe ,  Kiyotaka Ihara ,  Takehiro Nakajima ,  Makoto Koike

Inventor： Shigetaka Numazawa ,  Katsumi Abe ,  Kiyotaka Ihara ,  Takehiro Nakajima ,  Makoto Koike

IPC: G03G5/047 ,  C07D209/94

CPC classification number: C07D209/94 ,  C07D401/04 ,  C07D401/12 ,  C07D401/14 ,  C07D471/04 ,  C07D491/052 ,  C07D495/04 ,  G03G5/0629 ,  G03G5/0698

Abstract: [Problems] To provide a novel compound having a high carrier mobility and is useful as a charge transporting agent which not only makes it possible to stably form a photosensitive layer without precipitating crystals or without developing pinholes when the photosensitive layer is being formed but also makes it possible to form an organic photosensitive material for electrophotography of a high sensitivity and a low residual potential.[Means for Solution] An indole derivative represented by the following general formula (1), wherein R1 and R2 are alkyl groups, k is an integer of 0 to 3, j is an integer of 0 to 4, a ring Z is a 5- to 6-membered ring and is, specifically, a cyclopentane ring, and X1 and X2 are hydrocarbon groups having at least one ethylenically unsaturated bond.

Abstract translation: [问题]提供具有高载流子迁移率的新化合物，并且可用作电荷输送剂，其不仅可以在形成感光层时不会沉淀晶体或不产生显影针孔而稳定地形成感光层，而且可以使 可以形成高灵敏度和低残留电位的电子照相用有机感光材料。 [解决方案]由以下通式（1）表示的吲哚衍生物，其中R1和R2是烷基，k是0-3的整数，j是0-4的整数，环Z是5 至6元环，具体为环戊烷环，X 1和X 2为具有至少一个烯属不饱和键的烃基。

公开(公告)号：US20110305089A1

公开(公告)日：2011-12-15

申请号：US13052148

申请日：2011-03-21

Applicant: Katsumi Abe ,  Masahiro Yoshihara ,  Toshiaki Edahiro

Inventor： Katsumi Abe ,  Masahiro Yoshihara ,  Toshiaki Edahiro

IPC: G11C16/34 ,  G11C16/26 ,  G11C16/12 ,  G11C16/04

CPC classification number: G11C16/26 ,  G11C11/5642 ,  G11C16/12 ,  G11C16/32 ,  G11C16/3468

Abstract: According to one embodiment, a threshold detecting method for detecting threshold values of nonvolatile semiconductor memory cells comprises applying a preset voltage to a word line connected to the memory cells, and performing bit-line sense at two different timings during discharging of one of a bit line connected to the memory cells and a node corresponding to the bit line, while a potential of the word line is kept constant.

Abstract translation: 根据一个实施例，用于检测非易失性半导体存储单元的阈值的阈值检测方法包括：将预设电压施加到连接到存储单元的字线，以及在放电期间的两个不同定时执行位线检测 线连接到存储器单元和对应于位线的节点，而字线的电位保持恒定。

公开(公告)号：US20110187888A1

公开(公告)日：2011-08-04

申请号：US13086226

申请日：2011-04-13

Applicant: Hisae Shimizu ,  Katsumi Abe

Inventor： Hisae Shimizu ,  Katsumi Abe

IPC: H04N5/228 ,  G06F3/038 ,  G09G3/32

CPC classification number: G09G3/3233 ,  G09G3/3291 ,  G09G2300/0417 ,  G09G2300/043 ,  G09G2300/0819 ,  G09G2300/0861 ,  G09G2310/0262 ,  G09G2320/043

Abstract: A drive circuit for a light emitting display apparatus including a pixel circuit having a light emitting device for emitting a light having brightness determined based on supplied current and a drive transistor for supplying the current to the light emitting device, comprises a threshold value correction circuit converting a second signal including a threshold voltage of the drive transistor and a data voltage, the second signal being output from the drive transistor when a first signal including the data voltage is input into the control electrode of the drive transistor, into a third signal including the threshold voltage of an inverted polarity and the data voltage or a voltage corresponding to the data voltage, to output the converted third signal to the pixel circuit. The pixel circuit includes a switch for supplying the third signal to the control electrode of the drive transistor.

Abstract translation: 一种用于发光显示装置的驱动电路，包括具有发光装置的像素电路，所述发光装置用于发射基于所提供的电流确定的亮度的光和用于向所述发光装置提供电流的驱动晶体管，所述驱动电路包括阈值校正电路转换 包括驱动晶体管的阈值电压的第二信号和数据电压，当包括数据电压的第一信号被输入到驱动晶体管的控制电极时，第二信号从驱动晶体管输出到第三信号，第三信号包括 反转极性的阈值电压和数据电压或对应于数据电压的电压，以将转换的第三信号输出到像素电路。 像素电路包括用于将第三信号提供给驱动晶体管的控制电极的开关。