公开(公告)号：US20020053720A1

公开(公告)日：2002-05-09

申请号：US09951391

申请日：2001-09-14

Applicant: ALSTOM

Inventor： Benoit Boursat ,  Emmanuel Dutarde ,  Luc Meysenc ,  Jose Saiz ,  Pierre Solomalala

IPC: H01L029/82

CPC classification number: H01L23/3735 ,  H01L23/147 ,  H01L23/538 ,  H01L2924/0002 ,  H01L2924/13055 ,  H05K1/0306 ,  H05K3/181 ,  H05K3/244 ,  H05K2201/064 ,  H05K2201/098 ,  H01L2924/00

Abstract: A substrate for an electronic circuit, the substrate comprising a wafer of silicon Si having a top face covered in an electrically insulating layer of silicon nitride SiN, said electrically insulating layer of silicon nitride supporting one or more conductive tracks obtained by metallizing the top face of said electrically insulating layer for the purpose of enabling one or more electronic components to be connected.

Abstract translation: 一种用于电子电路的衬底，所述衬底包括具有覆盖在氮化硅SiN的电绝缘层中的顶面的硅硅晶片，所述氮化硅的电绝缘层支撑一个或多个通过金属化 所述电绝缘层用于使一个或多个电子部件能够连接。

公开(公告)号：US20040207968A1

公开(公告)日：2004-10-21

申请号：US10821031

申请日：2004-04-08

Applicant: ALSTOM

Inventor： Nathalie Martin ,  Benoit Boursat ,  Emmanuel Dutarde ,  Jose Saiz ,  Jacques Cettour-Rose ,  Pierre Solomalala

IPC: H02H003/00

CPC classification number: H05K7/20927 ,  H01L23/473 ,  H01L2924/0002 ,  H02M7/003 ,  H01L2924/00

Abstract: A power switching module is provided having at least one power switch placed above at least one other power switch, each power switch in turn including an upper wall and a lower wall, each of which is cooled through thermal conduction by a cooling medium that circulates in channels and voids that are provided along the walls for this purpose.

Abstract translation: 电源开关模块设置有至少一个电源开关，放置在至少一个其他电力开关上方，每个电源开关又包括一个上壁和一个下壁，每个电源开关通过热循环冷却介质进行热传导而被冷却 为了这个目的，沿着墙壁提供的通道和空隙。

公开(公告)号：US20030025522A1

公开(公告)日：2003-02-06

申请号：US10200191

申请日：2002-07-23

Applicant: ALSTOM

Inventor： Fabrice Breit ,  Sorin Dinculescu ,  Emmanuel Dutarde ,  Thierry Lebey ,  Jose Saiz

IPC: G01R031/36

CPC classification number: G01R31/129 ,  G01R31/2637

Abstract: A method of testing a power module including a control gate, an emitter, a collector, at least one power component on a dielectric substrate and a diode connected in antiparallel with the power component measures partial discharges occurring between the emitter and the collector when an alternating current voltage source superimposed on a direct current voltage source is connected between the collector and the emitter of the power module. The voltage Vtest received by the power module between the collector and the emitter verifies at all times the condition Vtest>0 so that the diode never conducts. The power component is maintained in a turned off state during the test by means of a direct current voltage source connected between the control gate and the emitter.

Abstract translation: 测试包括控制栅极，发射极，集电极，电介质基板上的至少一个功率部件和与功率部件反并联连接的二极管的功率模块的方法测量发射极和集电极之间发生的部分放电，当交替 叠加在直流电压源上的电流电压源连接在功率模块的集电极和发射极之间。 集电极和发射极之间的功率模块接收的电压Vtest在任何时候都会验证条件Vtest> 0，使得二极管不会导通。 在测试期间，功率分量通过连接在控制栅极和发射极之间的直流电压源保持在关闭状态。

公开(公告)号：US20020125505A1

公开(公告)日：2002-09-12

申请号：US10059359

申请日：2002-01-31

Applicant: ALSTOM

Inventor： Benoit Boursat ,  Emmanuel Dutarde ,  Nathalie Martin ,  Pierre Solomalala ,  Jose Saiz

IPC: H01L027/10

CPC classification number: H05K1/0265 ,  H01L23/3735 ,  H01L23/473 ,  H01L23/538 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K3/181 ,  H05K3/244 ,  H05K2201/064 ,  H05K2201/098 ,  H01L2924/00

Abstract: An electronic power circuit substrate including a wafer of electrically insulating material, wherein said wafer presents a face supporting one or more conductive tracks directly connected to one or more electronic power components, said conductive tracks being obtained by fine metallization of said face to a thickness that is less than 150nullm.

Abstract translation: 一种包括电绝缘材料晶片的电子电路电路基板，其中所述晶片呈现一个支撑直接连接到一个或多个电子元件的一个或多个导电轨道的表面，所述导电轨迹是通过所述面的精细金属化得到的， 小于150mum。