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1.发明授权公开(公告)号：US11835998B2
公开(公告)日：2023-12-05
申请号：US17362231
申请日：2021-06-29
Applicant: Advanced Micro Devices, Inc.
Inventor： Amitabh Mehra , Jerry A. Ahrens , Anil Harwani , Richard Martin Born , Dirk J. Robinson , William R. Alverson , Joshua Taylor Knight
CPC classification number: G06F1/08 , G06F1/28 , H03K5/00006
Abstract: Methods and apparatuses control the clock rate of a processing unit. The methods and apparatus control the clock rate by generating an output clock rate based on the determined frequency adjustment such that the processing unit maintains the overclocking. The methods include: receiving an analog voltage supply in response to detecting overclocking in the processing unit; dynamically sensing measurements of an output voltage from a voltage generator based on the received analog voltage supply; determining characteristics of a voltage droop in the output voltage based on the dynamically sensed output voltage measurements; determining a frequency adjustment for the clock rate of the processing unit based on the determined characteristics of the voltage droop; and generating an output clock rate based on the determined frequency adjustment such that the processing unit maintains the overclocking.
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2.发明申请公开(公告)号：US20220413543A1
公开(公告)日：2022-12-29
申请号：US17362231
申请日：2021-06-29
Applicant: Advanced Micro Devices, Inc.
Inventor： Amitabh Mehra , Jerry A. Ahrens , Anil Harwani , Richard Martin Born , Dirk J. Robinson , William R. Alverson , Joshua Taylor Knight
Abstract: Methods and apparatuses control the clock rate of a processing unit. The methods and apparatus control the clock rate by generating an output clock rate based on the determined frequency adjustment such that the processing unit maintains the overclocking. The methods include: receiving an analog voltage supply in response to detecting overclocking in the processing unit; dynamically sensing measurements of an output voltage from a voltage generator based on the received analog voltage supply; determining characteristics of a voltage droop in the output voltage based on the dynamically sensed output voltage measurements; determining a frequency adjustment for the clock rate of the processing unit based on the determined characteristics of the voltage droop; and generating an output clock rate based on the determined frequency adjustment such that the processing unit maintains the overclocking.
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公开(公告)号：US10855222B2
公开(公告)日：2020-12-01
申请号：US16023698
申请日：2018-06-29
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Dirk J. Robinson , Andy Huei Chu , Yan Sun , Saket Sham Doshi
Abstract: A clock synthesizer has integrated voltage droop detection and clock stretching. An oscillator of the clock synthesizer receives a control current from a digital to analog converter and generates an oscillator output signal. A droop detector and clock stretching circuit responds to a voltage droop of a supply voltage supplying circuits coupled to the oscillator output signal, to cause a portion of the oscillator control current to be diverted from the oscillator to thereby cause the oscillator to reduce the first frequency. The diversion can be accomplished through shunt circuits or a current mirror circuit.
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公开(公告)号：US20200007082A1
公开(公告)日：2020-01-02
申请号：US16023698
申请日：2018-06-29
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Dirk J. Robinson , Andy Huei Chu , Yan Sun , Saket Sham Doshi
Abstract: A clock synthesizer has integrated voltage droop detection and clock stretching. An oscillator of the clock synthesizer receives a control current from a digital to analog converter and generates an oscillator output signal. A droop detector and clock stretching circuit responds to a voltage droop of a supply voltage supplying circuits coupled to the oscillator output signal, to cause a portion of the oscillator control current to be diverted from the oscillator to thereby cause the oscillator to reduce the first frequency. The diversion can be accomplished through shunt circuits or a current mirror circuit.
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