公开(公告)号：US20120234587A1

公开(公告)日：2012-09-20

申请号：US13414906

申请日：2012-03-08

Applicant: Naoki NAKAMURA ,  Mitsuhiko SUGANE ,  Akiko MATSUI ,  Tetsuro YAMADA ,  Takahide MUKOYAMA ,  Yoshiyuki HIROSHIMA ,  Takahiro OOI

Inventor： Naoki NAKAMURA ,  Mitsuhiko SUGANE ,  Akiko MATSUI ,  Tetsuro YAMADA ,  Takahide MUKOYAMA ,  Yoshiyuki HIROSHIMA ,  Takahiro OOI

IPC: H05K1/18 ,  H05K3/36 ,  H05K1/11

CPC classification number: H05K3/429 ,  H05K1/115 ,  H05K3/0047 ,  H05K2201/09581 ,  H05K2201/09845 ,  H05K2201/09854 ,  H05K2203/1572 ,  Y10T29/49126

Abstract: A printed wiring board is disclosed that includes insulating layers, conductive layers stacked with the insulating layers alternately, a through hole penetrating the insulating layers and the conductive layers, a first plate resist part formed on a first portion of an inner wall of the through hole, the first portion being located from one end of the through hole to one of the conductive layers stacked between one pair of the insulating layers, and a plated part formed on a second portion of the inner wall of the through hole other than the first portion.

Abstract translation: 公开了一种印刷电路板，其包括绝缘层，交替地层叠有绝缘层的导电层，贯穿绝缘层和导电层的通孔，形成在通孔内壁的第一部分上的第一平板抗蚀部 所述第一部分从所述通孔的一端位于层叠在一对所述绝缘层之间的导电层之一之间，并且形成在除所述第一部分之外的所述通孔的内壁的第二部分上的电镀部 。

公开(公告)号：US20120188735A1

公开(公告)日：2012-07-26

申请号：US13300701

申请日：2011-11-21

Applicant: Yoshiyuki HIROSHIMA ,  Akiko MATSUI ,  Mitsuhiko SUGANE ,  Takahide MUKOYAMA ,  Tetsuro YAMADA ,  Takahiro OOI

Inventor： Yoshiyuki HIROSHIMA ,  Akiko MATSUI ,  Mitsuhiko SUGANE ,  Takahide MUKOYAMA ,  Tetsuro YAMADA ,  Takahiro OOI

IPC: H05K7/06

CPC classification number: H05K1/181 ,  H05K1/18 ,  H05K2201/099

Abstract: An electronic device includes an electronic component including a plurality of terminals and a circuit board on which the electronic component is mounted. The circuit board includes a board body, a plurality of electrode pads arranged on the board body, each of the electrode pads being connected to each of the terminals by solder, a first solder resist formed on the board body and having a plurality of first openings, each of the first openings accommodating each of the electrode pads, and a second solder resist formed on the first solder resist and having a plurality of second openings, each of the second openings being larger than each of the first openings and communicating with each of the first openings.

Abstract translation: 一种电子设备包括一个包括多个端子的电子部件和一个安装有电子部件的电路板。 电路板包括板体，布置在板体上的多个电极焊盘，每个电极焊盘通过焊料连接到每个端子;第一阻焊剂，形成在电路板主体上，并具有多个第一开口 每个所述第一开口容纳每个所述电极焊盘;以及第二阻焊剂，形成在所述第一阻焊层上，并且具有多个第二开口，每个所述第二开口大于每个所述第一开口， 第一个开口。

公开(公告)号：US20110073354A1

公开(公告)日：2011-03-31

申请号：US12859829

申请日：2010-08-20

Applicant: Takahiro OOI ,  Tetsuro YAMADA ,  Yoshihiro MORITA ,  Akiko MATSUI ,  Mitsuhiko SUGANE ,  Takahide MUKOUYAMA

Inventor： Takahiro OOI ,  Tetsuro YAMADA ,  Yoshihiro MORITA ,  Akiko MATSUI ,  Mitsuhiko SUGANE ,  Takahide MUKOUYAMA

IPC: H05K1/03 ,  H05K3/00

CPC classification number: H05K1/025 ,  H05K1/024 ,  H05K1/0248 ,  H05K1/0366 ,  H05K3/0052 ,  H05K2201/029

Abstract: A printed board includes an insulating body that has a flat surface and includes insulating cloth including first fibers and second fibers that cross the first fibers at right angles on the flat surface, and printed wiring including a plurality of signal lines that run parallel to each other and are laid out on the flat surface of the insulating body so that a direction of the signal lines is tilted to a direction of the first or second fibers at an angle which is determined based on board-cutting efficiency of the insulating body and a predetermined delay-time difference between the signal lines.

Abstract translation: 印刷电路板包括具有平坦表面的绝缘体，并且包括绝缘布，其包括第一纤维和第二纤维，所述第一纤维和第二纤维在平坦表面上与第一纤维成直角交叉;以及印刷布线，包括彼此平行延伸的多条信号线 并且布置在绝缘体的平坦表面上，使得信号线的方向以基于绝缘体的板切割效率确定的角度和预定的绝缘体的角度倾斜到第一或第二纤维的方向 信号线之间的延迟时间差。

公开(公告)号：US20110241233A1

公开(公告)日：2011-10-06

申请号：US13073489

申请日：2011-03-28

Applicant: Yoshihiro MORITA ,  Takahiro OOI ,  Tetsuro YAMADA ,  Akiko MATSUI ,  Mitsuhiko SUGANE ,  Takahide MUKOUYAMA

Inventor： Yoshihiro MORITA ,  Takahiro OOI ,  Tetsuro YAMADA ,  Akiko MATSUI ,  Mitsuhiko SUGANE ,  Takahide MUKOUYAMA

IPC: G02B6/04

CPC classification number: G02B6/138 ,  B29D11/00663 ,  G02B6/43

Abstract: A method for manufacturing an optical waveguide in which multiple cores are embedded in a parallel-arranged fashion within a single cladding, the cores having a refractive index of light different from that of the cladding, the method includes forming the multiple cores in a state where the adjacent cores are connected by a rib, forming the cladding around the rib and the multiple cores by curing a cladding material there around, and a cutting to the rib.

Abstract translation: 一种制造光波导的方法，其中多个芯以平行布置的方式嵌入在单个包层内，所述芯具有与包层的折射率不同的光的折射率，所述方法包括在以下状态下形成多个芯： 相邻的芯通过肋连接，通过在其周围固化包层材料并切割到肋来在肋和多个芯周围形成包层。

公开(公告)号：US20080217052A1

公开(公告)日：2008-09-11

申请号：US12043432

申请日：2008-03-06

Applicant: Akiko MATSUI

Inventor： Akiko MATSUI

IPC: H05K1/11 ,  H05K3/02

CPC classification number: H05K1/0268 ,  H05K1/0237 ,  H05K1/115 ,  H05K3/0047 ,  H05K3/429 ,  H05K2201/09627 ,  H05K2203/0207 ,  H05K2203/0242 ,  H05K2203/162 ,  H05K2203/175 ,  Y10T29/49155

Abstract: A wiring board including a plated through hole formed in the wiring board; a test plated through hole or a test via hole provided in the surrounding area of the plated through hole to check a processing state related to the plated through hole; and a conductive pattern used to electrically connect the plated through hole to the test through hole or the test via hole.

Abstract translation: 一种布线板，包括形成在所述布线板中的电镀通孔; 设置在电镀通孔的周围区域的测试电镀通孔或测试通孔，以检查与电镀通孔相关的处理状态; 以及用于将电镀通孔电连接到测试通孔或测试通孔的导电图案。

公开(公告)号：US20080217051A1

公开(公告)日：2008-09-11

申请号：US12042788

申请日：2008-03-05

Applicant: Akiko MATSUI

Inventor： Akiko MATSUI

IPC: H05K1/11 ,  H05K3/42

CPC classification number: H05K1/0269 ,  H05K1/116 ,  H05K3/0047 ,  H05K3/429 ,  H05K2201/09781 ,  H05K2203/0207 ,  H05K2203/0242 ,  H05K2203/161 ,  Y10T29/49165

Abstract: A wiring board including a plated through hole provided on the wiring board, and an indicator provided around the plated through hole. The indicator indicating a processing state related to the plated through hole.

Abstract translation: 一种布线板，包括设置在布线板上的电镀通孔，以及设置在电镀通孔周围的指示器。 该指示器指示与电镀通孔相关的处理状态。

公开(公告)号：US20110308842A1

公开(公告)日：2011-12-22

申请号：US13075865

申请日：2011-03-30

Applicant: Yoshihiro MORITA ,  Takahiro OOI ,  Tetsuro YAMADA ,  Akiko MATSUI ,  Mitsuhiko SUGANE ,  Takahide MUKOYAMA

Inventor： Yoshihiro MORITA ,  Takahiro OOI ,  Tetsuro YAMADA ,  Akiko MATSUI ,  Mitsuhiko SUGANE ,  Takahide MUKOYAMA

IPC: H05K1/03 ,  H05K3/00

CPC classification number: H05K1/0366 ,  D03D1/0088 ,  D03D15/0011 ,  D03D15/0088 ,  D10B2401/18 ,  D10B2505/02 ,  H05K1/024 ,  H05K1/0245 ,  H05K1/0248 ,  H05K2201/029 ,  H05K2201/091 ,  H05K2203/0195 ,  Y10T29/49124

Abstract: A wiring substrate includes an insulation layer including a thermosetting resin and a reinforcement member having plural first fiber bundles and plural second fiber bundles woven together, the second fiber bundles being intersected with the first fiber bundles, and a pair of differential wirings arranged alongside each other on the insulation layer. The first fiber bundles and the second fiber bundles have a curved portion relative to a plan direction of the insulation layer in a region on which the pair of differential wirings is arranged.

Abstract translation: 布线基板包括：绝缘层，包括热固性树脂和具有多个第一纤维束的加强件和编织在一起的多个第二纤维束，第二纤维束与第一纤维束相交，以及一对彼此并排设置的差动布线 在绝缘层上。 第一纤维束和第二纤维束在布置有一对差动布线的区域中相对于绝缘层的平面方向具有弯曲部分。

公开(公告)号：US20110308840A1

公开(公告)日：2011-12-22

申请号：US13075838

申请日：2011-03-30

Applicant: Takahiro OOI ,  Yoshihiro MORITA ,  Akiko MATSUI ,  Tetsuro YAMADA ,  Mitsuhiko SUGANE ,  Takahide MUKOYAMA

Inventor： Takahiro OOI ,  Yoshihiro MORITA ,  Akiko MATSUI ,  Tetsuro YAMADA ,  Mitsuhiko SUGANE ,  Takahide MUKOYAMA

IPC: H05K1/02 ,  H01R43/00

CPC classification number: H05K1/0248 ,  H05K1/024 ,  H05K1/0245 ,  H05K1/0269 ,  H05K1/0366 ,  H05K2201/029 ,  H05K2201/09272 ,  H05K2203/166 ,  H05K2203/167

Abstract: A wiring substrate includes differential wirings; a first insulating layer adjacent to one side of the differential wirings, including first fiber bundles parallel to the differential wirings; a second insulating layer adjacent to another side of the differential wirings, including second fiber bundles parallel to the differential wirings and disposed by the same pitch as the first fiber bundles; a third insulating layer on the first insulating layer on a side opposite to the differential wirings, including third fiber bundles in parallel to the differential wirings; and a fourth insulating layer on the second insulating layer on a side opposite to the differential wirings, including fourth fiber bundles in parallel to the differential wirings. Intervals of the third and fourth fiber bundles are respectively narrower than intervals of the first and second fiber bundles. The differential wirings are disposed between adjacent first fiber bundles, and between adjacent second fiber bundles.

Abstract translation: 布线基板包括差分布线; 与所述差分布线的一侧相邻的第一绝缘层，包括平行于所述差分布线的第一光纤束; 与所述差分布线的另一侧相邻的第二绝缘层，包括与所述差分布线平行并且以与所述第一纤维束相同的间距设置的第二纤维束; 在所述第一绝缘层上的与所述差分布线相反的一侧的第三绝缘层，包括与所述差分布线平行的第三纤维束; 以及在所述第二绝缘层上的与所述差分布线相反的一侧的第四绝缘层，包括与所述差分布线平行的第四纤维束。 第三和第四纤维束的间隔分别比第一和第二纤维束的间隔窄。 差分布线设置在相邻的第一纤维束之间以及相邻的第二纤维束之间。

公开(公告)号：US20110232949A1

公开(公告)日：2011-09-29

申请号：US13046076

申请日：2011-03-11

Applicant: Tetsuro YAMADA ,  Takahiro OOI ,  Yoshihiro MORITA ,  Akiko MATSUI ,  Misuhiko SUGANE ,  Takahide MUKOYAMA

Inventor： Tetsuro YAMADA ,  Takahiro OOI ,  Yoshihiro MORITA ,  Akiko MATSUI ,  Misuhiko SUGANE ,  Takahide MUKOYAMA

IPC: H05K1/03 ,  B32B38/00 ,  B32B37/02 ,  B32B38/08 ,  B32B38/10

CPC classification number: H05K1/0245 ,  H05K1/0248 ,  H05K1/0269 ,  H05K1/0366 ,  H05K3/4638 ,  H05K2201/029 ,  H05K2201/09236 ,  H05K2201/0969 ,  H05K2203/167

Abstract: A printed wiring board manufacturing method includes weaving a glass fiber cloth with warp and weft yarns such that the warp and weft yarns are visually distinguishable at least a region. The glass fiber cloth is impregnated with a resin to fabricate a substrate. A copper foil is formed on at least one surface of the substrate to fabricate a core substrate. The copper foil is removed within the region on the core substrate to form an opening. A pitch between the warp yarns or between the weft yarns which are presented in the opening is detected. A pitch between a pair of differential wirings to be patterned is determined based on the detected pitch between the warp yarns or between the weft yarns. The pair of differential wirings is patterned on the core substrate in accordance with the determined pitch between the pair of differential wirings.

Abstract translation: 一种印刷线路板的制造方法，其特征在于，以经纱和纬纱编织玻璃纤维布，使经纱和纬纱在至少一个区域上视觉区分。 玻璃纤维布被树脂浸渍以制造基材。 在基板的至少一个表面上形成铜箔以制造芯基板。 在芯基板上的区域内去除铜箔以形成开口。 检测出在经纱之间或介于纬纱之间的间距。 基于经纱之间或纬纱之间的间距来确定要被图案化的一对差动布线之间的间距。 根据所述一对差动配线之间的所确定的间距，在所述芯基板上图案化所述一对差分布线。

公开(公告)号：US20090166080A1

公开(公告)日：2009-07-02

申请号：US12198396

申请日：2008-08-26

Applicant: Akiko MATSUI

Inventor： Akiko MATSUI

IPC: H05K3/36 ,  H05K1/11

CPC classification number: H05K3/4623 ,  H05K1/0237 ,  H05K3/429 ,  H05K2201/09063 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/1059 ,  H05K2203/063 ,  Y10T29/49126

Abstract: A multilayer wiring board is manufactured by preparing a first wiring board, a second wiring board, and a joint sheet. The first wiring board is provided with a via having a first through-hole in which a conductive film is formed. The second wiring board is provided with a second through-hole at a position substantially matching the position of the first through-hole. The joint sheet is provided with a third through-hole at a position substantially matching the positions of the first and the second through-holes. the first wiring board and the second wiring board are stacked and bonded together by heat and pressure with the joint sheet interposed therebetween.

Abstract translation: 通过制备第一布线板，第二布线板和接合片来制造多层布线板。 第一布线板设置有具有其中形成导电膜的第一通孔的通孔。 第二布线板在与第一通孔的位置大致匹配的位置处设置有第二通孔。 接合片在与第一通孔和第二通孔的位置基本匹配的位置处设置有第三通孔。 第一配线基板和第二配线基板通过热连接而将接合片层叠在一起。